TWI637470B - 半導體封裝及其之製造方法 - Google Patents
半導體封裝及其之製造方法 Download PDFInfo
- Publication number
- TWI637470B TWI637470B TW106106191A TW106106191A TWI637470B TW I637470 B TWI637470 B TW I637470B TW 106106191 A TW106106191 A TW 106106191A TW 106106191 A TW106106191 A TW 106106191A TW I637470 B TWI637470 B TW I637470B
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- Prior art keywords
- metal
- molecular bonding
- molecular
- semiconductor package
- bonding layer
- Prior art date
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Classifications
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H01L23/4952—Additional leads the additional leads being a bump or a wire
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- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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Abstract
實施形態之半導體封裝係具備半導體晶片、導電部、接合線、塑模樹脂部、與分子接合層。前述分子接合層係至少設於前述接合線的表面與前述塑模樹脂部之間。前述分子接合層的至少一部分係與被包含於前述接合線之金屬形成化學鍵。前述分子接合層的至少一部分係與被包含於前述塑模樹脂部之樹脂形成化學鍵。
Description
本申請案係享以美國暫時專利申請案62/324,702號(申請日:2016年4月19日)及美國暫時專利申請案62/382,041號(申請日:2016年8月31日)為基礎申請之優先權。本申請案係藉由參照此等基礎申請而包含基礎申請的全部內容。
本發明之實施形態係有關於一種半導體封裝及其之製造方法。
向來已知有具備打線接合、與塑模樹脂部的半導體封裝。
本發明之實施形態係提供一種可提升接合線與塑模樹脂部之密接性的半導體封裝及其之製造方法。
實施形態之半導體封裝係具備半導體晶片、導電部、接合線、塑模樹脂部、與分子接合層。前述接合線係設於前述半導體晶片與前述導電部之間。前述塑模樹脂部係被覆前述半導體晶片、前述導電部的至少一部分、及前述接合線。前述分子接合層係至少設於前述接合線的表面與前述塑模樹脂部之間。前述分子接合層的至少一部分係與被包含於前述接合線之金屬形成化學鍵。前述分子接合層的至少一部分係與被包含於前述塑模樹脂部之樹脂形成化學鍵。
1‧‧‧電子機器
10‧‧‧半導體封裝
20‧‧‧金屬基座
20m‧‧‧金屬
30‧‧‧半導體晶片
30a‧‧‧第1面
30b‧‧‧第2面
30m‧‧‧矽
31‧‧‧導電墊片
40‧‧‧分子接合層
40r‧‧‧分子接合體
41‧‧‧第1部分
42‧‧‧第2部分
43‧‧‧第3部分
44‧‧‧第4部分
50‧‧‧黏晶接著層
60‧‧‧接合線
60m‧‧‧金屬
70‧‧‧導線框
71‧‧‧本體部
71m‧‧‧金屬
72‧‧‧金屬鍍敷層
72A‧‧‧金屬鍍敷層
72m‧‧‧金屬
75‧‧‧第1部分
76‧‧‧第2部分
80‧‧‧塑模樹脂部
80m‧‧‧樹脂
90‧‧‧基板
91‧‧‧導電墊片
91m‧‧‧金屬
92‧‧‧焊料連接部
100‧‧‧金屬零件
110‧‧‧樹脂層
110m‧‧‧樹脂
120‧‧‧樹脂層
120m‧‧‧樹脂
第1圖為表示第1實施形態之電子機器之一例的立體圖。
第2圖為表示第1實施形態之半導體封裝的剖面圖。
第3圖為放大表示第1實施形態之半導體封裝的一部分的剖面圖。
第4圖為示意性表示第1實施形態之分子接合層的組成之一例的圖。
第5圖為表示第1實施形態之半導體封裝之製造方法
的流程之一例的剖面圖。
第6圖為表示第1實施形態之第1變形例的半導體封裝的剖面圖。
第7圖為表示第1實施形態之第2變形例的半導體封裝的一部分的剖面圖。
第8圖為表示第2實施形態之半導體封裝的剖面圖。
第9圖為表示第3實施形態之半導體封裝的一部分的剖面圖。
第10圖為表示第4實施形態之半導體封裝的一部分的剖面圖。
以下,參照圖式來說明實施形態之半導體封裝及半導體封裝之製造方法。此外,在以下的說明中,係對具有同等或類似機能的構成附加相同的符號。而且,有時省略彼等之重複說明。再者,圖式僅為示意性,各構成要素的數量、厚度、寬度、比率等有時與實際不同。
首先,參照第1圖至第5圖,就第1實施形態加以說明。
第1圖為表示第1實施形態之電子機器1之一例的立體圖。電子機器1係配載有第1實施形態之半導體封裝10。電子機器1為例如穿戴式裝置,但不限定於此。電子機器1為例如支援IOT(Internet Of Things)的電子機器,可透過無線或有線連接至網路。此時,半導體封裝10的一例,係具有處理器(e.g.,Central Processing Unit)、感測器、與無線模組。此外,電子機器1及半導體封裝10非限定於上述實例。電子機器1可為車載用之電子機器,亦可為其他用途的電子機器。半導體封裝10可為作為車載用零件或功率半導體使用的半導體零件,也可為用於其他用途的半導體零件。再者,以下所示第2及第3實施形態之半導體封裝10亦可配載於如上述之電子機器1。
第2圖為表示第1實施形態之半導體封裝10的剖面圖。
如第2圖所示,半導體封裝10係具備例如金屬基座20、半導體晶片30、分子接合層40、黏晶接著層50、接合線60、導線框70、與塑模樹脂部80。
金屬基座20為「基座」的一例。此外,本案中所稱「基座」,只要是供固定半導體晶片30的構件即可,可非為金屬製。又,「基座」亦可稱作「支持體」。
金屬基座20係包含具導電性之金屬(i.e.,金屬素材)20m作為構成素材。金屬基座20,透過使用具導電性之金屬,而發揮例如作為半導體封裝10的接地之機能。換言之,半導體晶片30係經由黏晶接著層50與金屬基座20電性連接(e.g.,接地)。又,金屬基座20係使用高熱傳導率之材料。透過使用高熱傳導率之材料,可提高半導體封裝10於一般操作時的放熱性。作為此種金屬基座20之材料(i.e.,第1素材),可舉出Cu、Mo、Ag、W、Fe、Ni、或此等之合金等。例如,金屬基座20之材料較佳使用Cu或Cu與Mo之合金。透過金屬基座20之材料使用此等物質,可提高熱傳導率及導電性此兩者。此外,以金屬以外者形成基座時,基座之素材可為例如樹脂(i.e.,合成樹脂樹脂)、陶瓷、或其他的素材。
半導體晶片(e.g.,裸晶片)30為例如以含矽之半導體為構成素材的構件。半導體晶片30的一例,亦可稱作「矽晶片」。半導體晶片30為例如以GaN或SiC等為材料的HFET(Heterojunction Field Effect Transistor)、或以Si為材料的LDMOS(Lateral Double Diffuse MOS Transistor)等。又,作為半導體晶片30的其他實例,可舉出光半導體元件、壓電元件、記憶體元件、微電腦元件、感測器元件、或無線通訊用元件等。此外,本案中所
稱「半導體晶片(或半導體晶片本體)」,只要是包含電子電路者即可,非限定於特定用途的半導體晶片。半導體晶片30之素材的一例為矽30m。此外,會與分子接合層40形成化學鍵(e.g.,共價鍵)的半導體晶片30之素材,亦可為被包含於設於半導體晶片30的表面之絕緣部的絕緣素材。此時,以下說明中的「矽30m」亦可另視為「絕緣素材」。
半導體晶片30係具有第1面30a、與第2面30b。第1面30a上設有作為電子電路之一部分的導電墊片(i.e.,連接部、電性連接部、端子)31。第2面30b係位於第1面30a的相反側。第2面30b係面向黏晶接著層50。於本實施形態中,導電墊片31係藉由將導電性金屬鍍敷於半導體晶片30的第1面30a而形成。作為導電性金屬,係使用例如Au、Ni、或Cu等。例如,導電墊片31係具有在作為電路之基座的銅鍍層上依序層合鎳鍍層、金鍍層之構造。
黏晶接著層50係設於金屬基座20與半導體晶片30之間。黏晶接著層50為藉由例如錨定效應而接著(i.e.,接合)金屬基座20與半導體晶片30之連接構件。黏晶接著層50係包含複數個導電粒子、與樹脂。黏晶接著層50係透過被包含於黏晶接著層50的複數個導電粒子彼此相
接而相互導通而具有導電性。換言之,複數個導電粒子係電性連接金屬基座20與半導體晶片30。
接合線60係設於導線框70與半導體晶片30的導電墊片31之間。例如,接合線60為延伸於導線框70與半導體晶片30的導電墊片31之間的導線構件。接合線60係電性連接導線框70與半導體晶片30的導電墊片31。接合線60係以例如金屬60m所形成。金屬60m為金、銅、或銅合金等。金屬60m為「第1金屬(i.e.,第1金屬素材,第1素材)」的一例。
導線框(i.e.,連接部、電性連接部、外部連接端子)70為「導電部」及「金屬零件」的各一例。導線框70為供連接於半導體封裝10之外部構件(e.g.,電路基板)的電性連接端子。導線框70的至少一部分係向塑模樹脂部80的外部突出。導線框70係形成例如半導體封裝10之內部配線的一部分。
第3圖為放大表示本實施形態之導線框70的剖面圖。
如第3圖所示,本實施形態之導線框70係具有本體部71、與設於此導線框70的表面的金屬鍍敷層72。
本體部71係形成導線框70的大部分。本體部71為「導電部本體」及「金屬基體」的各一例。本體部71係
以金屬71m所形成。金屬71m為銅或銅合金等。金屬71m為「第3金屬(i.e.,第3金屬素材、第3素材)」的一例。此外,「第3金屬」可與「第1金屬」相同或相異。
金屬鍍敷層72係設於本體部71的表面的至少一部分。金屬鍍敷層72係例如設於本體部71的表面的全部。金屬鍍敷層72為用來保護本體部71免於氧化等問題的金屬層。於本實施形態中,金屬鍍敷層72為設於本體部71的表面的阻隔層。
例如本體部71以銅或銅合金形成時,若本體部71在標準狀態下長時間暴露於空氣或濕氣,則有銅成分被氧化的情形。因此,金屬鍍敷層72係設於例如本體部71當中暴露於空氣或濕氣的部分。又,例如,以銅或銅合金形成的構件在以樹脂密封的狀態下長時間使用時,則有與樹脂接觸之金屬表面的銅成分被氧化的情形。因此,金屬鍍敷層72係設於例如本體部71當中至少面向塑模樹脂部80的表面。藉此,可保護面向塑模樹脂部80的本體部71的表面免於氧化等問題。
又,有時銅成分會向樹脂中擴散,而有銅或銅合金與樹脂之間的密接性變差的情形。此種現象可藉由使用100℃以上之溫度及75%以上之濕度的壓力鍋試驗
(PCT)來確認。於本實施形態中,藉由設置金屬鍍敷層72,可抑制本體部71的金屬成分向塑模樹脂部80擴散。
如以上所述,在保護金屬基體11免於各種問題方面,金屬鍍敷層72為有用者。
形成金屬鍍敷層72的金屬為例如具有保護機能(阻隔性)的金屬(i.e.,阻隔金屬)。金屬鍍敷層72係以金屬72m所形成。金屬72m為「第2金屬(i.e.,第2金屬素材、第2素材)」的一例。使用銅或銅合金作為形成本體部71的金屬時,金屬72m係包含例如鎳、鎳合金、鈦、鈦合金、鎢、及鎢合金的至少一種。形成金屬鍍敷層72的金屬72m,其擴散係數係小於形成本體部71的金屬71m(i.e.,亦即不易在樹脂中擴散)。此外,金屬鍍敷層72亦可為具有阻隔層以外之機能的金屬層。例如,金屬鍍敷層72可為以裝飾等為目的而使用的金屬層。
金屬鍍敷層72的厚度為例如0.01μm以上10μm以下。金屬鍍敷層72的厚度若為上述下限值以上,可有效地展現金屬鍍敷層72的保護機能。分子接合層40的厚度若為上述上限值以下,則可抑制金屬鍍敷層72所致之半導體封裝10的厚度的增加。
塑模樹脂部(i.e.,絕緣部)80為「樹脂部」的一例。塑模樹脂部80為用來保護半導體晶片30或接合線60免
於來自外部的壓力、濕氣及汙染物質等的構件。塑模樹脂部80係如第2圖所示,一體被覆金屬基座20、半導體晶片30、黏晶接著層50、導線框70的至少一部分、及接合線60。塑模樹脂部80係形成於分子接合層40上。塑模樹脂部80係以樹脂(i.e.,樹脂素材)80m所形成。樹脂80m只要是具絕緣性之材料即可,不特別限定。樹脂80m為例如熱塑性樹脂或熱硬化性樹脂。作為樹脂80m,可舉出環氧樹脂等。又,樹脂80m中亦可添加熔融球狀二氧化矽等的應力緩和劑作為添加劑。
其次,就分子接合層40加以說明。
本實施形態之半導體封裝10係如第2圖及第3圖所示,具備分子接合層40。分子接合層40係至少設於接合線60的表面與塑模樹脂部80之間。此外,分子接合層40實際上極薄,而為方便說明,於各圖中係以某種程度的厚度表示。
於本實施形態中,分子接合層40係至少包含第1部分41、第2部分42、第3部分43、及第4部分44。
第1部分41係設於接合線60的表面與塑模樹脂部80之間,與接合線60及塑模樹脂部80此兩者形成化學鍵。藉此,第1部分41便將接合線60與塑模樹脂部80接合。
第2部分42係設於導線框70的表面(e.g.,金屬鍍敷層72的表面)與塑模樹脂部80之間,與導線框70(e.g.,金屬鍍敷層72)及塑模樹脂部80此兩者形成化學鍵。藉此,第2部分42便將導線框70(e.g.,金屬鍍敷層72)與塑模樹脂部80接合。
第3部分43係設於半導體晶片30的表面與塑模樹脂部80之間,與半導體晶片30及塑模樹脂部80此兩者形成化學鍵。藉此,第3部分43便將半導體晶片30與塑模樹脂部80接合。
第4部分44係設於金屬基座20的表面與塑模樹脂部80之間,與金屬基座20及塑模樹脂部80此兩者形成化學鍵。藉此,第4部分44便將金屬基座20與塑模樹脂部80接合。
第1部分41、第2部分42、第3部分43、及第4部分44係例如彼此一體(i.e.,連續)地形成。
首先,就分子接合層40的第1部分41詳細加以說明。
本實施形態之分子接合層40係包含以分子接合劑所形成的分子接合體40r(參照第4圖)。分子接合劑為可與例如樹脂及金屬形成化學鍵(e.g.,共價鍵)的化合物。此外,本案中所稱「共價鍵」,係廣泛意指具有共價鍵性
之鍵結,亦包含配位鍵及準共價鍵等。又本案中所稱「分子接合體」,係指分子接合劑在形成化學鍵(i.e.,經化學反應)後餘留於接合部的物質。
作為分子接合劑,可舉出例如三衍生物等的化合物。作為三衍生物,可舉出以下通式(C1)所示之化合物:
(式中,R表示烴基或可中介存在奇特原子或者官能基之烴基,X表示氫原子或烴基,Y表示烷氧基,Z表示可形成鹽之硫醇基、胺基或者疊氮基、或可中介存在奇特原子或者官能基之烴基,n1為1~3為止之整數,n2為1~2為止之整數)。
上述通式(C1)中,R較佳表示碳數1~7之烴基、或氮原子中介存在於此等之主鏈者。X表示碳數1~3之烴基。Y表示碳數1~3之烷氧基。n1較佳為3。n2較佳為2。Z較佳表示可形成鹽之硫醇基、胺基或者疊氮基、或烷基。作為形成鹽之陽離子元素,較佳為鹼金屬,其中
更佳為Li、Na、K或Cs。此外,當n2為2時,至少1個Z較佳表示可形成鹽之硫醇基、胺基或疊氮基。
分子接合層40之第1部分41的至少一部分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於接合線60之金屬60m形成化學鍵(e.g.,共價鍵)。同樣地,分子接合層40之第1部分41的至少一部分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於塑模樹脂部80之樹脂80m形成化學鍵(e.g.,共價鍵)。藉此,接合線60與塑模樹脂部80便經由接合線60與分子接合層40之間的化學鍵、及塑模樹脂部80與分子接合層40之間的化學鍵彼此接合。由此,接合線60與塑模樹脂部80即強固地密接。
第4圖為示意性表示分子接合層40的組成之一例的圖。
如第4圖所示,分子接合層40係包含例如複數個分子接合體40r。分子接合體40r係包含上述之分子接合劑與接合對象物(first member and second member)進行化學反應所形成的分子接合劑殘基。例如,分子接合體40r係包含上述之分子接合劑與接合線60及塑模樹脂部80進行化學反應所形成的分子接合劑殘基。分子接合劑殘基為例如如第4圖所示之三二硫醇殘基。此外,分子接合體
40r亦可包含第4圖中的“S”或“Z”。第4圖中之“Z”的一例為胺基烴矽氧基。
例如,分子接合層40之第1部分41的至少一部分係形成為單分子膜狀。被包含於分子接合層40之第1部分41的至少1個分子接合體40r係與接合線60之金屬60m及塑模樹脂部80之樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。換言之,被包含於分子接合層40之第1部分41的分子接合劑的1分子(e.g.,分子接合體40r)係與接合線60之金屬60m及塑模樹脂部80之樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。
分子接合層40的第2部分42、第3部分43、及第4部分44係具有與第1部分41約略相同的構成。例如,分子接合層40之第2部分42的至少一部分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於導線框70之金屬(i.e.,金屬素材)形成化學鍵(e.g.,共價鍵)。於本實施形態中,分子接合層40之第2部分42的至少一部分係與被包含於導線框70之金屬鍍敷層72的金屬72m形成化學鍵(e.g.,共價鍵)。同樣地,分子接合層40之第2部分42的至少一部分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於塑模樹脂部80之樹脂80m形成化學鍵(e.g.,共價鍵)。藉此,導線
框70與塑模樹脂部80便經由導線框70與分子接合層40之間的化學鍵、及塑模樹脂部80與分子接合層40之間的化學鍵彼此接合。由此,導線框70與塑模樹脂部80即強固地密接。
例如,由阻隔金屬(e.g.,鎳、鎳合金、鈦、鈦合金、鎢、及鎢合金的至少一種)所形成的金屬鍍敷層72可對由例如銅或銅合金所形成的本體部71展現優良的保護機能,但對於塑模樹脂部80無法展現良好的密接性。然而,即使在此種情況下,藉由在金屬鍍敷層72與塑模樹脂部80之間設置分子接合層40,仍可確保金屬鍍敷層72與塑模樹脂部80之間的良好的密接性。
例如,分子接合層40之第2部分42的至少一部分係形成為單分子膜狀。被包含於分子接合層40之第2部分42的至少1個分子接合體40r係與導線框70之金屬鍍敷層72的金屬72m及塑模樹脂部80的樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。換言之,被包含於分子接合層40之第2部分42的分子接合劑的1分子(e.g.,分子接合體40r)係與導線框70之金屬鍍敷層72的金屬72m及塑模樹脂部80的樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。
分子接合層40之第3部分43的至少一部分(i.e.,形
成分子接合層40之分子接合劑的至少一部分)係與被包含於半導體晶片30之矽30m形成化學鍵(e.g.,共價鍵)。同樣地,分子接合層40之第3部分43的至少一部分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於塑模樹脂部80之樹脂80m形成化學鍵(e.g.,共價鍵)。藉此,半導體晶片30與塑模樹脂部80便經由半導體晶片30與分子接合層40之間的化學鍵、及塑模樹脂部80與分子接合層40之間的化學鍵彼此接合。由此,半導體晶片30與塑模樹脂部80即強固地密接。
例如,分子接合層40之第3部分43的至少一部分係形成為單分子膜狀。被包含於分子接合層40之第3部分43的至少1個分子接合體40r係與半導體晶片30的矽30m及塑模樹脂部80的樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。換言之,被包含於分子接合層40之第3部分43的分子接合劑的1分子(e.g.,分子接合體40r)係與半導體晶片30的矽30m與塑模樹脂部80的樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。
分子接合層40之第4部分44的至少一部分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於金屬基座20之金屬20m形成化學鍵(e.g.,共價鍵)。同樣地,分子接合層40之第4部分44的至少一部
分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於塑模樹脂部80之樹脂80m形成化學鍵(e.g.,共價鍵)。藉此,金屬基座20與塑模樹脂部80便經由金屬基座20與分子接合層40之間的化學鍵、及塑模樹脂部80與分子接合層40之間的化學鍵彼此接合。由此,金屬基座20與塑模樹脂部80即強固地密接。
例如,分子接合層40之第4部分44的至少一部分係形成為單分子膜狀。被包含於分子接合層40之第4部分44的至少1個分子接合體40r係與金屬基座20的金屬20m與塑模樹脂部80的樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。換言之,被包含於分子接合層40之第4部分44的分子接合劑的1分子(e.g.,分子接合體40r)係與金屬基座20的金屬20m與塑模樹脂部80的樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。
接合線60、導線框70、半導體晶片30、及金屬基座20的至少1者、與塑模樹脂部80之間的密接強度較佳為2MPa以上,更佳為5MPa以上,再更佳為6MPa以上,再更佳為10MPa以上。密接強度可例如藉由剪斷試驗來測定。作為拉伸試驗的具體例,可舉出SEMIG69-0996所規定的方法。
此外,與金屬60m、金屬72m、矽30m、金屬20m形
成化學鍵(e.g.,共價鍵)的分子接合體40r和與樹脂80m形成化學鍵(e.g.,共價鍵)的分子接合體40r可相同或相異。若1分子的分子接合體40r與金屬60m、金屬72m、矽30m、或金屬20m、及樹脂80m此兩者形成化學鍵(e.g.,共價鍵),則可進一步提高接合線60、導線框70、半導體晶片30、或金屬基座20與塑模樹脂部80的密接性。
分子接合層40的厚度較佳為0.5nm以上20nm以下,更佳為1nm以上10nm以下。分子接合層40的厚度若為上述下限值以上,可進一步提高接合線60、導線框70、半導體晶片30、或金屬基座20與塑模樹脂部80之間的密接性。分子接合層40的厚度若為上述上限值以下,則可減少用於分子接合層40之分子接合劑的量。
較佳的是設於接合線60、導線框70、半導體晶片30、或金屬基座20的表面之分子接合層40的至少一部分為單分子膜狀。例如,較佳的是分子接合層40的30%以上100%以下為單分子膜狀,較佳的是分子接合層40的全部為單分子膜狀。在分子接合層40中形成為單分子膜狀的區域,1分子的分子接合劑係與金屬60m、金屬72m、矽30m、金屬20m、及樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。由此,可進一步提高接合線60、導線框70、
半導體晶片30、或金屬基座20與塑模樹脂部80之間的密接性,同時可將用於分子接合層40之分子接合劑的量減少至最低限度。
分子接合層40對接合線60、導線框70、半導體晶片30、金屬基座20的被覆密度較佳為20面積%以上,更佳為30面積%以上,再更佳為50面積%以上。前述被覆密度若為上述下限值以上,可進一步提高接合線60、導線框70、半導體晶片30、或金屬基座20與塑模樹脂部80之間的密接性。由於前述被覆密度係愈高愈佳,因此其上限值不特別限定。惟,作為被覆密度的上限值,可例示例如70面積%或80面積%。此外,當分子接合層40的被覆密度為100面積%時,係定義為對擬被覆分子接合劑之對象物的表面理論上最密地填充。分子接合劑的被覆密度可由採X光繞射法的測定結果求得。
其次,就本實施形態之半導體封裝10之製造方法加以說明。
半導體封裝10之製造方法的一例係以分子接合劑被覆接合線60、導線框70的金屬鍍敷層72、半導體晶片30、及金屬基座20的表面。藉此,即形成與被包含於接合線60、導線框70的金屬鍍敷層72、半導體晶片30、及金屬基座20之金屬60m、金屬72m、矽30m、金屬
20m形成化學鍵的分子接合層40。其後,透過以樹脂80m被覆分子接合層40的表面,而形成與分子接合層40形成化學鍵的塑模樹脂部80。
第5圖為表示半導體封裝10之製造方法的流程之一例的剖面圖。
於本實施形態中,首先,將黏晶接著層50夾於金屬基座20與半導體晶片30之間而疊合。藉此,半導體晶片30即固定於金屬基座20(第5圖中的(a))。其次,藉由接合線60電性連接半導體晶片30與導線框70(第5圖中的(b))。
其次,透過以分子接合劑被覆接合線60的表面、導線框70的表面、半導體晶片30的表面、及金屬基座20的表面(i.e.,透過塗佈分子接合劑),而形成分子接合層40(第5圖中的(c))。分子接合層40的形成係例如藉由將含有上述之分子接合劑的分子接合劑溶液塗佈於接合線60的表面、導線框70的表面、半導體晶片30的表面、及金屬基座20的表面來進行。作為塗佈分子接合劑溶液之方法的實例,可舉出使接合線60、導線框70、半導體晶片30、及金屬基座20浸漬於分子接合劑溶液中的方法、或、對此等構件噴灑分子接合劑溶液的方法等。於本實施形態中,係對接合線60、導線框70、半導體晶片
30、及金屬基座20約略同時塗佈分子接合劑。此外,所稱「約略同時塗佈」,係指例如在對此等構件分別塗佈分子接合劑之步驟的期間,不存在其他的步驟(e.g.,安裝其他的構件之步驟)之意。以其他觀點觀之,所稱「約略同時塗佈」,係指例如對此等構件連續地塗佈分子接合劑之意。
分子接合劑較佳以分子接合劑溶液的形態使用。分子接合劑溶液可藉由使上述之分子接合劑溶解於溶媒來調製。
作為溶媒,可舉出例如水;甲醇、乙醇、異丙醇、乙二醇、丙二醇、賽璐蘇及卡必醇等的醇類;丙酮、甲基乙基酮及環己酮等的酮類;苯、甲苯及二甲苯等的芳香族烴;己烷、辛烷、癸烷、十二烷及十八烷等的脂肪族烴;乙酸乙酯、丙酸甲酯及鄰苯二甲酸甲酯等的酯類;以及四氫呋喃、乙基丁基醚及苯甲醚等的醚類。又,亦可使用混合有此等溶媒的混合溶媒。
分子接合劑溶液的濃度較佳為0.001質量%以上1質量%以下,更佳為0.01質量%以上0.1質量%以下。分子接合劑溶液的濃度若為上述下限值以上,可透過提高分子接合劑的被覆密度來進一步提高構件間的密接性。分子接合劑溶液的濃度若為上述上限值以下,則可使分子接合劑
穩定地溶解於溶媒。
調製之分子接合劑溶液係塗佈於接合線60、導線框70、半導體晶片30、及金屬基座20的表面。亦可藉由使塗佈有分子接合劑溶液的接合線60、導線框70、半導體晶片30、及金屬基座20靜置,來進行接合線60的金屬60m、導線框70的金屬72m、半導體晶片30的矽30m、及金屬基座20的金屬20m與分子接合劑的化學鍵(e.g.,共價鍵)形成。再者,亦可進行對分子接合層40施加能量(e.g.,熱或光(e.g.,紫外線))之操作。藉由施加能量之操作,亦可進一步促進分子接合劑與上述各構件的素材之間的化學鍵(e.g.,共價鍵)形成。作為外部能量的施加方法,可舉出例如加熱及照射紫外線。使用熱時,可進行5分鐘以上,較佳為60分鐘以上,更佳為80分鐘以上、又120分鐘以上,較佳為240分鐘以下之150~200℃左右的加熱。例如,可根據分子接合層的素材而由5分~120分鐘、60分~240分鐘,較佳為80分~240分鐘等選擇。又,照射之紫外線的波長較佳為250nm以下;照射時間係依據分子接合劑溶液的塗佈量來適宜決定。其後,亦可藉由將塗佈有分子接合劑的構件洗淨,接著使其乾燥,來去除剩餘的分子接合劑或溶液。例如藉由去除剩餘的分子接合劑,分子接合層40即形成為單分子膜狀。洗
淨液可選自例如與用於分子接合劑溶液的上述溶媒相同者。乾燥可於150℃~200℃進行。藉由此等操作,接合線60、導線框70、半導體晶片30、及金屬基座20的表面即經分子接合劑(e.g.,分子接合體40r)被覆。亦即,形成與被包含於接合線60、導線框70、半導體晶片30、及金屬基座20之素材形成化學鍵(e.g.,共價鍵)的分子接合層40。此外,在本實施形態的情況下,施加熱作為外部能量之操作,亦可藉由將作為形成塑模樹脂部80的樹脂80m之經加熱的熱硬化性樹脂供給至接合線60、導線框70、半導體晶片30、及金屬基座20的周圍來進行。
分子接合層40的厚度可根據分子接合劑溶液的濃度及塗佈量、以及洗淨的時間及次數等條件來調節。
其次,對分子接合層40的表面供給形成塑模樹脂部80的樹脂80m。亦即,供給樹脂80m而被覆接合線60、導線框70的至少一部分、半導體晶片30、及金屬基座20。藉此,樹脂80m便與分子接合層40相接。由此,樹脂80m與分子接合層40即形成化學鍵(e.g.,共價鍵)。例如,樹脂80m係在較高溫的狀態下供給而被覆接合線60、導線框70的至少一部分、半導體晶片30、及金屬基座20。藉此,可促進樹脂80m與分子接合層40的化學鍵(e.g.,共價鍵)形成。由此,即形成藉由分子接合層40
與接合線60、導線框70的至少一部分、半導體晶片30、及金屬基座20接合的塑模樹脂部80(第5圖中的(d))。此外,樹脂80m的供給方法不特別限定,可使用周知之各種方法。作為樹脂80m的供給方法,可舉出例如轉注成形及壓縮成形。
此外,分子接合劑的化學鍵(e.g.,共價鍵)形成亦可在不施加熱或光等的能量下進行。相反地,分子接合劑的化學鍵(e.g.,共價鍵)形成也可藉由施加熱或光等的能量來進行。
其後,進行例如後硬化、搪磨、外裝電鍍、單片化等步驟,即完成半導體封裝10。
此處作為比較例,為提高導線框70對塑模樹脂部80的密接性,而考量對導線框70之金屬鍍敷層72的表面事先進行化學塗佈處理。然而,在包含晶粒接合或打線接合的安裝步驟中,要施加150℃至400℃的熱負載。因此,藉由前述塗佈處理所形成的塗層有可能因熱負載而劣化或分解。又,對導線框70實施化學塗佈處理時,有時會阻礙晶粒接合或打線接合之步驟。
另一方面,根據如本實施形態之分子接合層40,縱使經受安裝步驟的熱負載,分子接合層40也不易發生劣化或分解。因此,藉由分子接合層40,可確保導線框70
之金屬鍍敷層72與塑模樹脂部80之間的密接性。又,分子接合劑的塗佈係於晶粒接合或打線接合之步驟後進行。因此,分子接合層40不會阻礙晶粒接合或打線接合之步驟。
其次,就本實施形態的數個變形例加以說明。
第6圖為表示第1變形例之半導體封裝10的剖面圖。
如第6圖所示,導線框70係具有向塑模樹脂部80的外部突出的第1部分75、與經塑模樹脂部80被覆的第2部分76。
於本變形例中,分子接合層40,對於導線框70,係僅設於導線框70之第2部分76的表面。亦即,分子接合層40未設於導線框70之第1部分75的表面。此種構成係藉由在以遮罩被覆例如導線框70之第1部分75的狀態下塗佈分子接合劑而形成。
根據此種構成,塑模樹脂部80的毛邊等不易黏附於導線框70的第1部分75。因此,容易去除塑模樹脂部80的毛邊等。
第7圖為表示第2變形例之半導體封裝10的剖面圖。
如第7圖所示,於本實施形態中,導線框70的表面
(e.g.,金屬鍍敷層72的表面)係以例如蝕刻等經粗面化。例如,導線框70的表面粗糙度,以算術平均粗糙度Ra計為0.1μm以上。算術平均粗糙度Ra係由例如日本工業規格(JIS)定義。
根據此種構成,藉由分子接合層40所產生之接合效果、與經粗化之表面的錨定效應所產生的複合效果,可進一步提高導線框70與塑模樹脂部80之間的接合強度。
其次,參照第8圖,就第2實施形態加以說明。本實施形態與第1實施形態的不同點在於,半導體封裝10具有基板90來替代金屬基座20等。此外,除以下所說明以外的構成係與第1實施形態相同。
第8圖為表示本實施形態之半導體封裝10的剖面圖。
如第8圖所示,半導體封裝10係具備基板90、半導體晶片30、分子接合層40、黏晶接著層50、接合線60、與塑模樹脂部80。
基板(e.g.,插入基板)90為「基座」的另一例。基板90係以例如樹脂(i.e.,合成樹脂樹脂)或陶瓷等形成。於本實施形態中,半導體晶片30係載置於基板90上。基板
90係具有導電墊片(i.e.,連接部、電性連接部、端子)91、複數個焊料連接部(i.e.,外部連接端子)92、與電性連接導電墊片91及焊料連接部92的配線圖型。接合線60係設於基板90的導電墊片91與半導體晶片30的導電墊片31之間。基板90的導電墊片91係以塑模樹脂部80被覆。基板90的導電墊片91為「導電部」的一例。黏晶接著層50係設於基板90與半導體晶片30之間。
於本實施形態中,分子接合層40係設於接合線60的表面、基板90之導電墊片91的表面、面向塑模樹脂部80之基板90的表面、及半導體晶片30的表面。分子接合層40係將接合線60、基板90的導電墊片91、基板90、及半導體晶片30、與塑模樹脂部80接合。
例如,分子接合層40係具有第1部分41、第2部分42、及第3部分43。第1部分41及第3部分43係與第1實施形態中的第1部分41及第3部分43約略相同。本實施形態之第2部分42係設於導電墊片91的表面與塑模樹脂部80之間,與導電墊片91及塑模樹脂部80此兩者形成化學鍵。藉此,第2部分42便將導電墊片91與塑模樹脂部80接合。例如,分子接合層40之第2部分42的至少一部分(i.e.,形成分子接合層40之分子接合劑的至少一部分)係與被包含於導電墊片91之金屬91m形成化學
鍵(e.g.,共價鍵)。例如,被包含於分子接合層40之第2部分42的分子接合劑的1分子(e.g.,分子接合體40r)係與導電墊片91的金屬91m及塑模樹脂部80的樹脂80m此兩者形成化學鍵(e.g.,共價鍵)。
其次,參照第9圖,就第3實施形態加以說明。本實施形態與第1實施形態的不同點在於,金屬鍍敷72僅設於金屬零件100的其中一表面等。此外,除以下所說明以外的構成係與第1實施形態相同。
第9圖為表示第3實施形態之半導體封裝10的一部分的剖面圖。
如第9圖所示,本實施形態之半導體封裝10,樹脂層110係經由分子接合層40接合於金屬零件(i.e.,金屬構件、金屬基材)100中與樹脂層120相反之一側的面。亦即,金屬零件100的其中一面係以樹脂層(i.e.,樹脂部、絕緣部)110被覆,金屬零件100的另一面則以樹脂層(i.e.,樹脂部、絕緣部)120被覆。又,藉由分子接合層40可提高金屬零件100與樹脂層110之間(e.g.,金屬鍍敷層72與樹脂層110之間)的密接性。其結果,可有效地保護金屬零件100免於來自外部的壓力、濕氣及汙染
物質等。
作為第3實施形態之半導體封裝10之製造方法,可採用第1實施形態之半導體封裝10之製造方法。在半導體封裝10之製造方法中,係對金屬零件100之金屬鍍敷層72的表面及其相反側的表面塗佈分子接合劑溶液,而形成分子接合層40。其次,對分子接合層40的表面塗佈供形成樹脂層110,120的樹脂110m,120m而成膜。如此,即可製造第2實施形態之半導體封裝10。
其次,參照第10圖,就第4實施形態加以說明。本實施形態與第3實施形態的不同點在於,金屬鍍敷層72,72A係設於金屬零件100的兩面等。此外,除以下所說明以外的構成係與第3實施形態相同。
第10圖為表示第4實施形態之半導體封裝10的一部分的剖面圖。如第10圖所示,本實施形態之半導體封裝10係於金屬零件100之本體部71中與金屬鍍敷層72相反之一側的面層合金屬鍍敷層72A、分子接合層40及樹脂層120。金屬鍍敷層72A為與金屬鍍敷層72約略相同的鍍敷層。亦即,在半導體封裝10之金屬零件100中與金屬鍍敷層72相反之一側的面設有金屬鍍敷層72A。金
屬鍍敷層72A的表面係經由分子接合層40接合樹脂層120。亦即,金屬零件100的其中一面係以金屬鍍敷層72及樹脂層110被覆,金屬零件100的另一面則以金屬鍍敷層72A及樹脂層120被覆。從而,可涵蓋金屬零件100表面的廣泛範圍地展現金屬鍍敷層72、72A所衍生的保護機能與樹脂層110、120所衍生的保護機能此兩者。
作為第4實施形態之半導體封裝10之製造方法,可採用第1實施形態之半導體封裝10之製造方法。在半導體封裝10之製造方法中,首先,準備具備設於金屬零件100的其中一面之金屬鍍敷層72、與設於金屬零件100的另一面之金屬鍍敷層72A的金屬零件100。其次,對金屬零件100之金屬鍍敷層72,72A的表面塗佈分子接合劑溶液,而形成分子接合層40。其次,對分子接合層40的表面塗佈供形成樹脂層110,120的樹脂110m,120m而成膜。如此,即可製造第4實施形態之半導體封裝10。
以上,已就數個實施形態之半導體封裝10及半導體封裝10之製造方法加以說明。惟,實施形態之構成非限定於上述例。例如,導線框70也可不具有金屬鍍敷層72。亦即,導線框70全體亦能以本體部71的金屬71m(e.g.,銅或銅合金)形成。此時,金屬71m為「第2金屬(i.e.,第2金屬素材、第2素材)」的一例。亦即,分子
接合層40的至少一部分亦可與被包含於導線框70之金屬71m形成化學鍵(e.g.,共價鍵)。根據此種構成,亦可提高導線框70與塑模樹脂部80之間的密接性。此外,「第2金屬」可與「第1金屬」相同或相異。
又,以其他的觀點觀之,半導體封裝10亦可於接合線60的表面不具有分子接合層40。一觀點之半導體封裝係具備導電部、分子接合層、與樹脂部。前述導電部係於導電部的表面具有金屬鍍敷層。前述分子接合層係設於前述金屬鍍敷層的表面。前述樹脂部係藉由前述分子接合層與前述金屬鍍敷層接合。前述分子接合層的至少一部分係與被包含於前述金屬鍍敷層之金屬形成化學鍵。前述分子接合層的至少一部分係與被包含於前述樹脂部之樹脂形成化學鍵。亦即,半導體封裝10,只要具有例如至少設於金屬鍍敷層72與塑模樹脂部80之間的分子接合層40即可。此種半導體封裝10之製造方法,例如,亦可在設置接合線60前,對導線框70單質塗佈分子接合劑。藉此,亦可於導線框70的表面形成分子接合層40。而且,其後,亦可對形成有分子接合層40的導線框70連接接合線60。
根據以上所說明之至少一實施形態,可提供一種可藉由分子接合層提升接合線與塑模樹脂部之密接性的半導體
封裝。
又,以其他的觀點觀之,根據以上所說明之至少一實施形態,可提供一種可藉由分子接合層提升金屬鍍敷層與樹脂部之密接性的半導體封裝。
以下附記數個半導體封裝、及半導體封裝之製造方法的實例:
[1]一種半導體封裝,其係具備:金屬零件,係具備金屬基體與設於前述金屬基體之至少其中一面的金屬鍍敷層;分子接合層,係設於前述金屬零件之至少前述金屬鍍敷層的表面;及樹脂層,係藉由前述分子接合層與前述金屬零件接合;前述分子接合層係包含分子接合劑,前述分子接合劑的至少一部分係與被包含於前述金屬鍍敷層之金屬形成共價鍵,前述分子接合劑的至少一部分係與被包含於前述樹脂層之樹脂形成共價鍵。
[2]如[1]之半導體封裝,其中前述分子接合層中之前述分子接合劑相對於前述金屬零件的被覆密度為20面積%以上80面積%以下。
[3]如[1]之半導體封裝,其中前述分子接合層的至少一部分為單分子膜狀,前述分子接合劑的至少一部分係與前述金屬及前述樹脂此兩者形成共價鍵。
[4]如[1]之半導體封裝,其中前述金屬基體係含有銅或銅合金。
[5]如[1]之半導體封裝,其中前述金屬鍍敷層係含有鎳或鎳合金。
[6]如[1]之半導體封裝,其中前述樹脂層為包含環氧樹脂的塑模樹脂。
[7]如[1]之半導體封裝,其中前述金屬零件為作為前述半導體封裝之內部配線的導線框。
[8]如[1]之半導體封裝,其中前述分子接合劑為三衍生物。
[9]如[8]之半導體封裝,其中前述三衍生物為通式(C1)所示之化合物;
(式中,R表示烴基或可中介存在奇特原子或者官能基之烴基,X表示氫原子或烴基,Y表示烷氧基,Z表示可形成鹽之硫醇基、胺基或者疊氮基、或可中介存在奇特原子或者官能基之烴基,n1為1~3為止之整數,n2為1~2為止之整數)。
[10]一種半導體封裝之製造方法,其係藉由將具備金屬基體、與設於前述金屬基體之至少其中一面的金屬鍍敷層的金屬零件之至少前述金屬鍍敷層的表面,以分子接合劑被覆,而形成包含與被包含於前述金屬鍍敷層之金屬形成共價鍵的前述分子接合劑之分子接合層,藉由將前述分子接合層的表面以樹脂被覆,而形成包含與前述分子接合劑形成共價鍵的前述樹脂之樹脂層。
[11]如[10]之半導體封裝之製造方法,其中藉由將前述金屬鍍敷層的表面之前述分子接合層的至少一部分形成為單分子膜狀,而使前述分子接合劑的至少一部分與前述金屬及前述樹脂此兩者形成共價鍵。
[12]如[10]之半導體封裝之製造方法,其中前述金屬基體係含有銅或銅合金。
[13]如[10]之半導體封裝之製造方法,其中前述金屬鍍敷層係含有鎳或鎳合金。
[14]如[10]之半導體封裝之製造方法,其中前述樹脂
層為包含環氧樹脂的塑模樹脂。
[15]如[10]之半導體封裝之製造方法,其中前述金屬零件為作為前述半導體封裝之內部配線的導線框。
[16]如[10]之半導體封裝之製造方法,其中前述分子接合劑為三衍生物。
[17]如[16]之半導體封裝之製造方法,其中前述三衍生物為通式(C1)所示之化合物;
(式中,R表示烴基或可中介存在奇特原子或者官能基之烴基,X表示氫原子或烴基,Y表示烷氧基,Z表示可形成鹽之硫醇基、胺基或者疊氮基、或可中介存在奇特原子或者官能基之烴基,n1為1~3為止之整數,n2為1~2為止之整數)。
既已說明數個實施形態,惟此等實施形態係僅作為例子而提出者,並非意圖限定發明之範圍。此等實施形態能以其他的各種形態實施,在不悖離發明要旨的範圍內,可進行各種省略、更換、變更。此等實施形態及其變形係與
包被包含於發明之範圍及要旨相同,亦包被包含於申請專利範圍所記載之發明及其等效的範圍內。
Claims (17)
- 一種半導體封裝,其係具備:半導體晶片;導電部;接合線,係設於前述半導體晶片與前述導電部之間;塑模樹脂部,係被覆前述半導體晶片、前述導電部的至少一部分、及前述接合線;及分子接合層,係至少設於前述接合線的表面與前述塑模樹脂部之間;前述分子接合層包含下述通式(C1)所示之三衍生物,前述分子接合層的至少一部分係與被包含於前述接合線之第1金屬形成化學鍵,前述分子接合層的至少一部分係與被包含於前述塑模樹脂部之樹脂形成化學鍵;式中,R表示烴基或可中介存在奇特原子或者官能基之烴基,X表示氫原子或烴基,Y表示烷氧基,Z表示可形成鹽之硫醇基、胺基或者疊氮基、或可中介存在奇特原子或者官能基之烴基,n1為1~3為止之整數,n2為1~2為止之整數。
- 如請求項1之半導體封裝,其中前述分子接合層係包含與前述接合線之前述第1金屬及前述塑模樹脂部之前述樹脂此兩者形成共價鍵的分子接合體。
- 如請求項1之半導體封裝,其中前述分子接合層係具有:第1部分,係設於前述接合線的表面與前述塑模樹脂部之間而與前述接合線及前述塑模樹脂部此兩者形成化學鍵;及第2部分,係設於前述導電部的表面與前述塑模樹脂部之間而與前述導電部及前述塑模樹脂部此兩者形成化學鍵。
- 如請求項3之半導體封裝,其中前述導電部係於此導電部的表面包含金屬鍍敷層,前述分子接合層的至少一部分係與被包含於前述金屬鍍敷層之第2金屬及被包含於前述塑模樹脂部之前述樹脂此兩者形成化學鍵。
- 如請求項4之半導體封裝,其中前述導電部係進一步具有以第3金屬所形成的導電部本體,前述金屬鍍敷層為設於前述導電部本體的表面的阻隔層。
- 如請求項5之半導體封裝,其中前述第2金屬其擴散係數係小於前述第3金屬。
- 如請求項5之半導體封裝,其中前述第2金屬係包含鎳、鎳合金、鈦、鈦合金、鎢、及鎢合金的至少1種。
- 如請求項4之半導體封裝,其中前述導電部為至少一部分突出至前述塑模樹脂部的外部的導線框。
- 如請求項3之半導體封裝,其中前述導電部為前述半導體封裝之基板的導電墊片。
- 如請求項1之半導體封裝,其中前述分子接合層係包含三二硫醇殘基。
- 如請求項1之半導體封裝,其中前述分子接合層的至少一部分為單分子膜狀。
- 一種半導體封裝,其係具備:導電部,係於表面具有金屬鍍敷層;分子接合層,係設於前述金屬鍍敷層的表面;及樹脂部,係藉由前述分子接合層與前述金屬鍍敷層接合;前述分子接合層包含下述通式(C1)所示之三衍生物,前述分子接合層的至少一部分係與被包含於前述金屬鍍敷層之金屬形成化學鍵,前述分子接合層的至少一部分係與被包含於前述樹脂部之樹脂形成化學鍵;式中,R表示烴基或可中介存在奇特原子或者官能基之烴基,X表示氫原子或烴基,Y表示烷氧基,Z表示可形成鹽之硫醇基、胺基或者疊氮基、或可中介存在奇特原子或者官能基之烴基,n1為1~3為止之整數,n2為1~2為止之整數。
- 一種半導體封裝之製造方法,其係藉由接合線電性連接半導體晶片與導電部,藉由至少在前述接合線的表面塗佈包含下述通式(C1)所示之三衍生物之分子接合劑而形成分子接合層,藉由供給至少(at least by)被覆前述半導體晶片、前述導電部的至少一部分、及前述接合線的樹脂,而形成藉由前述分子接合層與至少前述接合線接合的塑模樹脂部;式中,R表示烴基或可中介存在奇特原子或者官能基之烴基,X表示氫原子或烴基,Y表示烷氧基,Z表示可形成鹽之硫醇基、胺基或者疊氮基、或可中介存在奇特原子或者官能基之烴基,n1為1~3為止之整數,n2為1~2為止之整數。
- 如請求項13之半導體封裝之製造方法,其中前述分子接合劑可與金屬及樹脂此兩者形成化學鍵。
- 如請求項13之半導體封裝之製造方法,其中將前述接合線的表面之前述分子接合層的至少一部分形成為單分子膜狀。
- 如請求項13之半導體封裝之製造方法,其中在與將前述分子接合層劑塗佈於前述打線接合的表面約略同時,亦塗佈於前述導電部的表面。
- 如請求項16之半導體封裝之製造方法,其中在與將前述分子接合層劑塗佈於前述打線接合的表面及前述導電部的表面約略同時,亦塗佈於前述半導體晶片的表面。
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WO2012046651A1 (ja) * | 2010-10-04 | 2012-04-12 | 株式会社いおう化学研究所 | 金属膜形成方法、及び金属膜を有する製品 |
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TW201117337A (en) * | 2009-06-18 | 2011-05-16 | Rohm Co Ltd | Semiconductor device |
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