TWI630857B - Substrate manufacturing method and laser processing device - Google Patents

Substrate manufacturing method and laser processing device Download PDF

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Publication number
TWI630857B
TWI630857B TW105117381A TW105117381A TWI630857B TW I630857 B TWI630857 B TW I630857B TW 105117381 A TW105117381 A TW 105117381A TW 105117381 A TW105117381 A TW 105117381A TW I630857 B TWI630857 B TW I630857B
Authority
TW
Taiwan
Prior art keywords
surface layer
layer
substrate
hole
film
Prior art date
Application number
TW105117381A
Other languages
English (en)
Chinese (zh)
Other versions
TW201701741A (zh
Inventor
礒圭二
Original Assignee
住友重機械工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 住友重機械工業股份有限公司 filed Critical 住友重機械工業股份有限公司
Publication of TW201701741A publication Critical patent/TW201701741A/zh
Application granted granted Critical
Publication of TWI630857B publication Critical patent/TWI630857B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047Drilling of holes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H01L21/02288Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating printing, e.g. ink-jet printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/7687Thin films associated with contacts of capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • H01L21/76894Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
TW105117381A 2015-06-03 2016-06-02 Substrate manufacturing method and laser processing device TWI630857B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-112762 2015-06-03
JP2015112762A JP6501627B2 (ja) 2015-06-03 2015-06-03 レーザ加工装置

Publications (2)

Publication Number Publication Date
TW201701741A TW201701741A (zh) 2017-01-01
TWI630857B true TWI630857B (zh) 2018-07-21

Family

ID=57575233

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105117381A TWI630857B (zh) 2015-06-03 2016-06-02 Substrate manufacturing method and laser processing device

Country Status (4)

Country Link
JP (1) JP6501627B2 (ko)
KR (1) KR101840932B1 (ko)
CN (1) CN106255319B (ko)
TW (1) TWI630857B (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7154147B2 (ja) * 2019-01-31 2022-10-17 京セラ株式会社 印刷配線板の製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070054216A1 (en) * 2005-09-02 2007-03-08 Konica Minolta Medical & Graphic, Inc. Near-infrared ray absorbing material and production method of the same
TWI481325B (zh) * 2012-03-09 2015-04-11 Mitsui Mining & Smelting Co 印刷配線板的製造方法及雷射加工用銅箔

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4078715B2 (ja) * 1998-06-02 2008-04-23 三菱瓦斯化学株式会社 信頼性に優れたビア孔の形成方法
SK13472001A3 (sk) * 1999-03-23 2002-04-04 Circuit Foil Luxembourg Trading S. A. R. L. Spôsob výroby viacvrstvovej platne stlačenými spojmi a kompozitnej fólie použitej v tejto doske
JP2001144411A (ja) * 1999-09-03 2001-05-25 Mec Kk プリント配線板の孔あけ法およびそれに用いる表面処理剤
JP2003248207A (ja) * 2002-02-22 2003-09-05 Fujitsu Display Technologies Corp 液晶表示パネルの製造方法および製造装置
JP2006202840A (ja) * 2005-01-18 2006-08-03 Seiko Epson Corp 配線基板の製造方法
JP2011171724A (ja) * 2010-01-19 2011-09-01 Shibaura Mechatronics Corp 基板の配線修正方法、基板の配線修正装置及び基板の配線形成装置
JP2014143237A (ja) * 2013-01-22 2014-08-07 Toppan Printing Co Ltd ビアホールの形成方法及び多層プリント配線板の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070054216A1 (en) * 2005-09-02 2007-03-08 Konica Minolta Medical & Graphic, Inc. Near-infrared ray absorbing material and production method of the same
TWI481325B (zh) * 2012-03-09 2015-04-11 Mitsui Mining & Smelting Co 印刷配線板的製造方法及雷射加工用銅箔

Also Published As

Publication number Publication date
CN106255319B (zh) 2019-03-08
JP6501627B2 (ja) 2019-04-17
KR101840932B1 (ko) 2018-03-21
TW201701741A (zh) 2017-01-01
KR20160142779A (ko) 2016-12-13
JP2016225554A (ja) 2016-12-28
CN106255319A (zh) 2016-12-21

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MM4A Annulment or lapse of patent due to non-payment of fees