TWI613661B - 用於補償快閃裝置之標稱電壓變化之系統及方法 - Google Patents

用於補償快閃裝置之標稱電壓變化之系統及方法 Download PDF

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Publication number
TWI613661B
TWI613661B TW103100934A TW103100934A TWI613661B TW I613661 B TWI613661 B TW I613661B TW 103100934 A TW103100934 A TW 103100934A TW 103100934 A TW103100934 A TW 103100934A TW I613661 B TWI613661 B TW I613661B
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TW
Taiwan
Prior art keywords
voltage
sign
readings
nominal
read
Prior art date
Application number
TW103100934A
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English (en)
Chinese (zh)
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TW201440060A (zh
Inventor
阿比戴爾 哈金Ｓ 阿爾胡席恩
吳運祥
艾瑞希Ｆ 哈拉曲
賈麥爾 里阿尼
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Lsi公司
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Publication date
Application filed by Lsi公司 filed Critical Lsi公司
Publication of TW201440060A publication Critical patent/TW201440060A/zh
Application granted granted Critical
Publication of TWI613661B publication Critical patent/TWI613661B/zh

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
TW103100934A 2013-02-01 2014-01-10 用於補償快閃裝置之標稱電壓變化之系統及方法 TWI613661B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/757,027 2013-02-01
US13/757,027 US8879324B2 (en) 2013-02-01 2013-02-01 Compensation loop for read voltage adaptation

Publications (2)

Publication Number Publication Date
TW201440060A TW201440060A (zh) 2014-10-16
TWI613661B true TWI613661B (zh) 2018-02-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW103100934A TWI613661B (zh) 2013-02-01 2014-01-10 用於補償快閃裝置之標稱電壓變化之系統及方法

Country Status (6)

Country Link
US (1) US8879324B2 (enExample)
EP (1) EP2763140A2 (enExample)
JP (1) JP6556423B2 (enExample)
KR (1) KR102180452B1 (enExample)
CN (1) CN103971723B (enExample)
TW (1) TWI613661B (enExample)

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US9286155B1 (en) * 2013-05-24 2016-03-15 Marvell International Ltd. Systems and methods for generating soft information in a flash device
US9633740B1 (en) * 2016-02-11 2017-04-25 Seagate Technology Llc Read retry operations where likelihood value assignments change sign at different read voltages for each read retry
US9818488B2 (en) * 2015-10-30 2017-11-14 Seagate Technology Llc Read threshold voltage adaptation using bit error rates based on decoded data
US9720754B2 (en) 2014-11-20 2017-08-01 Western Digital Technologies, Inc. Read level grouping for increased flash performance
US9576671B2 (en) 2014-11-20 2017-02-21 Western Digital Technologies, Inc. Calibrating optimal read levels
US9905302B2 (en) 2014-11-20 2018-02-27 Western Digital Technologies, Inc. Read level grouping algorithms for increased flash performance
KR102253592B1 (ko) * 2014-12-23 2021-05-18 삼성전자주식회사 초기 문턱 전압 분포 변화를 보상할 수 있는 데이터 저장 장치, 이의 작동 방법, 및 이를 포함하는 데이터 처리 시스템
GB2537484B (en) * 2015-03-20 2019-07-03 HGST Netherlands BV Read level grouping for increased flash performance
US10324648B1 (en) 2016-04-28 2019-06-18 Seagate Technology Llc Wear-based access optimization
US9971646B2 (en) 2016-06-01 2018-05-15 Apple Inc. Reading-threshold setting based on data encoded with a multi-component code
US10120585B2 (en) * 2016-08-10 2018-11-06 SK Hynix Inc. Memory system of optimal read reference voltage and operating method thereof
JP6659494B2 (ja) * 2016-08-19 2020-03-04 キオクシア株式会社 半導体記憶装置及びメモリシステム
US9953709B2 (en) 2016-09-06 2018-04-24 Toshiba Memory Corporation Semiconductor memory device and memory system
KR20180051272A (ko) * 2016-11-08 2018-05-16 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
CN110299177B (zh) * 2019-07-04 2021-01-19 合肥联诺科技有限公司 一种减小读操作电压抖动的电荷补偿电路及存储器结构
US11587627B2 (en) * 2021-04-16 2023-02-21 Micron Technology, Inc. Determining voltage offsets for memory read operations

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US20060034121A1 (en) * 2003-09-17 2006-02-16 Shahzad Khalid Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
US20110041005A1 (en) * 2009-08-11 2011-02-17 Selinger Robert D Controller and Method for Providing Read Status and Spare Block Management Information in a Flash Memory System
US20120008401A1 (en) * 2010-07-06 2012-01-12 Michael Katz Systems and methods for storing, retrieving, and adjusting read thresholds in flash memory storage system
US20120134213A1 (en) * 2010-11-25 2012-05-31 Samsung Electronics Co., Ltd. Method compensation operating voltage, flash memory device, and data storage device

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KR100408688B1 (ko) * 2001-10-23 2003-12-06 주식회사 하이닉스반도체 연산증폭기의 오프셋 전압을 보상하는 회로
EP2067143B1 (en) * 2006-09-27 2014-01-08 SanDisk Technologies Inc. Memory with cell population distribution assisted read margining
KR100888842B1 (ko) * 2007-06-28 2009-03-17 삼성전자주식회사 읽기 전압을 최적화할 수 있는 플래시 메모리 장치 및그것의 독출 전압 설정 방법
US8117375B2 (en) * 2007-10-17 2012-02-14 Micron Technology, Inc. Memory device program window adjustment
WO2010039866A1 (en) * 2008-09-30 2010-04-08 Lsi Corporation Methods and apparatus for soft data generation for memory devices
JP4818381B2 (ja) * 2009-03-02 2011-11-16 株式会社東芝 半導体メモリ装置
KR101027501B1 (ko) * 2009-07-10 2011-04-06 쓰리에이로직스(주) Ｒｆ 리더, 이의 오프셋 전압 보상 방법 및 이를 포함하는 ｒｆ 시스템
US8077515B2 (en) * 2009-08-25 2011-12-13 Micron Technology, Inc. Methods, devices, and systems for dealing with threshold voltage change in memory devices
KR101618311B1 (ko) * 2010-02-08 2016-05-04 삼성전자주식회사 플래시 메모리 장치 및 그것의 읽기 방법
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Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
US20060034121A1 (en) * 2003-09-17 2006-02-16 Shahzad Khalid Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
US20110041005A1 (en) * 2009-08-11 2011-02-17 Selinger Robert D Controller and Method for Providing Read Status and Spare Block Management Information in a Flash Memory System
US20120008401A1 (en) * 2010-07-06 2012-01-12 Michael Katz Systems and methods for storing, retrieving, and adjusting read thresholds in flash memory storage system
US20120134213A1 (en) * 2010-11-25 2012-05-31 Samsung Electronics Co., Ltd. Method compensation operating voltage, flash memory device, and data storage device

Also Published As

Publication number Publication date
CN103971723A (zh) 2014-08-06
US20140219028A1 (en) 2014-08-07
US8879324B2 (en) 2014-11-04
JP6556423B2 (ja) 2019-08-07
KR20140099196A (ko) 2014-08-11
CN103971723B (zh) 2017-07-11
KR102180452B1 (ko) 2020-11-18
TW201440060A (zh) 2014-10-16
JP2014149906A (ja) 2014-08-21
EP2763140A2 (en) 2014-08-06

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