TWI609415B - 半導體裝置電極的製造方法 - Google Patents

半導體裝置電極的製造方法 Download PDF

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TWI609415B
TWI609415B TW105119284A TW105119284A TWI609415B TW I609415 B TWI609415 B TW I609415B TW 105119284 A TW105119284 A TW 105119284A TW 105119284 A TW105119284 A TW 105119284A TW I609415 B TWI609415 B TW I609415B
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film
metal
electrode
telluride
semiconductor device
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大見俊一郎
政広泰
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國立大學法人東京工業大學
田中貴金屬工業股份有限公司
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Description

半導體裝置電極的製造方法
本發明係關於一種用於在金氧半場效電晶體(MOSFET)等半導體裝置中，製造矽化物電極的方法。
金氧半場效電晶體等半導體裝置中，在矽基板上形成閘極電極與源極/汲極區域，然後為了形成金屬/半導體接合而在前述源極/汲極區域形成矽化物電極。矽化物電極之製造係在基板上以濺鍍法等蒸鍍金屬薄膜後，進行熱處理，使矽擴散於金屬薄膜並矽化而形成。關於矽化物電極之構成，過去一般習知有矽化鈦(TiSi2)及矽化鈷(CoSi2)。再者，為了因應裝置的微細化、薄型化，而使用矽化鎳(NiSi)，作為在源極/汲極區域之接合深度可極淺化而矽消耗量少的矽化物。進一步也期待在矽化時之熱處理中不致發生相轉移的矽化鉑(PtSi)。
如上述，在製造矽化物電極時，需要形成鎳等矽化金屬薄膜，並加以熱處理。雖然該熱處理溫度依金屬而定，不過大致為300℃以上至600℃程度。因而，在熱處理過程，隨著矽化的進行，有可能該金屬因氧化而形成絕緣膜。再者，起因於該金屬氧化，也可能導致矽化物電極之表面形態惡化，而有使電阻上昇的疑慮。
為了抑制製造矽化物電極時形成絕緣膜及矽化物膜的形態 惡化，過去曾提出在熱處理前，於矽化金屬(第一金屬)之薄膜上形成其他金屬(第二金屬)的化合物膜，來抑制第一金屬氧化的方法(以下，有時將該第二金屬之化合物膜稱為覆蓋層(Cap層))。具備作為覆蓋層的有效性金屬化合物，迄今報告有氮化鈦(TiN)、碳化鈦(TiC)等。
【先前技術文獻】 【專利文獻】
[專利文獻1]日本特開平7-38104號公報
[專利文獻2]日本特開平9-153616號公報
近年來在半導體裝置的設計上，因應微細化、薄型化的要求更高，矽化物電極也需要跟隨該趨勢。因而，謀求減低第一金屬之膜厚及縮小接觸區域，不過在此種情況下，為了達到矽化物電極之低電阻化及平坦化，還需要提高覆蓋層之能障能力。
本發明係在上述背景下形成者，關於在矽基板上形成矽化物電極之方法，提供一種可更有效抑制矽化時所形成之第一金屬薄膜因氧化而形成絕緣膜、及表面形態的變化。
本發明人為了解決上述問題，就用於保護第一金屬之覆蓋層的構成材料進行檢討。結果發現鉿(Hf)作為第二金屬特別有效，因而想到本發明。
亦即，本發明之半導體裝置電極的製造方法，其特徵為包含 以下工序：在包含矽(Si)之基板上形成由第一金屬構成的第一薄膜；在前述第一薄膜上形成由第二金屬化合物構成之第二薄膜；及藉由熱處理而形成由第一金屬之矽化物構成的電極；其中前述第二金屬採用鉿(Hf)。以下說明本發明之半導體裝置電極的製造方法。
用於製造矽化物電極之第一金屬的薄膜形成於基板之矽部分上。假設應用矽化物電極之金氧半場效電晶體通常係使用矽基板作為裝置的基板，且為了形成源極/汲極，會在對應之區域摻雜摻雜劑形成擴散層。第一薄膜形成於該源極/汲極區域之上。擴散層之形成方法以以往的一般方法形成。再者，在形成源極/汲極區域之同時形成的閘極電極亦按照以往技術而形成。
構成矽化物電極之第一金屬宜為鈦(Ti)、鈷(Co)、鎳(Ni)、鉑(Pt)之任何一種或其組合之合金。如上所述之金屬，係考慮謀求矽化鈦或矽化鈷之通用性、為了謀求接合深度之極淺化的矽化鎳特性、及矽化鉑的良好耐熱性。再者，鉑與鉿之合金(PtHf)矽化物對於構成基板之矽(n-Si或p-Si)亦具有中間隙(midgap)相近的功函數，故，從可降低能障高度的觀點而言係有用的矽化物電極。
關於第一薄膜之膜厚係藉由對裝置要求之接合深度等來決定，且與本發明主要目的之抑制第一金屬氧化無關。因而，第一薄膜之膜厚在本申請案中不予限制。
第一金屬之薄膜形成方法並無特別限定，可採用濺鍍法及真空蒸鍍法等物理性方法、或化學氣相蒸鍍法(CVD法)等化學性方法，不過宜採用濺鍍法。就形成薄膜時之濺鍍形式並無特別限制，可以磁控濺鍍、 離子束濺鍍、電子迴旋共振(ECR)濺鍍、鏡控(Mirrortron)濺鍍、高頻(RF)濺鍍、直流(DC)濺鍍等形成薄膜。
而後，形成第一薄膜後，在其上形成第二金屬之化合物薄膜。本發明係採用鉿作為該第二金屬。本發明人認為鉿在形成化合物時，比較容易發現並維持非晶質相，具有即使受熱也不易因結晶化而產生構造變化的特性。因而，與過去用作覆蓋層之氮化鈦等比較時，鉿化合物耐熱性高，對第一薄膜之能障性能優異。
而後，鉿化合物之具體例可採用氮化鉿、鎢化鉿、硼化鉿等。此等鉿化合物中，更宜為非晶質相之發現性高且可形成耐熱性佳之膜的氮化鉿。再者，氮化鉿還具有蝕刻性亦佳，且可簡化矽化後之除去工序的優點。
該鉿化合物薄膜之厚度宜在10nm以上，20nm以下，此為耐氧化性高，且不易結晶化之膜厚。
就鉿化合物薄膜之形成方法，亦與第一薄膜同樣地並無特別限制，不過宜採用濺鍍法。由於形成氮化物膜，因此採用反應性濺鍍。
形成第二薄膜之鉿化合物薄膜後，藉由熱處理(退火)將第一金屬矽化。該熱處理宜在400℃以上、600℃以下進行。此為可降低電阻率之熱處理溫度。熱處理環境宜為非氧化性環境(真空環境、不活潑氣體環境、還原環境)。再者，宜使用高速熱處理裝置進行熱處理。
退火後，宜包含除去第二薄膜之工序。由於第二薄膜之鉿化合物薄膜係為了在藉由退火而矽化時能障第一金屬者，因此退火完成後即完成其任務。鉿化合物薄膜宜藉由濕式蝕刻除去。適合之蝕刻液如有稀氟 酸、緩衝氟酸等。
再者，除去鉿化合物薄膜之同時還宜除去退火後未矽化而未反應的第一金屬。該未反應之第一金屬亦藉由蝕刻除去，不過蝕刻液依第一金屬之種類作選擇，如有稀氟酸、王水、硫酸等。
藉由以上工序，在基板上形成第一金屬之矽化物電極。在製造半導體裝置時，爾後的工序按照過去製程。
本發明在製造半導體裝置之矽化物電極時，係將抑制矽化之第一金屬薄膜氧化的第二金屬化合物(覆蓋層)之構成材料最佳化者。本發明採用之鉿化合物具有比過去技術優異之能障性能，亦可因應微細化、薄膜化之矽化物膜的製造。
第一圖係說明第一種實施形態中用於評估試驗之試劑的製造工序圖。
第二圖係第一種實施形態所製造之矽化物(PtSi)電極的表面形態照片。
第三圖係說明第二種實施形態所製造之CBKR構造的製造工序圖。
以下，說明本發明之實施形態。
第一種實施形態：本實施形態之預備性試驗，為了在矽基板上形成矽化鉑而使鉑成膜以作為第一金屬，檢討於其上形成與不形成氮化鉿薄膜的情況下，退火後之矽化物電極的表面形態。
第一圖顯示本實施形態之比較試驗的工序。本實施形態係準備矽基板(p-矽(100))，洗淨後以濺鍍法形成10nm之鉑薄膜。
而後，本實施形態係在鉑薄膜上形成氮化鉿薄膜。氮化鉿薄膜使用鉿標的，並在氪(kr)/氮(N2)之成膜環境下以反應性濺鍍成膜(膜厚20nm)。比較例則是不形成該氮化鉿薄膜而進行矽化。
其次，藉由熱處理進行矽化。矽化條件之處理溫度為450℃，處理環境為氮氣氣體中，處理時間為30分鐘。
形成矽化鉑後，藉由蝕刻除去氮化鉿膜及未反應之鉑作為裝置。首先，以烯氟酸(1%)除去氮化鉿後，藉由稀釋王水(HCl：HNO3：H2O=3：2：1，溫度40℃)除去未反應鉑。然後以750℃在處理環境氮氣氣體中進行30秒鐘的熱處理。
就如以上形成了矽化膜之矽基板，以掃瞄式電子顯微鏡(SEM)觀察矽化膜之表面形態。第二圖係顯示該觀察結果之照片。從第二圖瞭解不採用由氮化鉿構成之覆蓋層的比較例之矽化膜，表面形成有凹凸，判定為形態不佳。另外，本實施形態之矽化膜中並未看到此種不佳的形態。可確認用於矽化之退火時，氮化鉿薄膜有效發揮能障效果。
就此等矽化合金膜，藉由AFM(原子間力顯微鏡)測定平方平均表面粗度(RMS)時(掃瞄幅度3μm)，採用覆蓋層之本實施形態的矽化鉑合金膜的RMS係2.26nm。而不採用覆蓋層之比較例的矽化鉑膜的RMS係3.12nm。
第二種實施形態：以下就氮化鉿薄膜之有效性，為了重現及評估實際對半導體裝置元件製造工序的效果，評估藉由交叉電橋開爾文電 阻法(cross-bridge Kelvin resistance：以下稱CBKR)之4端子開爾文測試構造中的接觸電阻(界面接觸電阻)。第三圖係概略說明採用氮化鉿薄膜且用於形成CBKR構造之工序者。另外，該評估試驗亦檢討形成CBKR構造後，進行成形氣體(N2/4.9%H2)之退火(Forming Gas Anneal：FGA)時的界面電阻變化。表1顯示藉由BKR法測定矽化物電極與鋁電極之界面電阻的結果。
從表1可確認，作為製造矽化物電極時之覆蓋層而採用氮化鉿薄膜可降低接觸電阻。再者，也與FGA有關，不過，原本FGA係改善鋁與矽化物電極之電性接觸使界面電阻良好的操作。可確認採用由氮化鉿薄膜構成之覆蓋層可維持FGA之作用，藉由兩者可大幅降低接觸電阻。
【產業上之可利用性】
採用本發明製造矽化物電極時，可製造比過去更高品質者。本發明適合作為金氧半場效電晶體等各種半導體裝置中之矽化物電極的製程。

Claims (2)

  1. 一種半導體裝置電極的製造方法，其特徵為包含以下工序：在包含矽(Si)之基板上形成由第一金屬構成的第一薄膜；在前述第一薄膜上形成由第二金屬化合物構成之第二薄膜；藉由熱處理而形成由第一金屬之矽化物構成的電極；及該熱處理後除去該第二薄膜；其中前述第二金屬採用鉿(Hf)，該第二金屬之化合物係氮化鉿(HfN)、鎢化鉿(HfW)、或硼化鉿(HfB)。
  2. 如申請專利範圍第1項之半導體裝置電極的製造方法，其中該第一金屬係鈦(Ti)、鈷(Co)、鎳(Ni)、鉑(Pt)之任何一種或其組合之合金。
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JPH0738104A (ja) * 1993-07-22 1995-02-07 Toshiba Corp 半導体装置の製造方法
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JP3998621B2 (ja) * 2003-09-29 2007-10-31 株式会社東芝 半導体装置及びその製造方法
DE102005000084A1 (de) * 2005-07-04 2007-01-18 Hilti Ag Verstellvorrichtung zur Drehrichtungsumkehr
JP5769160B2 (ja) * 2008-10-30 2015-08-26 国立大学法人東北大学 コンタクト形成方法、半導体装置の製造方法、および半導体装置
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