TWI608569B - 記憶元件以及可程式邏輯裝置 - Google Patents

記憶元件以及可程式邏輯裝置 Download PDF

Info

Publication number
TWI608569B
TWI608569B TW102125223A TW102125223A TWI608569B TW I608569 B TWI608569 B TW I608569B TW 102125223 A TW102125223 A TW 102125223A TW 102125223 A TW102125223 A TW 102125223A TW I608569 B TWI608569 B TW I608569B
Authority
TW
Taiwan
Prior art keywords
transistor
film
wiring
oxide semiconductor
channel type
Prior art date
Application number
TW102125223A
Other languages
English (en)
Chinese (zh)
Other versions
TW201413874A (zh
Inventor
池田隆之
Original Assignee
半導體能源研究所股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 半導體能源研究所股份有限公司 filed Critical 半導體能源研究所股份有限公司
Publication of TW201413874A publication Critical patent/TW201413874A/zh
Application granted granted Critical
Publication of TWI608569B publication Critical patent/TWI608569B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748Structural details of configuration resources
    • H03K19/17764Structural details of configuration resources for reliability
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748Structural details of configuration resources
    • H03K19/17758Structural details of configuration resources for speeding up configuration or reconfiguration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748Structural details of configuration resources
    • H03K19/1776Structural details of configuration resources for memories
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D84/903Masterslice integrated circuits comprising field effect technology
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Dram (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW102125223A 2012-07-18 2013-07-15 記憶元件以及可程式邏輯裝置 TWI608569B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012159449 2012-07-18

Publications (2)

Publication Number Publication Date
TW201413874A TW201413874A (zh) 2014-04-01
TWI608569B true TWI608569B (zh) 2017-12-11

Family

ID=49945804

Family Applications (2)

Application Number Title Priority Date Filing Date
TW102125223A TWI608569B (zh) 2012-07-18 2013-07-15 記憶元件以及可程式邏輯裝置
TW106132988A TWI638431B (zh) 2012-07-18 2013-07-15 記憶元件以及可程式邏輯裝置

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW106132988A TWI638431B (zh) 2012-07-18 2013-07-15 記憶元件以及可程式邏輯裝置

Country Status (4)

Country Link
US (2) US8934299B2 (enExample)
JP (6) JP6143590B2 (enExample)
KR (6) KR102107591B1 (enExample)
TW (2) TWI608569B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011065258A1 (en) * 2009-11-27 2011-06-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP6333028B2 (ja) * 2013-04-19 2018-05-30 株式会社半導体エネルギー研究所 記憶装置及び半導体装置
JP6625328B2 (ja) * 2014-03-06 2019-12-25 株式会社半導体エネルギー研究所 半導体装置の駆動方法
JP6677449B2 (ja) * 2014-03-13 2020-04-08 株式会社半導体エネルギー研究所 半導体装置の駆動方法
US9401364B2 (en) * 2014-09-19 2016-07-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic component, and electronic device
US9281305B1 (en) * 2014-12-05 2016-03-08 National Applied Research Laboratories Transistor device structure
US9953695B2 (en) 2015-12-29 2018-04-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic device, and semiconductor wafer
US11114138B2 (en) 2017-09-15 2021-09-07 Groq, Inc. Data structures with multiple read ports
US11243880B1 (en) 2017-09-15 2022-02-08 Groq, Inc. Processor architecture
US11868804B1 (en) 2019-11-18 2024-01-09 Groq, Inc. Processor instruction dispatch configuration
US11360934B1 (en) 2017-09-15 2022-06-14 Groq, Inc. Tensor streaming processor architecture
US11170307B1 (en) 2017-09-21 2021-11-09 Groq, Inc. Predictive model compiler for generating a statically scheduled binary with known resource constraints
US10754621B2 (en) * 2018-08-30 2020-08-25 Groq, Inc. Tiled switch matrix data permutation circuit
US12340300B1 (en) 2018-09-14 2025-06-24 Groq, Inc. Streaming processor architecture
US11204976B2 (en) 2018-11-19 2021-12-21 Groq, Inc. Expanded kernel generation
TWI863940B (zh) * 2019-01-25 2024-12-01 日商半導體能源研究所股份有限公司 半導體裝置及包括該半導體裝置的電子裝置
US11908947B2 (en) 2019-08-08 2024-02-20 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
DE112020004469T5 (de) 2019-09-20 2022-08-04 Semiconductor Energy Laboratory Co., Ltd. Halbleitervorrichtung
CN114902414A (zh) 2019-12-27 2022-08-12 株式会社半导体能源研究所 半导体装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06162764A (ja) * 1992-11-17 1994-06-10 Toshiba Corp 半導体記憶装置
US20090040802A1 (en) * 2007-08-07 2009-02-12 Matsushita Electric Industrial Co. Ltd Semiconductor memory device, memory-mounted lsi and fabrication method for semiconductor memory device
JP2011216177A (ja) * 2010-03-17 2011-10-27 Semiconductor Energy Lab Co Ltd 記憶装置、半導体装置

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6196595A (ja) * 1984-10-17 1986-05-15 Toshiba Corp 半導体記憶装置
JPS62257698A (ja) * 1986-04-30 1987-11-10 Oki Electric Ind Co Ltd 半導体スタテイツクメモリセル
JPH02218093A (ja) * 1989-02-17 1990-08-30 Nec Corp メモリセル回路
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
JPH1131932A (ja) * 1997-05-13 1999-02-02 Nippon Steel Corp メモリトランジスタを備えた半導体装置ならびに増幅回路及び増幅度可変方法ならびに記憶媒体
JP2001202775A (ja) * 2000-01-19 2001-07-27 Ind Technol Res Inst 再書き込み擬似sram及びその再書き込み方法
JP2005056452A (ja) * 2003-08-04 2005-03-03 Hitachi Ltd メモリ及び半導体装置
JP4418254B2 (ja) * 2004-02-24 2010-02-17 株式会社ルネサステクノロジ 半導体集積回路
US7834827B2 (en) * 2004-07-30 2010-11-16 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and driving method thereof
US7619916B2 (en) * 2006-07-06 2009-11-17 Stmicroelectronics Pvt. Ltd. 8-T SRAM cell circuit, system and method for low leakage current
JP5179791B2 (ja) * 2006-07-21 2013-04-10 株式会社Genusion 不揮発性半導体記憶装置、不揮発性半導体記憶装置の状態決定方法および半導体集積回路装置
TWI585730B (zh) * 2006-09-29 2017-06-01 半導體能源研究所股份有限公司 顯示裝置和電子裝置
KR101731772B1 (ko) * 2008-11-28 2017-04-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치, 표시 장치 및 표시 장치를 포함하는 전자 장치
JP5781720B2 (ja) 2008-12-15 2015-09-24 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
KR102748818B1 (ko) * 2009-10-29 2024-12-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
MY187143A (en) 2010-01-20 2021-09-03 Semiconductor Energy Lab Semiconductor device
KR101926336B1 (ko) * 2010-02-05 2019-03-07 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2011099360A1 (en) * 2010-02-12 2011-08-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for driving the same
KR101891065B1 (ko) 2010-03-19 2018-08-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치 구동 방법
WO2011129233A1 (en) 2010-04-16 2011-10-20 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
WO2011162147A1 (en) 2010-06-23 2011-12-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
KR101859361B1 (ko) 2010-07-16 2018-05-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
US9343480B2 (en) * 2010-08-16 2016-05-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5674594B2 (ja) * 2010-08-27 2015-02-25 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の駆動方法
US8829512B2 (en) * 2010-12-28 2014-09-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
TWI621121B (zh) * 2011-01-05 2018-04-11 Semiconductor Energy Laboratory Co., Ltd. 儲存元件、儲存裝置、及信號處理電路
JP5337859B2 (ja) * 2011-11-02 2013-11-06 株式会社半導体エネルギー研究所 半導体装置、表示装置及び液晶表示装置
JP5288654B2 (ja) * 2011-11-02 2013-09-11 株式会社半導体エネルギー研究所 半導体装置、表示装置、液晶表示装置、表示モジュール及び電子機器
WO2013146039A1 (ja) * 2012-03-30 2013-10-03 シャープ株式会社 半導体記憶装置
WO2013164958A1 (en) * 2012-05-02 2013-11-07 Semiconductor Energy Laboratory Co., Ltd. Programmable logic device
US8952723B2 (en) * 2013-02-13 2015-02-10 Semiconductor Energy Laboratory Co., Ltd. Programmable logic device and semiconductor device
TW201513128A (zh) * 2013-07-05 2015-04-01 Semiconductor Energy Lab 半導體裝置
US9378844B2 (en) * 2013-07-31 2016-06-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including transistor whose gate is electrically connected to capacitor
US9401364B2 (en) * 2014-09-19 2016-07-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic component, and electronic device
US9424890B2 (en) * 2014-12-01 2016-08-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
US9583177B2 (en) * 2014-12-10 2017-02-28 Semiconductor Energy Laboratory Co., Ltd. Memory device and semiconductor device including memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06162764A (ja) * 1992-11-17 1994-06-10 Toshiba Corp 半導体記憶装置
US20090040802A1 (en) * 2007-08-07 2009-02-12 Matsushita Electric Industrial Co. Ltd Semiconductor memory device, memory-mounted lsi and fabrication method for semiconductor memory device
JP2011216177A (ja) * 2010-03-17 2011-10-27 Semiconductor Energy Lab Co Ltd 記憶装置、半導体装置

Also Published As

Publication number Publication date
KR102436903B1 (ko) 2022-08-25
KR20210012032A (ko) 2021-02-02
JP6143590B2 (ja) 2017-06-07
US8934299B2 (en) 2015-01-13
KR102107591B1 (ko) 2020-05-07
TWI638431B (zh) 2018-10-11
KR20220119590A (ko) 2022-08-30
JP2021073724A (ja) 2021-05-13
KR20140011260A (ko) 2014-01-28
KR20200047485A (ko) 2020-05-07
KR102368444B1 (ko) 2022-02-25
JP6516897B2 (ja) 2019-05-22
JP2017182869A (ja) 2017-10-05
JP2022159399A (ja) 2022-10-17
JP2014038684A (ja) 2014-02-27
JP6325149B2 (ja) 2018-05-16
JP2018139165A (ja) 2018-09-06
KR20200103597A (ko) 2020-09-02
KR102556197B1 (ko) 2023-07-14
US9985636B2 (en) 2018-05-29
TW201810538A (zh) 2018-03-16
KR102150574B1 (ko) 2020-09-01
US20140021474A1 (en) 2014-01-23
US20150123705A1 (en) 2015-05-07
TW201413874A (zh) 2014-04-01
KR102210818B1 (ko) 2021-02-01
JP2019153796A (ja) 2019-09-12
KR20220027128A (ko) 2022-03-07

Similar Documents

Publication Publication Date Title
KR102436903B1 (ko) 기억 소자 및 프로그래머블 로직 디바이스
US9379706B2 (en) Programmable logic device
US9007093B2 (en) Programmable logic device
TWI618075B (zh) 半導體裝置及其驅動方法
JP6298662B2 (ja) 半導体装置
US9312851B2 (en) Semiconductor device and driving method thereof
US9083327B2 (en) Semiconductor device and method of driving semiconductor device
JP2014003594A (ja) 半導体装置及びその駆動方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees