TWI595558B - Membrane formation method and method for fabricating thin film transistor - Google Patents

Membrane formation method and method for fabricating thin film transistor Download PDF

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TWI595558B
TWI595558B TW105103647A TW105103647A TWI595558B TW I595558 B TWI595558 B TW I595558B TW 105103647 A TW105103647 A TW 105103647A TW 105103647 A TW105103647 A TW 105103647A TW I595558 B TWI595558 B TW I595558B
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film
oxide semiconductor
plasma
semiconductor film
thin film
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TW201703144A (zh
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Eiji Takahashi
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Nissin Electric Co Ltd
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Description

膜形成方法及薄膜電晶體的製作方法
本發明是有關於一種於氧化物半導體膜上形成氟化矽氮化膜（SiN：F膜）的方法及使用該方法製作薄膜電晶體的方法。
已知如下膜形成方法：藉由使用含有四氟化矽氣體（SiF4 ）及氮氣（N2 ）的原料氣體的電漿化學氣相沈積（Chemical Vapor Deposition，CVD）法，於氧化物半導體膜（例如銦鎵鋅氧化物（Indium Gallium Zinc Oxide，IGZO）膜）上直接或介隔其他要素而形成氟化矽氮化膜（SiN：F膜）（例如參照專利文獻1）。
氟化矽氮化膜具有以下特長：具有穩定的電氣絕緣特性，並且與一直以來常被用作絕緣膜的矽氧化膜（SiO2 ）相比更緻密，故防止雜質擴散的效果大。 [現有技術文獻] [專利文獻]
[專利文獻1]日本專利第5454727號公報（段落0050～段落0055、段落0062、段落0065）
[發明所欲解決之課題]
關於如上所述的現有的膜形成方法，得知存在以下課題：若於氧化物半導體膜上直接（即，不介隔其他膜等要素。以下相同）形成氟化矽氮化膜，則氧化物半導體膜的電阻大幅度地降低。
可認為其原因在於：氧化物半導體膜中的氧經成膜時的原料氣體中所含的氟還原，於氧化物半導體膜中產生氧缺損，於由此所產生的孔隙中捕獲電子，該被捕獲的電子成為施體而使電阻大幅度地降低。
若氧化物半導體膜的電阻大幅度地降低，則例如具有該氧化物半導體膜的薄膜電晶體不顯示出作為電晶體的特性。
因此，本發明的一個目的在於提供一種即便於氧化物半導體膜上直接形成氟化矽氮化膜，亦可抑制該氧化物半導體膜的電阻降低的膜形成方法。
另外，本發明的其他目的在於提供一種使用此種膜形成方法的薄膜電晶體的製作方法。 [解決課題之手段]
本發明的膜形成方法的特徵在於包括：表面處理步驟，準備於基板上具有氧化物半導體膜的物品，使用氧與氫的混合氣體且氫的比例為8%以下（不包括0）的混合氣體來生成電漿，並藉由該電漿對所述氧化物半導體膜的表面進行處理；成膜步驟，其後藉由使用含有四氟化矽氣體及氮氣的原料氣體而生成電漿的電漿CVD法，於所述氧化物半導體膜上形成於矽氮化膜中含有氟的氟化矽氮化膜；以及退火步驟，其後對所述基板及該基板上的膜進行加熱。
根據該膜形成方法，發揮以下作用：藉由表面處理步驟而氧及氫適度進入至氧化物半導體膜的表層部中，進而藉由退火步驟，進入至所述氧化物半導體膜的表層部中的氧及氫擴散至該氧化物半導體膜中，使氧化物半導體膜的電阻恢復。結果，即便於氧化物半導體膜上直接形成氟化矽氮化膜，亦可抑制該氧化物半導體膜的電阻降低，並且將該電阻保持於氧化物半導體膜顯示出半導體特性的範圍內。
於所述表面處理步驟及所述成膜步驟中，亦可使用藉由感應耦合而生成電漿的感應耦合型的電漿生成方法來生成所述電漿。
亦可使用所述膜形成方法，形成所述氟化矽氮化膜作為構成薄膜電晶體的閘極絕緣膜或保護膜。 [發明的效果]
根據第1發明所記載的發明，即便於氧化物半導體膜上直接形成氟化矽氮化膜，亦可抑制該氧化物半導體膜的電阻降低，並且將該電阻保持於氧化物半導體膜顯示出半導體特性的範圍內。
根據第2發明所記載的發明，發揮以下的進一步的效果。即，根據感應耦合型的電漿生成方法，可使電漿中產生大的感應電場，故可生成高密度的電漿，高效率地進行表面處理步驟中的表面處理。且於成膜步驟中，可使四氟化矽氣體及氮氣高效率地放電分解，高效率地形成氟化矽氮化膜。
根據第3發明所記載的發明，發揮以下的進一步的效果。即，雖然頂部閘極型的薄膜電晶體為氧化物半導體膜與閘極絕緣膜接觸的結構，但若使用所述膜形成方法形成所述氟化矽氮化膜作為該閘極絕緣膜，則該膜中的Si-F鍵強，不易發生氟分離而擴散至氧化物半導體膜中的情況，故可獲得特性穩定性良好的薄膜電晶體。
而且，作為閘極絕緣膜的所述氟化矽氮化膜具有穩定的電氣絕緣特性，故就該觀點而言，亦可獲得特性穩定性良好的薄膜電晶體。
根據第4發明所記載的發明，發揮以下的進一步的效果。即，雖然底部閘極型的薄膜電晶體為氧化物半導體膜與保護膜接觸的結構，但若使用所述膜形成方法形成所述氟化矽氮化膜作為該保護膜，則該膜中的Si-F鍵強，不易發生氟分離而擴散至氧化物半導體膜中的情況，故可獲得特性穩定性良好的薄膜電晶體。
而且，作為保護膜的所述氟化矽氮化膜緻密，防止水蒸氣自大氣向氧化物半導體膜中擴散的效果大，故就該觀點而言，亦可獲得特性穩定性良好的薄膜電晶體。
（1）膜形成方法 於圖1中示出本發明的膜形成方法的一實施形態的步驟。
該膜形成方法包括表面處理步驟40、其後的成膜步驟42及其後的退火步驟44。
表面處理步驟40為準備於基板上具有氧化物半導體膜的物品，使用氧（O2 ）與氫（H2 ）的混合氣體（O2 +H2 ）且氫的比例（H2 /（O2 +H2 ））為8%以下（不包括0）的混合氣體來生成包含氧及氫的電漿，並藉由該電漿對所述氧化物半導體膜的表面進行處理的步驟。
基板例如為半導體基板、玻璃基板、樹脂基板等，但不限於此。
基板上的氧化物半導體膜例如為IGZO（In-Ga-Zn-O）膜、ITZO（In-Sn-Zn-O）膜、IWZO（In-W-Zn-O）膜、IZO（In-Zn-O）膜、ITO（In-Sn-O）膜等，但不限於此。氧化物半導體膜可直接形成於基板的表面上，亦可介隔其他膜等而形成於基板的表面上。
電漿的處理時間並無特別限定，例如設定為60秒以下。若如此般設定，則處理時間短，故可提高產量（throughput）。
成膜步驟42為藉由使用含有四氟化矽氣體（SiF4 ）及氮氣（N2 ）的原料氣體而生成電漿的電漿CVD法，於所述氧化物半導體膜上形成於矽氮化膜中含有氟的氟化矽氮化膜（SiN：F膜）的步驟。
該成膜步驟42例如亦可藉由以下方式進行：於與實施所述表面處理步驟40的裝置（例如電漿處理裝置）相同的裝置中，繼所述表面處理步驟40之後，不使電漿消滅而將導入氣體由所述混合氣體切換為原料氣體。若如此般設定，則可節省使電漿消滅後再次產生電漿的勞力，故可縮短處理時間而提高產量。
退火步驟44為對所述基板及該基板上的膜進行加熱（即退火）的步驟。
該退火步驟44無需於真空環境中進行，例如只要於大氣中進行即可。另外，例如亦可將大氣導入至構成所述電漿處理裝置的真空容器內，於該真空容器內進行。該退火步驟44中的基板等的加熱溫例如只要設定為150℃～350℃的範圍即可。加熱時間例如只要設定為30分鐘～60分鐘左右即可。
根據該膜形成方法，即便於氧化物半導體膜上直接形成氟化矽氮化膜，亦可抑制該氧化物半導體膜的電阻降低，並且將該電阻保持於氧化物半導體膜顯示出半導體特性的範圍內。可認為該情況是由以下作用所致。
即，藉由所述表面處理步驟，氧及氫適度進入至氧化物半導體膜的表層部中。該氧發揮補償膜形成步驟中產生的氧化物半導體膜中的氧缺損的作用。所述氫發揮使氧化物半導體膜中的缺陷終止（terminate）的作用。進而藉由所述退火步驟，進入至所述氧化物半導體膜的表層部中的氧及氫擴散至該氧化物半導體膜中，發揮使氧化物半導體膜的電阻恢復的作用。結果，即便於氧化物半導體膜上直接形成氟化矽氮化膜，亦可抑制該氧化物半導體膜的電阻降低，並且將該電阻保持於氧化物半導體膜顯示出半導體特性的範圍內。
然而，若表面處理步驟中的混合氣體中的氫的比例超過8%，則即便經過退火步驟，氧化物半導體膜的電阻亦幾乎不恢復。可認為其原因在於：膜中的氫變得過剩，過剩氫成為施體而使電阻降低。
關於所述作用效果，以下將參照實施例加以進一步說明。
於所述表面處理步驟40及成膜步驟42中，亦可使用藉由感應耦合而生成電漿的感應耦合型的電漿生成方法來生成所述電漿。將實施感應耦合型的電漿生成方法的電漿處理裝置的一例示於圖2中。
該電漿處理裝置具有藉由真空排氣裝置12進行真空排氣、且經由氣體導入口14導入氣體16的真空容器10，於其內部設有基板固持器18，該基板固持器18保持具有所述氧化物半導體膜4的基板2。亦可如該例般，自偏壓電源20對基板固持器18施加偏壓電壓（例如負的偏壓電壓）。
於該例中，於真空容器10內的基板固持器18的上方，以沿著基板固持器18的表面的方式而配置有直線狀的高頻天線24。該高頻天線24的兩端部附近分別貫穿真空容器10的相對向的壁面上設置的兩個開口部22，於各開口部22設有絕緣物（例如絕緣凸緣）26。於該例中，高頻天線24的位於真空容器10內的部分是由絕緣蓋層28所覆蓋。再者，於絕緣物26與真空容器10之間及高頻天線24與絕緣物26之間設有真空密封用的襯墊（例如O環），但省略該些襯墊的圖示。
於高頻天線24中，自高頻電源30經由整合電路32而流動高頻電流IR 。高頻電流IR 的頻率例如為通常的13.56 MHz，但不限於此。
於該電漿處理裝置中，藉由在高頻天線24中流動高頻電流IR ，而於高頻天線24的周圍產生高頻磁場，藉此於與高頻電流IR 相反的方向上產生感應電場。藉由該感應電場，於真空容器10內，電子經加速而使高頻天線24附近的氣體16電離，於高頻天線24的附近產生電漿（即感應耦合型的電漿）34。如此般產生電漿34的方法被稱為感應耦合型的電漿生成方法。所述電漿34擴散至基板2的附近，可藉由該電漿34對基板2上的氧化物半導體膜4實施所需的處理。
即，藉由使用上文所述的氧與氫的混合氣體作為氣體16，可利用感應耦合型的電漿生成方法來生成電漿34，並藉由該電漿34對氧化物半導體膜4的表面進行處理。即，可實施上文所述的表面處理步驟40。而且，根據感應耦合型的電漿生成方法，可使電漿34中產生大的感應電場，故可生成高密度的電漿34，高效率地進行表面處理步驟40中的表面處理。
另外，藉由使用上文所述的含有四氟化矽氣體及氮氣的原料氣體作為氣體16，可利用感應耦合型的電漿生成方法來生成電漿34，並藉由利用該電漿34的電漿CVD法於氧化物半導體膜4上形成上文所述的氟化矽氮化膜。即，可實施上文所述的成膜步驟42。而且，四氟化矽氣體及氮氣雖然與一直以來常使用的矽烷（SiH4 ）及氨（NH3 ）相比更不易放電分解，但根據感應耦合型的電漿生成方法，可使電漿34中產生大的感應電場，故可於成膜步驟42中使四氟化矽氣體及氮氣高效率地放電分解。結果，可生成高密度的電漿34，高效率地形成氟化矽氮化膜。 [實施例]
如圖3所示，將於玻璃基板2上形成有厚度50 nm的IGZO膜作為氧化物半導體膜4的物品，配置於圖2所示般的電漿處理裝置內，導入氧（O2 ）與氫（H2 ）的混合氣體（氫的比例如下）作為氣體，藉由感應耦合型的電漿生成方法而生成電漿，將IGZO膜的表面暴露於電漿下而進行表面處理。即，實施表面處理步驟。此時的處理條件如下。
混合氣體中的氫的比例（H2 /（O2 +H2 ））：0%、5.7%、9.1%或23.1% 處理時間：60秒 真空容器內壓力：4 Pa
其後，於所述電漿處理裝置中將氣體切換為包含四氟化矽氣體（SiF4 ）及氮氣（N2 ）的原料氣體（兩氣體之比如下），藉由感應耦合型的電漿生成方法來生成電漿，藉由利用該電漿的電漿CVD法，於IGZO膜上形成氟化矽氮化膜（SiN：F膜）6。即，實施成膜步驟。藉此獲得圖3所示的試樣。此時的成膜條件如下。
原料氣體中的兩氣體之比···SiF4 ：N2 =1：1 真空容器內壓力：4 Pa SiN：F膜的膜厚：100 nm
其後，將所述試樣取出至大氣中，於加熱板上加熱而實施退火處理。即，實施退火步驟。此時的退火條件如下。
加熱環境：大氣中 加熱溫度：350℃ 加熱時間：1小時
對於所述混合氣體中的各氫比例，將測定退火前後的IGZO膜的片電阻所得的結果示於表1中。另外，將該表1的測定結果製成圖表並示於圖4中。
[表1]
IGZO膜的最初的（即實施所述處理前的）片電阻為5E+6 Ω/□，無論為哪一氫比例，退火前的IGZO膜的片電阻與最初的片電阻相比均大幅度地降低。可認為其原因在於：於表面處理步驟中進入至IGZO膜的表層部中的氧及/或氫於表層部中大量蓄積，該些氧及/或氫成為施體而發揮使IGZO膜的片電阻大幅度地降低的作用。
另一方面，關於退火後的IGZO膜的片電阻，於氫比例為0%時非常大地增加，於氫比例為5.7%時亦相當大地增加，然而於氫比例為9.1%以上時幾乎未增加。可認為片電阻增加的原因在於：進入至IGZO膜的表層部中的氧及氫藉由退火而擴散至IGZO膜中，發揮使IGZO膜的片電阻恢復的作用。可認為若氫比例為9.1%以上則片電阻幾乎未增加的原因在於：IGZO膜中的氫變得過剩，過剩氫成為施體而使片電阻降低。
IGZO膜般的氧化物半導體膜於薄膜電晶體等中正常地顯示出半導體特性的範圍通常是片電阻為1E+5 Ω/□～1E+8 Ω/□的範圍內。於氫比例為0%時，IGZO膜的片電阻稍許超過所述上限1E+8 Ω/□。另一方面，根據圖4可認為，於氫比例為8%時，IGZO膜的片電阻成為所述下限1E+5 Ω/□附近。根據這一情況，可謂混合氣體中的氫比例較佳為8%以下（不包括0）。
（2）薄膜電晶體的製作方法 繼而，對使用如上所述般的膜形成方法來製作薄膜電晶體的方法的例子加以說明。
於圖5中示出頂部閘極型的薄膜電晶體的一例。該薄膜電晶體50a具有以下結構：於基板52上介隔防擴散膜54而形成有氧化物半導體膜56，於該氧化物半導體膜56上直接形成有閘極絕緣膜60，於該閘極絕緣膜60上形成有閘極電極62，於該例中進一步於所述閘極電極62上形成有保護膜64。氧化物半導體膜56例如為如上所述的IGZO膜等氧化物半導體膜。圖6所示的薄膜電晶體50b的情況亦相同。
於該例中，於氧化物半導體膜56的左右兩側形成有源極區域57及汲極區域58，於該些區域上分別連接有源極電極66及汲極電極68。然而，有時亦代替源極區域57及汲極區域58而於氧化物半導體膜56的左右兩側上部殘留通道區域，重疊配置源極電極及汲極電極。圖6所示的薄膜電晶體50b的情況亦相同。
雖然該薄膜電晶體50a為氧化物半導體膜56與閘極絕緣膜60接觸的結構，但若使用所述膜形成方法形成所述氟化矽氮化膜作為該閘極絕緣膜60，則該膜60中的Si-F鍵強，不易發生氟分離而擴散至氧化物半導體膜56中的情況，故可獲得特性穩定性良好的薄膜電晶體。
而且，作為閘極絕緣膜60的所述氟化矽氮化膜具有穩定的電氣絕緣特性，故就該觀點而言，亦可獲得特性穩定性良好的薄膜電晶體。
於圖6中示出底部閘極型的薄膜電晶體的一例。該薄膜電晶體50b具有以下結構：於基板52上形成有閘極電極62，於該閘極電極62上形成有閘極絕緣膜60，於該閘極絕緣膜60上形成有氧化物半導體膜56，於該氧化物半導體膜56上直接形成有保護膜64。源極及汲極周圍的結構與圖5的情形相同。
雖然該薄膜電晶體50b為氧化物半導體膜56與保護膜64接觸的結構，但若使用所述膜形成方法形成所述氟化矽氮化膜作為該保護膜64，則該膜64中的Si-F鍵強，不易發生氟分離而擴散至氧化物半導體膜56中的情況，故可獲得特性穩定性良好的薄膜電晶體。
而且，作為保護膜64的所述氟化矽氮化膜緻密，防止水蒸氣自大氣向氧化物半導體膜56中擴散的效果大，故就該觀點而言，亦可獲得特性穩定性良好的薄膜電晶體。
2‧‧‧基板
4‧‧‧氧化物半導體膜
6‧‧‧氟化矽氮化膜
10‧‧‧真空容器
12‧‧‧真空排氣裝置
14‧‧‧氣體導入口
16‧‧‧氣體
18‧‧‧基板固持器
20‧‧‧偏壓電源
22‧‧‧開口部
24‧‧‧高頻天線
26‧‧‧絕緣物
28‧‧‧絕緣蓋層
30‧‧‧高頻電源
32‧‧‧整合電路
34‧‧‧電漿
40‧‧‧表面處理步驟
42‧‧‧成膜步驟
44‧‧‧退火步驟
50a、50b‧‧‧薄膜電晶體
52‧‧‧基板
54‧‧‧防擴散膜
56‧‧‧氧化物半導體膜
57‧‧‧源極區域
58‧‧‧汲極區域
60‧‧‧閘極絕緣膜
62‧‧‧閘極電極
64‧‧‧保護膜
66‧‧‧源極電極
68‧‧‧汲極電極
IR‧‧‧高頻電流
圖1為表示本發明的膜形成方法的一實施形態的步驟圖。 圖2為表示實施感應耦合型的電漿生成方法的電漿處理裝置的一例的概略剖面圖。 圖3為表示於基板上的氧化物半導體膜上形成了氟化矽氮化膜的試樣的一例的概略剖面圖。 圖4為將表1的測定結果製成圖表而成的圖。 圖5為表示頂部閘極型的薄膜電晶體的一例的概略剖面圖。 圖6為表示底部閘極型的薄膜電晶體的一例的概略剖面圖。
40‧‧‧表面處理步驟
42‧‧‧成膜步驟
44‧‧‧退火步驟

Claims (4)

  1. 一種膜形成方法，其特徵在於包括： 表面處理步驟，準備於基板上具有氧化物半導體膜的物品，使用氧與氫的混合氣體且氫的比例為8%以下（不包括0）的混合氣體來生成電漿，並藉由該電漿對所述氧化物半導體膜的表面進行處理； 成膜步驟，其後藉由使用含有四氟化矽氣體及氮氣的原料氣體而生成電漿的電漿化學氣相沈積法，於所述氧化物半導體膜上形成於矽氮化膜中含有氟的氟化矽氮化膜；以及 退火步驟，其後對所述基板及所述基板上的膜進行加熱。
  2. 如申請專利範圍第1項所述的膜形成方法，其中於所述表面處理步驟及所述成膜步驟中，使用藉由感應耦合而生成電漿的感應耦合型的電漿生成方法來生成所述電漿。
  3. 一種薄膜電晶體的製作方法，其為製作頂部閘極型的薄膜電晶體的方法，所述頂部閘極型的薄膜電晶體具有於基板上形成有氧化物半導體膜，於所述氧化物半導體膜上形成有閘極絕緣膜，於所述閘極絕緣膜上形成有閘極電極的結構，並且所述薄膜電晶體的製作方法的特徵在於： 使用如申請專利範圍第1項或第2項所述的膜形成方法，形成所述氟化矽氮化膜作為所述閘極絕緣膜。
  4. 一種薄膜電晶體的製作方法，其為製作底部閘極型的薄膜電晶體的方法，所述底部閘極型的薄膜電晶體具有於基板上形成有閘極電極，於所述閘極電極上形成有閘極絕緣膜，於所述閘極絕緣膜上形成有氧化物半導體膜，於所述氧化物半導體膜上形成有保護膜的結構，並且所述薄膜電晶體的製作方法的特徵在於： 使用如申請專利範圍第1項或第2項所述的膜形成方法，形成所述氟化矽氮化膜作為所述保護膜。
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