TWI570864B - 具有焊線通孔的微電子封裝、其之製造方法以及用於其之硬化層 - Google Patents
具有焊線通孔的微電子封裝、其之製造方法以及用於其之硬化層 Download PDFInfo
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- TWI570864B TWI570864B TW103103350A TW103103350A TWI570864B TW I570864 B TWI570864 B TW I570864B TW 103103350 A TW103103350 A TW 103103350A TW 103103350 A TW103103350 A TW 103103350A TW I570864 B TWI570864 B TW I570864B
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
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Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
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| US13/757,673 US8940630B2 (en) | 2013-02-01 | 2013-02-01 | Method of making wire bond vias and microelectronic package having wire bond vias |
| US13/757,677 US9136254B2 (en) | 2013-02-01 | 2013-02-01 | Microelectronic package having wire bond vias and stiffening layer |
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| TW201448151A TW201448151A (zh) | 2014-12-16 |
| TWI570864B true TWI570864B (zh) | 2017-02-11 |
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| US9446943B2 (en) | 2013-05-31 | 2016-09-20 | Stmicroelectronics S.R.L. | Wafer-level packaging of integrated devices, and manufacturing method thereof |
| US9802813B2 (en) | 2014-12-24 | 2017-10-31 | Stmicroelectronics (Malta) Ltd | Wafer level package for a MEMS sensor device and corresponding manufacturing process |
| JP6271463B2 (ja) * | 2015-03-11 | 2018-01-31 | 東芝メモリ株式会社 | 半導体装置 |
| US10249515B2 (en) * | 2016-04-01 | 2019-04-02 | Intel Corporation | Electronic device package |
| US10002844B1 (en) * | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
| EP3462494B1 (en) * | 2017-09-29 | 2021-03-24 | Detection Technology OY | Integrated radiation detector device |
| CN110504172B (zh) * | 2018-05-16 | 2024-12-17 | 盛合晶微半导体(江阴)有限公司 | 垂直打线结构、堆叠芯片封装结构及方法 |
| US11990859B2 (en) | 2018-05-28 | 2024-05-21 | Borealis Ag | Devices for a photovoltaic (PV) module |
| JP7693393B2 (ja) | 2021-05-24 | 2025-06-17 | キオクシア株式会社 | 半導体装置の製造方法 |
| TWI845013B (zh) * | 2022-11-08 | 2024-06-11 | 京元電子股份有限公司 | 半導體封裝組件及半導體封裝基板模組 |
| CN116031216A (zh) * | 2023-01-30 | 2023-04-28 | 甬矽电子(宁波)股份有限公司 | 扇入型封装结构及其制备方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6211574B1 (en) * | 1999-04-16 | 2001-04-03 | Advanced Semiconductor Engineering Inc. | Semiconductor package with wire protection and method therefor |
| TW200539406A (en) * | 2004-05-31 | 2005-12-01 | Via Tech Inc | Circuit carrier and manufacturing process thereof |
| TW201250979A (en) * | 2011-05-03 | 2012-12-16 | Tessera Inc | Package-on-package assembly with wire bonds to encapsulation surface |
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| JPS5032196B1 (enExample) * | 1970-11-13 | 1975-10-18 | ||
| JPS61102745A (ja) * | 1984-10-26 | 1986-05-21 | Toshiba Corp | 半導体装置 |
| JP2000058603A (ja) * | 1998-08-10 | 2000-02-25 | Fuji Electric Co Ltd | 超音波ワイヤボンダ |
| JP4526651B2 (ja) * | 1999-08-12 | 2010-08-18 | 富士通セミコンダクター株式会社 | 半導体装置 |
| US6765287B1 (en) | 2001-07-27 | 2004-07-20 | Charles W. C. Lin | Three-dimensional stacked semiconductor package |
| US7176506B2 (en) | 2001-08-28 | 2007-02-13 | Tessera, Inc. | High frequency chip packages with connecting elements |
| JP3767512B2 (ja) * | 2002-04-25 | 2006-04-19 | 株式会社デンソー | ワイヤボンディング方法 |
| JP3765778B2 (ja) * | 2002-08-29 | 2006-04-12 | ローム株式会社 | ワイヤボンディング用キャピラリ及びこれを用いたワイヤボンディング方法 |
| US7371676B2 (en) * | 2005-04-08 | 2008-05-13 | Micron Technology, Inc. | Method for fabricating semiconductor components with through wire interconnects |
| US7307348B2 (en) * | 2005-12-07 | 2007-12-11 | Micron Technology, Inc. | Semiconductor components having through wire interconnects (TWI) |
| US8058101B2 (en) | 2005-12-23 | 2011-11-15 | Tessera, Inc. | Microelectronic packages and methods therefor |
| US20070181645A1 (en) * | 2006-01-13 | 2007-08-09 | Ho Wing Cheung J | Wire bonding method and apparatus |
| US7659612B2 (en) * | 2006-04-24 | 2010-02-09 | Micron Technology, Inc. | Semiconductor components having encapsulated through wire interconnects (TWI) |
| US8598717B2 (en) * | 2006-12-27 | 2013-12-03 | Spansion Llc | Semiconductor device and method for manufacturing the same |
| WO2008093414A1 (ja) * | 2007-01-31 | 2008-08-07 | Fujitsu Microelectronics Limited | 半導体装置及びその製造方法 |
| JP4926787B2 (ja) * | 2007-03-30 | 2012-05-09 | アオイ電子株式会社 | 半導体装置の製造方法 |
| JP2009088254A (ja) * | 2007-09-28 | 2009-04-23 | Toshiba Corp | 電子部品パッケージ及び電子部品パッケージの製造方法 |
| CN101971313B (zh) * | 2008-01-30 | 2013-07-24 | 库力索法工业公司 | 导线环以及形成导线环的方法 |
| JP5339800B2 (ja) * | 2008-07-10 | 2013-11-13 | 三菱電機株式会社 | 半導体装置の製造方法 |
| JP5734236B2 (ja) * | 2011-05-17 | 2015-06-17 | 株式会社新川 | ワイヤボンディング装置及びボンディング方法 |
| US8404520B1 (en) * | 2011-10-17 | 2013-03-26 | Invensas Corporation | Package-on-package assembly with wire bond vias |
-
2014
- 2014-01-29 TW TW103103350A patent/TWI570864B/zh not_active IP Right Cessation
- 2014-01-31 KR KR1020157023814A patent/KR101994954B1/ko active Active
- 2014-01-31 WO PCT/US2014/014181 patent/WO2014121090A1/en not_active Ceased
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- 2014-01-31 CN CN201480019865.0A patent/CN105074914B/zh active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6211574B1 (en) * | 1999-04-16 | 2001-04-03 | Advanced Semiconductor Engineering Inc. | Semiconductor package with wire protection and method therefor |
| TW200539406A (en) * | 2004-05-31 | 2005-12-01 | Via Tech Inc | Circuit carrier and manufacturing process thereof |
| TW201250979A (en) * | 2011-05-03 | 2012-12-16 | Tessera Inc | Package-on-package assembly with wire bonds to encapsulation surface |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201448151A (zh) | 2014-12-16 |
| KR101994954B1 (ko) | 2019-07-01 |
| KR20150113179A (ko) | 2015-10-07 |
| CN105074914A (zh) | 2015-11-18 |
| CN105074914B (zh) | 2018-06-01 |
| WO2014121090A1 (en) | 2014-08-07 |
| JP2016505222A (ja) | 2016-02-18 |
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| US9601454B2 (en) | Method of forming a component having wire bonds and a stiffening layer | |
| US8940630B2 (en) | Method of making wire bond vias and microelectronic package having wire bond vias | |
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