TWI570864B - Microelectronic package having wire bond vias, method of making and stiffening layer for same - Google Patents

Microelectronic package having wire bond vias, method of making and stiffening layer for same Download PDF

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Publication number
TWI570864B
TWI570864B TW103103350A TW103103350A TWI570864B TW I570864 B TWI570864 B TW I570864B TW 103103350 A TW103103350 A TW 103103350A TW 103103350 A TW103103350 A TW 103103350A TW I570864 B TWI570864 B TW I570864B
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TW
Taiwan
Prior art keywords
wire
welding
forming
microelectronic
substrate
Prior art date
Application number
TW103103350A
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Chinese (zh)
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TW201448151A (en
Inventor
菲立普 丹柏格
趙之忠
艾里斯 查
羅西安 阿拉托勒
Original Assignee
英帆薩斯公司
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Publication date
Priority claimed from US13/757,673 external-priority patent/US8940630B2/en
Priority claimed from US13/757,677 external-priority patent/US9136254B2/en
Application filed by 英帆薩斯公司 filed Critical 英帆薩斯公司
Publication of TW201448151A publication Critical patent/TW201448151A/en
Application granted granted Critical
Publication of TWI570864B publication Critical patent/TWI570864B/en

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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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Description

具有焊線通孔的微電子封裝、其之製造方法以及用於其之硬化層 Microelectronic package with wire through holes, method of manufacturing the same, and hardened layer therefor

本申請案的主要內容和微電子元件及相關電路系統的封裝有關,舉例來說,用於製造一種具有複數個導電通孔的結構(舉例來說,微電子封裝)的方法,該些導電通孔的形式為延伸自一基板之焊接表面(例如,位在該基板的一表面處的導電元件的表面)的焊線。 The main content of the present application relates to the packaging of microelectronic components and related circuitry, for example, a method for fabricating a structure having a plurality of conductive vias (for example, a microelectronic package), the conductive vias The holes are in the form of wire bonds extending from a soldering surface of a substrate (eg, the surface of a conductive element located at a surface of the substrate).

相關申請案之交互參照 Cross-references to related applications

本申請案主張2013年2月1日提申的美國專利申請案第13/757,673號的優先權,並且主張2013年2月1日提申的美國專利申請案第13/757,677號的優先權,本文以引用的方式將其揭示內容併入。 The present application claims priority to U.S. Patent Application Serial No. 13/757,673, the entire disclosure of which is incorporated herein to The disclosure is hereby incorporated by reference.

微電子裝置(例如,半導體晶片)通常需要許多輸入與輸出連接線連接至其它電子構件。一半導體晶片或其它可對照裝置的輸入與輸出接點通常被設置成實質上覆蓋該裝置的一表面的類格柵圖樣(通常稱為「區域陣列(area array)」),或是被設置在可以延伸平行於且相鄰於該裝置之前表面的每一個邊緣的多個狹長列中,或是被設置在該前表面的中央。一般來說,晶片之類的裝置必須實際上被裝設在一基板(例如,印刷電路板)上,而 且該裝置的接點必須被電連接至該電路板的導電特徵元件。 Microelectronic devices (eg, semiconductor wafers) typically require many input and output connections to connect to other electronic components. The input and output contacts of a semiconductor wafer or other comparable device are typically arranged to substantially cover a surface-like grid pattern of a surface of the device (commonly referred to as an "area array"), or It may extend into a plurality of elongated columns parallel to and adjacent to each edge of the front surface of the device, or may be disposed in the center of the front surface. In general, devices such as wafers must actually be mounted on a substrate (eg, a printed circuit board), and And the contacts of the device must be electrically connected to the conductive features of the board.

半導體晶片通常被提供在封裝中,封裝有助於在製造期間以及在裝設該晶片於一外部基板(例如,電路板或是其它電路鑲板)上期間對該晶片進行處理。舉例來說,許多半導體晶片被提供在適合表面裝設的封裝中。已經有眾多此通用類型的封裝被提出用於各種應用中。最常見的係,此些封裝包含一介電元件,通常稱為「晶片載體(chip carrier)」,在該介電質上有多個終端被形成為已電鍍或已蝕刻的金屬結構。此些終端通常藉由特徵元件(例如,沿著該晶片載體本身延伸的細線路)以及藉由延伸在該晶片的接點與該些終端或線路之間的精細導線被連接至該晶片本身的接點。於一表面裝設作業中,封裝會被放置在一電路板上,俾使得該封裝上的每一個終端對齊該電路板上的一對應接觸觸墊。焊料或是其它焊接材料係被提供在該些終端與該些接觸觸墊之間。該封裝會藉由加熱該組件用以熔化或「回焊」該焊料或是活化該焊接材料而永久被焊接在正確的地方。 Semiconductor wafers are typically provided in a package that facilitates processing of the wafer during fabrication and during installation of the wafer on an external substrate (eg, a circuit board or other circuit board). For example, many semiconductor wafers are provided in packages that are suitable for surface mounting. A large number of such general-purpose types of packages have been proposed for use in a variety of applications. Most commonly, such packages include a dielectric component, commonly referred to as a "chip carrier," on which a plurality of terminations are formed as an electroplated or etched metal structure. Such terminals are typically connected to the wafer itself by feature elements (eg, thin lines extending along the wafer carrier itself) and by fine wires extending between the contacts of the wafer and the terminals or lines contact. In a surface mount operation, the package is placed on a circuit board such that each terminal on the package is aligned with a corresponding contact pad on the circuit board. Solder or other solder material is provided between the terminals and the contact pads. The package is permanently soldered to the correct place by heating the assembly to melt or "reflow" the solder or activate the solder material.

許多封裝包含焊球形式的焊料質塊,其直徑通常約0.1mm以及約0.8mm(5密爾以及30密爾),該些焊球會被附接至封裝的終端。具有一從其底部表面處突出的焊球陣列的封裝通常稱為球格柵陣列或「BGA(Ball Grid Array)」封裝。被稱為平台格柵陣列或「LGA(Land Grid Array)」封裝的其它封裝會藉由焊料所形成的薄層或平台被固定至基板。此類型的封裝會相當精簡。一般被稱為「晶片級封裝」的特定封裝佔據該電路板的面積會等於或略大於該封裝中所併入的裝置的面積。優點在於其會縮減組件的總尺寸並且允許在基板上的各種裝置之間使用短互連線,其因而會限制裝置之間的訊號傳播時間並且因此有助於該組件高速運作。 Many packages contain solder bumps in the form of solder balls, typically about 0.1 mm in diameter and about 0.8 mm (5 mils and 30 mils), which are attached to the terminals of the package. A package having an array of solder balls protruding from its bottom surface is commonly referred to as a ball grid array or a "BGA (Ball Grid Array)" package. Other packages, referred to as platform grid arrays or "LGA (Land Grid Array)" packages, are secured to the substrate by a thin layer or platform formed by solder. This type of package can be quite streamlined. A particular package, commonly referred to as a "wafer level package," occupies an area of the board that is equal to or slightly larger than the area of the device incorporated in the package. The advantage is that it reduces the overall size of the assembly and allows for the use of short interconnects between the various devices on the substrate, which in turn limits the signal propagation time between the devices and thus facilitates high speed operation of the assembly.

經封裝的半導體晶片經常以「堆疊」排列的方式來提供,其中,舉例來說,其中一個封裝被提供在一電路板上而另一個封裝被裝設在該第一封裝的頂端。此些排列能夠讓數個不同的晶片被裝設在一電路板上的單一覆蓋範圍內並且能夠藉由在封裝之間提供短互連線而進一步幫助進行高速運作。經常,此互連距離僅略大於晶片本身的厚度。為在一晶片封裝堆疊內達成互連,必須在每一個封裝的兩側(最頂端的封裝除外)提供用於機械與電氣連接的結構。舉例來說,這可藉由在裝設著該晶片的基板的兩側提供接觸觸墊或平台而達成,該些觸墊會藉由導體通孔或類似物被連接貫穿該基板。焊球或類似物已經被用來橋接一下方基板頂端的接點之間的間隙至下一個較高基板底部的接點。該些焊球必須高於晶片的高度,以便連接該些接點。堆疊晶片排列與戶連結構的範例提供在美國專利申請公開案第2010/0232129號(「'129公開案」)中,本文以引用的方式將其揭示內容完整併入。 Packaged semiconductor wafers are often provided in a "stacked" arrangement, wherein, for example, one package is provided on a circuit board and the other package is mounted on the top end of the first package. Such an arrangement enables several different wafers to be mounted within a single footprint on a circuit board and can further aid in high speed operation by providing short interconnects between the packages. Often, this interconnection distance is only slightly larger than the thickness of the wafer itself. To achieve interconnection within a chip package stack, a structure for mechanical and electrical connections must be provided on both sides of each package (except for the topmost package). For example, this can be achieved by providing contact pads or platforms on both sides of the substrate on which the wafer is mounted, the contact pads being connected through the substrate by conductor vias or the like. Solder balls or the like have been used to bridge the gap between the contacts at the top of a lower substrate to the contacts at the bottom of the next higher substrate. The solder balls must be higher than the height of the wafer in order to connect the contacts. An example of a stacked wafer arrangement and a hull structure is provided in U.S. Patent Application Publication No. 2010/0232129 ("the '129 publication"), the disclosure of which is incorporated herein in its entirety.

具有狹長杆柱或接針形式的微電子元件可以被用來連接微電子封裝至電路板並且用於微電子封裝中的其它連接。於某些實例中,微接點係藉由蝕刻一金屬結構而被形成,該金屬結構包含用以形成該些微接點的一或更多金屬層。該蝕刻製程會限制該些微接點的尺寸。習知的蝕刻製程通常無法形成大高度與最大寬度比(本文中稱為「深寬比(aspect ratio)」)的微接點。其很難,甚至不可能,形成具有顯著高度且相鄰微接點之間有超小間距或間隔的微接點陣列。再者,習知蝕刻製程所形成的微接點的配置亦會受到限制。 Microelectronic components in the form of elongated poles or pins can be used to connect the microelectronic package to the board and for other connections in the microelectronic package. In some examples, the micro contacts are formed by etching a metal structure comprising one or more metal layers for forming the micro contacts. The etching process limits the size of the micro contacts. Conventional etching processes typically do not form microcontacts of large height to maximum width ratio (referred to herein as "aspect ratio"). It is difficult, if not impossible, to form a micro-contact array with a significant height and ultra-small spacing or spacing between adjacent micro-contacts. Moreover, the configuration of the micro contacts formed by the conventional etching process is also limited.

上面的所有說明雖然在本技術中已有進步;但是,本發明仍 希望在製造與測試微電子封裝中作進一步改良。 All of the above descriptions have progressed in the art; however, the present invention remains It is desirable to make further improvements in manufacturing and testing microelectronic packages.

本文中所揭的係微電子元件以及一種製造微電子元件的方法。 Described herein are microelectronic components and a method of fabricating microelectronic components.

於一實施例中,一種形成被連接至基板的複數條焊線的方法可以包含:定位下面至少其中一者:一焊接治具與一向下延伸超越其一面的電線的一部分;或是,相對於彼此來定位一形成表面,俾使得向下延伸超越該焊接治具之一面的電線部分的一末端被定位成其與該焊接治具面相隔的深度大於與該形成表面相隔的深度。該電線部分可以為一第一電線部分,而且該第一電線部分的延伸可以藉由焊接該電線的一第二部分至一第二焊接表面來實施,並且接著移動該焊接治具面至該第二焊接表面所在的平面上方的較大高度處,俾使得,該第一電線部分可以朝外延伸超越該焊接治具的該面,並且接著切斷該電線而分離該第一電線部分與該第二電線部分。切斷該電線的步驟可以包含夾鉗該電線並且拉緊該受夾鉗的電線,以便讓該受夾鉗的電線在介於該些第一電線部分與第二電線部分之間的邊界處斷裂。切斷該電線的步驟可以包含夾鉗該電線並且拉緊該受夾鉗的電線,以便讓該受夾鉗的電線在該第一電線部分與該第二電線部分之間斷裂、在一預設的長度處斷裂;及/或可以包含夾鉗且拉緊複數條電線,以便讓該些受夾鉗的電線在複數個不同的預設長度處斷裂。 In one embodiment, a method of forming a plurality of bonding wires connected to a substrate can include: positioning at least one of: a soldering fixture and a portion of a wire extending downwardly beyond a side thereof; or, relative to One surface is positioned to each other such that an end of the wire portion extending downward beyond one of the faces of the welding jig is positioned such that it is spaced apart from the surface of the welding jig by a depth greater than a depth from the forming surface. The wire portion may be a first wire portion, and the extension of the first wire portion may be performed by welding a second portion of the wire to a second welding surface, and then moving the welding fixture surface to the first a greater height above the plane where the welding surface is located, such that the first wire portion can extend outward beyond the face of the welding fixture, and then the wire is severed to separate the first wire portion from the first Two wire parts. The step of cutting the wire may include clamping the wire and tightening the wire of the clamp to cause the wire of the clamp to break at a boundary between the first wire portion and the second wire portion . The step of cutting the wire may include clamping the wire and tightening the wire of the clamp to cause the wire of the clamp to break between the first wire portion and the second wire portion at a preset Breaking at a length; and/or may include a clamp and tensioning the plurality of wires to cause the clamped wires to break at a plurality of different predetermined lengths.

該焊接治具可以在平行於該焊接治具之該面的第一方向中沿著該第一形成表面移動,以便將該電線部分朝該焊接治具彎折。當使用該焊接治具的步驟被實施用以焊接該鑄造表面至該焊接表面時,該焊接表 面會裸露在一基板的一表面處。一微電子元件可以被裝設至該基板並且與該基板電互連,俾使得該微電子元件會與至少一部分該些焊線電互連。 The welding jig can be moved along the first forming surface in a first direction parallel to the face of the welding jig to bend the wire portion toward the welding jig. The welding table is used when the step of using the welding jig is performed to weld the casting surface to the welding surface The face is exposed at a surface of a substrate. A microelectronic component can be mounted to and electrically interconnected to the substrate such that the microelectronic component is electrically interconnected with at least a portion of the bond wires.

該第一形成表面可以包含一溝槽,而且沿著該第一形成表面移動該焊接治具的步驟可以包含沿著該溝槽的長度於該第一方向中移動該焊接治具面,俾使得該電線部分的至少一部分會在該溝槽內移動。該第一形成表面可以為其中有一開口的一形成元件的一表面,而且該定位步驟可以包含定位該焊接治具使得該電線部分至少部分延伸至該開口之中。該開口可以包含一相鄰於該第一形成表面的漸細部分,而且該漸細部分可以被配置成用以引導該電線部分朝向該第一形成表面的一預設位置。該第一形成表面可以為其中有一開口的一形成元件的一表面。該定位步驟可以包含定位該焊接治具使得該電線部分至少部分延伸至該開口之中。該開口可以包含一相鄰於該第一形成表面的漸細部分,而且該漸細部分可以被配置成用以引導該電線部分至該溝槽之中。 The first forming surface may include a groove, and the step of moving the welding jig along the first forming surface may include moving the welding jig surface in the first direction along a length of the groove, such that At least a portion of the wire portion moves within the groove. The first forming surface can be a surface of an forming element having an opening therein, and the positioning step can include positioning the welding fixture such that the wire portion extends at least partially into the opening. The opening may include a tapered portion adjacent the first forming surface, and the tapered portion may be configured to guide the wire portion toward a predetermined position of the first forming surface. The first forming surface may be a surface of an forming element having an opening therein. The positioning step can include positioning the welding fixture such that the wire portion extends at least partially into the opening. The opening may include a tapered portion adjacent the first forming surface, and the tapered portion may be configured to guide the wire portion into the groove.

移動該焊接治具的步驟可以包含移動該焊接治具至該開口之中,俾使得該電線部分至少部分延伸至該開口之中。該鑄造表面可以被設置在該開口裡面。該鑄造表面可以包含一溝槽,其深度小於該電線部分的直徑。該開口可以為一第一開口,而且該形成元件包含一第二開口。移動該焊接治具的步驟可以包含移動該焊接治具至該第二開口之中,俾使得該電線部分至少部分延伸至該第二開口之中。該鑄造表面可以被設置在該第二開口裡面。 The step of moving the welding fixture can include moving the welding fixture into the opening such that the wire portion extends at least partially into the opening. The casting surface can be placed inside the opening. The casting surface can include a groove having a depth that is less than the diameter of the wire portion. The opening can be a first opening and the forming element includes a second opening. The step of moving the welding fixture can include moving the welding fixture into the second opening such that the wire portion extends at least partially into the second opening. The casting surface can be disposed within the second opening.

該些焊線中的一第一焊線可以被調適成用以攜載一第一訊號電位,以及該些焊線中的一第二焊線可以被調適成用以同步攜載一不同 於第一訊號電位的第二訊號電位。該些焊線中的至少兩者可以被焊接至該複數個焊接表面中的單一焊接表面。這可以改良該些焊線的自由端的公差。舉例來說,於已揭的實施例中,該些焊線的自由端的間距可以為彼此相隔150微米、200微米、300微米、或是400微米,並且可以在笛卡兒座標系統(Cartesian coordinate system)中有不同的x方向或y方向。該些焊線的自由端的間距可以為150或200,並且對小於+/-25微米的自由端來說可以有3個西格碼的公差,也就是,和分佈中心偏離三個標準差。 One of the plurality of bonding wires can be adapted to carry a first signal potential, and one of the bonding wires can be adapted to simultaneously carry a different The second signal potential at the first signal potential. At least two of the wire bonds can be welded to a single one of the plurality of weld surfaces. This can improve the tolerance of the free ends of the wire bonds. For example, in the disclosed embodiment, the free ends of the bonding wires may be spaced apart from each other by 150 micrometers, 200 micrometers, 300 micrometers, or 400 micrometers, and may be in a Cartesian coordinate system. There are different x or y directions in ). The free ends of the wire bonds may have a pitch of 150 or 200, and for a free end less than +/- 25 microns, there may be a tolerance of 3 sigma codes, i.e., three standard deviations from the center of the distribution.

該焊接治具接著可以在橫切過該焊接治具面的第二方向中移動,俾使得延伸遠離該焊接治具面的該焊接治具的裸露壁係面向延伸遠離該第一形成表面的第二形成表面。該些第一形成表面與第二形成表面可以被設置在一形成站處,而且在該些第一方向與第二方向中移動該焊接治具的步驟可以在該形成站處被實施。該第二形成表面可以和該第一形成表面成第一角度傾斜遠離該第一形成表面,而且該裸露的焊接治具壁可以該第一角度傾斜遠離該焊接治具面。該第二形成表面可以為一相對於至少一第三表面為凹陷的通道。使用該焊接治具的步驟可以在一焊接站處被實施。該焊接治具可以受到一焊接頭支撐,並且在鑄造該電線部分的一部分之前,藉以從該形成站處移動該焊接頭及被支撐的焊接治具至該焊接站。該電線部分可以朝該焊接治具的裸露壁彎折。 The welding jig can then be moved in a second direction transverse to the surface of the welding jig such that the bare wall of the welding jig extending away from the welding jig surface faces away from the first forming surface Two form a surface. The first forming surface and the second forming surface may be disposed at a forming station, and the step of moving the welding jig in the first and second directions may be performed at the forming station. The second forming surface may be inclined away from the first forming surface at a first angle to the first forming surface, and the bare welding fixture wall may be inclined away from the welding jig surface by the first angle. The second forming surface may be a channel that is recessed relative to the at least one third surface. The step of using the welding jig can be carried out at a welding station. The welding fixture can be supported by a welding head and the welding head and the supported welding fixture are moved from the forming station to the welding station before casting a portion of the wire portion. The wire portion can be bent toward the exposed wall of the welding fixture.

介於該焊接治具面與一鑄造表面之間的電線部分的一部分可以被鑄造。該鑄造表面可以被設置在該形成站處,而且鑄造介於該焊接治具面與該鑄造表面之間的電線部分的一部分的步驟可以在該形成站處被實施。當使用該焊接治具的步驟被實施用以焊接該電線部分至該焊接表面 時,該已鑄造部分可以阻止在橫向方向中的移動。該電線部分的該已鑄造部分可以有一平坦表面,而且使用該焊接治具的步驟可以將該已鑄造部分的該平坦表面焊接至該焊接表面,並且可以在該電線中放置一永久性的塑膠結。該電線部分的該已鑄造部分可以有一由隆起特徵元件及凹陷特徵元件組成的經圖樣化面,而且使用該焊接治具的步驟可以將該已鑄造部分的該經圖樣化面焊接至該焊接表面。 A portion of the wire portion between the weld fixture face and a casting surface can be cast. The casting surface can be disposed at the forming station, and the step of casting a portion of the wire portion between the welding jig face and the casting surface can be performed at the forming station. The step of using the welding jig is performed to weld the wire portion to the welding surface The cast portion can prevent movement in the lateral direction. The cast portion of the wire portion may have a flat surface, and the step of using the welding jig may weld the flat surface of the cast portion to the soldering surface, and a permanent plastic knot may be placed in the wire . The cast portion of the wire portion may have a patterned surface comprised of a raised feature and a recessed feature, and the step of using the weld fixture may weld the patterned face of the cast portion to the weld surface .

該焊接治具可以被用來焊接該電線部分的該已鑄造部分至該基板的一導電焊接表面用以形成一焊線,同時讓遠離該已鑄造部分的該電線部分的末端保持未被焊接。該焊接治具可以有一毛細管,該電線部分會伸出該毛細管並且該焊接治具的面可以為該毛細管的面。該焊接治具可以為一超音波焊接治具,該電線部分會伸出該超音波焊接治具並且該超音波焊接治具的面可以為該焊接治具的面。該超音波焊接治具與該些形成表面可以與一共同焊接頭組裝在一起。此些步驟可以重複進行,用以形成複數條該些焊線至該焊接表面中的至少其中一者。 The welding fixture can be used to weld the cast portion of the wire portion to a conductive soldering surface of the substrate to form a bond wire while leaving the end of the wire portion remote from the cast portion unwelded. The welding fixture can have a capillary that extends out of the capillary and the face of the welding fixture can be the face of the capillary. The welding fixture can be an ultrasonic welding fixture, the wire portion extending out of the ultrasonic welding fixture and the surface of the ultrasonic welding fixture can be the surface of the welding fixture. The ultrasonic welding jig and the forming surfaces can be assembled with a common welding head. These steps may be repeated to form a plurality of the plurality of bonding wires to at least one of the soldering surfaces.

在形成該複數條焊線之後,一囊封層可以被形成疊置在該些一或更多個焊接表面上方。該囊封層可以被形成用以至少部分覆蓋該焊接表面與該些焊線。每一條焊線的一未被囊封部分可以由此焊線的一末端表面或是未被該囊封層覆蓋的此焊線的一邊緣表面中至少其中一者的一部分來定義。 After forming the plurality of bond wires, an encapsulation layer can be formed overlying the one or more soldering surfaces. The encapsulation layer can be formed to at least partially cover the soldering surface and the bonding wires. An unencapsulated portion of each of the bonding wires may be defined by an end surface of the bonding wire or a portion of at least one of the edge surfaces of the bonding wire not covered by the encapsulating layer.

一微電子封裝可以包含一構件,例如,一基板,其具有一第一表面以及一和該第一表面反向的第二表面。該構件的第一表面可以有一第一區以及一第二區。該微電子元件可以疊置在該第一區上方。該些導電 元件可以在該構件第一表面或第二表面的至少其中一者處裸露在該第二區內。該囊封層可以疊置在該構件的至少該第二區上方。該些焊線的該些未被囊封部分可以包含該些焊線的末端。該些焊線中的一第一焊線可以被配置成用以攜載一第一訊號電位以及該些焊線中的一第二焊線可以被配置成用以同步攜載一不同於第一訊號電位的第二訊號電位。每一條焊線都可以有一邊緣表面縱向延伸至此焊線的末端,而且該些焊線的未被囊封部分可以由該些焊線的末端以及未被該囊封層覆蓋相鄰於該些末端的邊緣表面中的一部分來定義。該些焊線中至少其中一者的未被囊封部分可以疊置在該微電子元件的一主要表面上方。該些焊線中至少其中一者的一末端可以在平行於該基板之第一表面的方向中和其基底偏移至少一距離,其等於該些複數個導體元件中相鄰導體元件之間的最小間距以及100微米中的其中一者。該些焊線中至少其中一者可以包含介於其未被囊封部分與該至少一焊線所接合的導體元件之間的至少一彎折。該至少一焊線的該彎折遠離其未被囊封部分以及該至少一焊線所接合的導體元件。該至少一焊線的未被囊封部分可以疊置在該微電子元件的一主要表面上方。該些焊線可以第一圖樣在多個位置處被接合至該些導體元件,該第一圖樣在該些導體元件中的相鄰導體元件之間有一第一最小間距。該些焊線的未被囊封部分可以第二圖樣被設置在多個位置處,該第二圖樣在該複數條焊線的相鄰焊線未被囊封部分之間有一第二最小間距。該第二最小間距可以大於該第一最小間距。該至少一微電子元件可以包含於該第一區內疊置在該第一表面上方的第一微電子元件與第二微電子元件。該些導體元件中的至少一部分可以電連接該第一微電子元件。該些導體元件中的至少一部分可以電連接該第二 微電子元件。該第一微電子元件與該第二微電子元件可以在該微電子封裝內相互電連接。該些第一導體元件中的至少其中一者可以接合該些焊線中的至少兩條焊線。 A microelectronic package can include a component, such as a substrate having a first surface and a second surface opposite the first surface. The first surface of the member may have a first zone and a second zone. The microelectronic component can be stacked over the first region. The conductive The component may be exposed in the second zone at at least one of the first surface or the second surface of the member. The encapsulation layer can be stacked over at least the second region of the member. The unencapsulated portions of the bonding wires may include the ends of the bonding wires. One of the plurality of bonding wires may be configured to carry a first signal potential and a second one of the bonding wires may be configured to be synchronously carried by a different one than the first The second signal potential of the signal potential. Each of the bonding wires may have an edge surface extending longitudinally to the end of the bonding wire, and the unencapsulated portions of the bonding wires may be covered by the ends of the bonding wires and not covered by the encapsulating layer adjacent to the ends Part of the edge surface is defined. The unencapsulated portion of at least one of the bonding wires may be stacked over a major surface of the microelectronic component. One end of at least one of the bonding wires may be offset from the substrate by at least a distance in a direction parallel to the first surface of the substrate, which is equal to between adjacent ones of the plurality of conductor elements Minimum spacing and one of 100 microns. At least one of the wire bonds can include at least one bend between a conductor element that is not bonded to the at least one wire bond. The bend of the at least one bond wire is away from the conductor element that is not bonded by the encapsulated portion and the at least one bond wire. The unencapsulated portion of the at least one bond wire may be stacked over a major surface of the microelectronic component. The bonding wires may be bonded to the conductor elements at a plurality of locations in the first pattern, the first pattern having a first minimum spacing between adjacent ones of the conductor elements. The unencapsulated portions of the bonding wires may be disposed at a plurality of locations in a second pattern, the second pattern having a second minimum spacing between adjacent portions of the plurality of bonding wires that are not encapsulated portions. The second minimum spacing can be greater than the first minimum spacing. The at least one microelectronic component can include a first microelectronic component and a second microelectronic component stacked over the first surface in the first region. At least a portion of the plurality of conductor elements can electrically connect the first microelectronic element. At least a portion of the conductor elements can be electrically connected to the second Microelectronic components. The first microelectronic component and the second microelectronic component can be electrically connected to each other within the microelectronic package. At least one of the first conductor elements can engage at least two of the plurality of bond wires.

至少一微電子元件可以疊置在該第一表面上方。多個導電元件可以裸露在該基板的該第一表面或該第二表面的至少其中一者處。該些導體元件中的至少一部分可以電連接該至少一微電子元件。複數條焊線可以各有一已鑄造部分,其被接合至該些導體元件中的一導體元件。一未被鑄造部分可以在縱向方向中延伸遠離該已鑄造部分。一過渡部分可以連接該些未被鑄造部分及已鑄造部分。該已鑄造部分在橫切於該縱向方向的橫向方向中的寬度可以大於該未被鑄造部分的寬度。該過渡部分的寬度可以隨著靠近該未被鑄造部分而縮減。該些焊線可以有遠離該些個別焊線之已鑄造部分以及該構件的末端。一囊封層可以延伸自該些第一表面或第二表面中的至少其中一者並且可以覆蓋該些焊線的一部分,俾使得該些焊線的被覆蓋部分藉由該囊封層而彼此分離。該些焊線的未被囊封部分可以由該些焊線中沒有被該囊封層覆蓋的部分來定義。該些未被鑄造部分中的至少一部分可以有圓柱形狀。該些焊線的至少一部分的末端可以沒有被該囊封層覆蓋。 At least one microelectronic component can be stacked over the first surface. A plurality of electrically conductive elements may be exposed at at least one of the first surface or the second surface of the substrate. At least a portion of the plurality of conductor elements can electrically connect the at least one microelectronic element. The plurality of wire bonds can each have a cast portion that is bonded to one of the conductor elements. An uncast portion may extend away from the cast portion in the longitudinal direction. A transition portion may connect the uncast portions and the cast portions. The width of the cast portion in the transverse direction transverse to the longitudinal direction may be greater than the width of the uncast portion. The width of the transition portion may be reduced as it approaches the uncast portion. The wire bonds may have a cast portion remote from the individual wire bonds and an end of the member. An encapsulation layer may extend from at least one of the first surface or the second surface and may cover a portion of the bonding wires such that the covered portions of the bonding wires are mutually sealed by the encapsulating layer Separation. The unencapsulated portions of the wire bonds may be defined by portions of the wire bonds that are not covered by the encapsulation layer. At least a portion of the uncast portions may have a cylindrical shape. The ends of at least a portion of the wire bonds may not be covered by the encapsulation layer.

根據本發明一觀點的微電子封裝包括一構件,其具有一表面以及位在該表面處的複數個導體元件。複數條焊線可以有被接合至該些導體元件的第一末端以及遠離該些第一末端的第二末端,該些焊線的長度介於它們個別的第一末端與第二末端之間。一硬化層會疊置在該表面上方並且覆蓋每一條焊線的長度的一第一部分。一囊封層疊置在位於該構件之該 表面上的該硬化層上方並且覆蓋每一條焊線的長度的一第二部分。該些焊線的第二末端會在該硬化層上且遠離硬化層的該囊封層的一表面處至少部分沒有被該囊封層覆蓋。 A microelectronic package in accordance with one aspect of the present invention includes a member having a surface and a plurality of conductor elements positioned at the surface. The plurality of bond wires may have a first end joined to the conductor elements and a second end remote from the first ends, the wire wires having a length between their respective first and second ends. A hardened layer overlies the surface and covers a first portion of the length of each bond wire. An encapsulation layer is placed on the member The hardened layer on the surface is over and covers a second portion of the length of each wire. The second ends of the bonding wires may be at least partially not covered by the encapsulating layer on the hardened layer and at a surface of the encapsulating layer away from the hardened layer.

根據本發明的一或更多項觀點,該構件係一基板。該微電子封裝可以進一步包含一隆起的材料區,其在平行於該構件之表面的至少一方向中至少部分鄰接該硬化層。 According to one or more aspects of the invention, the component is a substrate. The microelectronic package can further include a raised region of material that at least partially abuts the hardened layer in at least one direction parallel to a surface of the member.

根據本發明的一或更多項觀點,該硬化層會覆蓋該些焊線之長度的至少10%。於一特殊的觀點中,該硬化層會覆蓋該些焊線之長度的至少50微米。 According to one or more aspects of the present invention, the hardened layer covers at least 10% of the length of the wire bonds. In a particular aspect, the hardened layer covers at least 50 microns of the length of the bond wires.

根據本發明的一或更多項觀點,每一條焊線會被拼焊至該些導體元件中其中一者。 In accordance with one or more aspects of the present invention, each wire bond is tailor welded to one of the conductor elements.

根據本發明的一或更多項觀點,該些焊線上會有焊接治具標記,相鄰於該些焊線的第二末端。 In accordance with one or more aspects of the present invention, the weld lines have weld fixture marks adjacent to the second ends of the weld lines.

根據本發明的一或更多項觀點,該焊接治具標記會係一球形區。 In accordance with one or more aspects of the present invention, the welding fixture indicia will be a spherical region.

根據本發明的一或更多項觀點,該些焊線在相鄰於該些焊線之第二末端的至少其中一個方向中會為漸細。 In accordance with one or more aspects of the present invention, the wire bonds may be tapered in at least one of the directions adjacent the second ends of the wire bonds.

根據本發明的一或更多項觀點,該些電線的第二末端會以和該囊封層之表面所定義的一平面成65至90度的角度突出遠離該囊封層。 In accordance with one or more aspects of the present invention, the second ends of the wires may protrude away from the encapsulation layer at an angle of 65 to 90 degrees from a plane defined by the surface of the encapsulation layer.

根據本發明的一項觀點,一種形成微電子封裝的方法包含形成複數條焊線,每一條皆有一第一末端被焊接至一構件的一表面處的複數個導體元件中的一導體元件。該些焊線會有遠離該些第一末端的第二末 端,並且長度介於它們個別的第一末端與第二末端之間。一第一層會被形成疊置在該構件的該表面上方並且覆蓋每一條焊線的長度的一第一部分。一第二層會被形成疊置在位於該構件之該表面上的該第一層上方並且覆蓋每一條焊線的長度的一第二部分。該些焊線的第二末端能夠未被該第二層覆蓋,其中,該些第二末端係在該第一層上面的該第二層的一表面處並且遠離該第一層。該第一層能夠在形成該第二層期間抑制該些焊線的第二末端移動。 In accordance with one aspect of the invention, a method of forming a microelectronic package includes forming a plurality of bond wires each having a first end that is soldered to a conductor element of a plurality of conductor elements at a surface of a component. The wire bonds will have a second end away from the first ends The ends are between their respective first and second ends. A first layer will be formed overlying the surface of the member and covering a first portion of the length of each bond wire. A second layer is formed overlying the first layer over the surface of the member and covering a second portion of the length of each bond wire. The second ends of the bonding wires can be uncovered by the second layer, wherein the second ends are at a surface of the second layer above the first layer and away from the first layer. The first layer is capable of inhibiting movement of the second ends of the plurality of bonding wires during formation of the second layer.

根據本發明的一或更多項特殊觀點,該些第一層與第二層會有不同的材料特性。形成該第一層會包含固化該第一層,且其中,形成該第二層會在形成該第一層之後才進行。 According to one or more particular aspects of the invention, the first layer and the second layer will have different material properties. Forming the first layer will include curing the first layer, and wherein forming the second layer will occur after forming the first layer.

根據本發明的一或更多項特殊觀點,該第一層會係一硬化層以及該第二層會係一囊封層。 In accordance with one or more particular aspects of the present invention, the first layer will be a hardened layer and the second layer will be an encapsulating layer.

根據本發明的一或更多項特殊觀點,該方法可以進一步包含在形成該第一層之前提供一隆起區。於此情況中,該隆起區可以在平行於該構件之該表面的至少一方向中至少部分含有該第一層的一材料。 In accordance with one or more particular aspects of the present invention, the method can further include providing a raised region prior to forming the first layer. In this case, the raised region may contain at least a portion of the material of the first layer in at least one direction parallel to the surface of the member.

根據本發明的一或更多項特殊觀點,該方法可以進一步包含在形成該第二層中沉積該第二層的材料之前先插設該些焊線於一可移除膜之中,並且會包含接著移除該可移除膜。根據本發明的此些一或更多項觀點,該可移除膜會抑制該第二材料覆蓋該些焊線的第二末端。 According to one or more particular aspects of the present invention, the method may further include interposing the bonding wires in a removable film prior to forming the material of the second layer in the second layer, and Including the removal of the removable film. In accordance with one or more aspects of the present invention, the removable film inhibits the second material from covering the second ends of the wire bonds.

下文會更完整說明本揭示內容的此些與其它實施例。 These and other embodiments of the present disclosure are more fully described below.

10‧‧‧微電子組件 10‧‧‧Microelectronic components

12‧‧‧基板 12‧‧‧Substrate

14‧‧‧第一表面 14‧‧‧ first surface

16‧‧‧第二表面 16‧‧‧ second surface

18‧‧‧第一區 18‧‧‧First District

20‧‧‧第二區 20‧‧‧Second District

22‧‧‧微電子元件 22‧‧‧Microelectronic components

24‧‧‧焊線 24‧‧‧welding line

28‧‧‧導體元件 28‧‧‧Conductor components

30‧‧‧觸墊 30‧‧‧ touch pads

32‧‧‧焊線 32‧‧‧welding line

34‧‧‧基底 34‧‧‧Base

36‧‧‧末端 End of 36‧‧‧

37‧‧‧邊緣表面 37‧‧‧Edge surface

38‧‧‧末端表面 38‧‧‧End surface

39‧‧‧未被囊封部分 39‧‧‧Unenclosed part

40‧‧‧第二導體元件 40‧‧‧Second conductor element

41‧‧‧通孔 41‧‧‧through hole

42‧‧‧囊封層 42‧‧‧encapsulated layer

43‧‧‧第二導體元件 43‧‧‧Second conductor element

43D‧‧‧第二導體元件 43D‧‧‧Second conductor element

44‧‧‧主要表面 44‧‧‧ main surface

45‧‧‧觸墊 45‧‧‧ touch pads

48‧‧‧第二導體元件 48‧‧‧Second conductor element

49‧‧‧開口 49‧‧‧ openings

110‧‧‧微電子組件 110‧‧‧Microelectronic components

112‧‧‧基板 112‧‧‧Substrate

114‧‧‧第一表面 114‧‧‧ first surface

116‧‧‧第二表面 116‧‧‧ second surface

118‧‧‧第一區 118‧‧‧First District

122‧‧‧微電子元件 122‧‧‧Microelectronic components

126‧‧‧焊料凸塊 126‧‧‧ solder bumps

128‧‧‧導體元件 128‧‧‧Conductor components

132‧‧‧焊線 132‧‧‧welding line

132A‧‧‧焊線 132A‧‧‧welding line

132B‧‧‧焊線 132B‧‧‧welding line

134‧‧‧基底 134‧‧‧Base

134A‧‧‧基底 134A‧‧‧Base

134B‧‧‧基底 134B‧‧‧Base

136‧‧‧末端 End of 136‧‧

138‧‧‧末端表面 138‧‧‧End surface

138A‧‧‧末端 End of 138A‧‧

138B‧‧‧末端 138B‧‧‧ end

139‧‧‧未被囊封部分 139‧‧‧Unencapsulated part

144‧‧‧表面 144‧‧‧ surface

146‧‧‧角度 146‧‧‧ angle

210‧‧‧微電子組件 210‧‧‧Microelectronic components

232‧‧‧焊線 232‧‧‧welding line

234‧‧‧基底 234‧‧‧Base

236‧‧‧末端 End of 236‧‧

238‧‧‧末端 End of 238‧‧‧

248‧‧‧彎曲部分 248‧‧‧Bend section

310‧‧‧微電子組件 310‧‧‧Microelectronic components

312‧‧‧基板 312‧‧‧Substrate

322‧‧‧微電子元件 322‧‧‧Microelectronic components

324‧‧‧導線 324‧‧‧ wire

325‧‧‧正面 325‧‧‧ positive

328B‧‧‧接點 328B‧‧‧Contacts

332A‧‧‧焊線 332A‧‧‧welding line

332B‧‧‧焊線 332B‧‧‧welding line

332Ci‧‧‧焊線 332Ci‧‧‧welding line

332Cii‧‧‧焊線 332Cii‧‧‧bonding wire

332D‧‧‧焊線 332D‧‧‧welding line

334A‧‧‧基底 334A‧‧‧Base

334B‧‧‧基底 334B‧‧‧Base

334Ci‧‧‧基底 334Ci‧‧‧Base

334Cii‧‧‧基底 334Cii‧‧‧Base

334D‧‧‧基底 334D‧‧‧Base

336A‧‧‧末端 End of 336A‧‧

336B‧‧‧末端 End of 336B‧‧

336Ci‧‧‧末端 336Ci‧‧‧ end

336Cii‧‧‧末端 336Cii‧‧‧ end

336D‧‧‧末端 336D‧‧‧ end

337A‧‧‧邊緣表面 337A‧‧‧Edge surface

337D‧‧‧邊緣表面 337D‧‧‧Edge surface

338A‧‧‧末端表面 338A‧‧‧ end surface

342‧‧‧囊封層 342‧‧‧encapsulated layer

344‧‧‧表面 344‧‧‧ surface

345‧‧‧凹陷表面 345‧‧‧ recessed surface

347‧‧‧側表面 347‧‧‧ side surface

348B‧‧‧彎曲部分 348B‧‧‧Bend section

348C‧‧‧彎曲部分 348C‧‧‧Bend section

350‧‧‧微電子元件 350‧‧‧Microelectronic components

380‧‧‧導線 380‧‧‧ wire

382‧‧‧導線 382‧‧‧Wire

384‧‧‧焊線 384‧‧‧welding line

386‧‧‧接觸表面 386‧‧‧ contact surface

410‧‧‧微電子組件 410‧‧‧Microelectronic components

412‧‧‧基板 412‧‧‧Substrate

414‧‧‧第一表面 414‧‧‧ first surface

421‧‧‧絕緣層 421‧‧‧Insulation

422‧‧‧微電子元件 422‧‧‧Microelectronic components

424‧‧‧主要表面 424‧‧‧Main surface

425‧‧‧正面 425‧‧‧ positive

426‧‧‧背表面 426‧‧‧Back surface

428‧‧‧導體元件 428‧‧‧Conductor components

432‧‧‧焊線 432‧‧‧welding line

434‧‧‧基底 434‧‧‧Base

436‧‧‧末端 End of 436‧‧

438‧‧‧末端表面 438‧‧‧End surface

448‧‧‧彎曲部分 448‧‧‧Bend section

452‧‧‧焊料質塊 452‧‧‧ solder mass

488‧‧‧微電子組件 488‧‧‧Microelectronic components

489‧‧‧微電子元件 489‧‧‧Microelectronic components

490‧‧‧印刷電路板(PCB) 490‧‧‧Printed circuit board (PCB)

492‧‧‧接點 492‧‧‧Contacts

510‧‧‧微電子組件 510‧‧‧Microelectronic components

512‧‧‧基板 512‧‧‧Substrate

513‧‧‧導線 513‧‧‧Wire

515‧‧‧導線座 515‧‧‧ wire holder

518‧‧‧第一區 518‧‧‧First District

520‧‧‧第二區 520‧‧‧Second District

524‧‧‧焊線 524‧‧‧welding line

528‧‧‧導體元件 528‧‧‧Conductor components

532‧‧‧焊線 532‧‧‧welding line

534‧‧‧基底 534‧‧‧Base

538‧‧‧末端 End of 538‧‧‧

542‧‧‧囊封層 542‧‧‧Encapsulation layer

544‧‧‧表面 544‧‧‧ surface

610A‧‧‧封裝 610A‧‧‧ package

610B‧‧‧封裝 610B‧‧‧ package

620‧‧‧底部填充層 620‧‧‧ underfill layer

632‧‧‧焊線 632‧‧‧welding line

642‧‧‧表面 642‧‧‧ surface

644‧‧‧表面 644‧‧‧ surface

652‧‧‧焊料質塊 652‧‧‧ solder mass

690‧‧‧電路鑲板 690‧‧‧Circuit paneling

692‧‧‧第一表面 692‧‧‧ first surface

712‧‧‧基板 712‧‧‧Substrate

728‧‧‧導體元件 728‧‧‧Conductor components

730‧‧‧表面 730‧‧‧ surface

731‧‧‧核心 731‧‧‧ core

732A‧‧‧焊線 732A‧‧‧welding line

732B‧‧‧焊線 732B‧‧‧welding line

732D‧‧‧焊線 732D‧‧‧welding line

732F‧‧‧焊線 732F‧‧‧welding line

733‧‧‧金屬拋光漆 733‧‧‧Metal polishing paint

736‧‧‧向上延伸部分 736‧‧‧Upward extension

738A‧‧‧末端 End of 738A‧‧‧

738B‧‧‧末端 End of 738B‧‧‧

738D‧‧‧球狀部分 738D‧‧‧spherical part

739‧‧‧未被囊封部分 739‧‧‧Unencapsulated part

740‧‧‧質心 740‧‧‧ centroid

741‧‧‧徑向方向 741‧‧‧ radial direction

744‧‧‧直徑 744‧‧‧diameter

746‧‧‧直徑 746‧‧‧diameter

750‧‧‧角度 750‧‧‧ angle

751‧‧‧囊封層 751‧‧‧encapsulated layer

752‧‧‧表面 752‧‧‧ surface

800‧‧‧經整形的電線部分 800‧‧‧ Shaped wire section

801‧‧‧方向 801‧‧‧ Direction

802‧‧‧預設長度 802‧‧‧Preset length

803‧‧‧深度(圖14A) 803‧‧‧Deep (Fig. 14A)

803‧‧‧夾鉗器(圖32B) 803‧‧‧Clamps (Fig. 32B)

804‧‧‧焊接治具 804‧‧‧ welding fixture

805‧‧‧削切刀片 805‧‧‧Cut cutting blade

806‧‧‧毛細管面 806‧‧‧Capillary surface

807‧‧‧開口 807‧‧‧ openings

808‧‧‧開口 808‧‧‧ openings

809‧‧‧雷射 809‧‧‧Laser

810‧‧‧形成元件 810‧‧‧ forming components

811‧‧‧溝槽 811‧‧‧ trench

812‧‧‧表面 812‧‧‧ surface

813‧‧‧第二表面 813‧‧‧ second surface

814‧‧‧第一方向 814‧‧‧First direction

815‧‧‧溝槽 815‧‧‧ trench

816‧‧‧內表面 816‧‧‧ inner surface

817‧‧‧第二方向 817‧‧‧second direction

818‧‧‧方向 818‧‧‧ directions

819‧‧‧通道或溝槽 819‧‧‧channels or trenches

820‧‧‧毛細管裸露壁 820‧‧‧Capillary exposed wall

821‧‧‧外框架 821‧‧‧External framework

823‧‧‧形成表面(圖14A) 823‧‧‧ Forming the surface (Fig. 14A)

823‧‧‧凹腔(圖34C) 823‧‧‧ cavity (Fig. 34C)

824‧‧‧模版單元 824‧‧‧Template unit

825‧‧‧電線部分的一部分 825‧‧‧ part of the wire part

826‧‧‧上表面 826‧‧‧ upper surface

827‧‧‧電線部分的一部分 827‧‧‧ part of the wire part

828‧‧‧孔洞 828‧‧‧ holes

829‧‧‧邊緣 829‧‧‧ edge

830‧‧‧第一開口或凹部 830‧‧‧First opening or recess

831‧‧‧電線部分的一部分 Part of the 831‧‧‧ wire section

832‧‧‧漸細部分、通道、或溝槽 832‧‧‧ tapered parts, channels, or grooves

833‧‧‧平坦面 833‧‧‧flat surface

834‧‧‧通道或溝槽 834‧‧‧channels or trenches

838‧‧‧末端 End of 838‧‧‧

840‧‧‧開口或凹部 840‧‧‧ openings or recesses

844‧‧‧焊接頭 844‧‧‧welding head

850‧‧‧形成元件 850‧‧‧ forming components

851‧‧‧邊緣 851‧‧‧ edge

852‧‧‧凹陷 852‧‧‧ dent

854‧‧‧漸細部分或通道 854‧‧‧thin section or passage

855‧‧‧寬度 855‧‧‧Width

860‧‧‧第一形成表面 860‧‧‧First surface formation

861‧‧‧邊緣 Edge of 861‧‧

862‧‧‧第一形成表面的一區域 862‧‧‧ First area forming the surface

864‧‧‧第二形成表面 864‧‧‧Second forming surface

865‧‧‧角度 865‧‧‧ angle

866‧‧‧第二凹陷 866‧‧‧second depression

867‧‧‧角度 867‧‧‧ angle

868‧‧‧裸露壁 868‧‧‧Bare wall

870‧‧‧鑄造表面 870‧‧‧ casting surface

880‧‧‧形成站 880‧‧‧ forming station

882‧‧‧焊線站 882‧‧‧welding station

884‧‧‧構件 884‧‧‧ components

932‧‧‧焊線 932‧‧‧welding line

933‧‧‧周圍 Around 933‧‧

934‧‧‧基底 934‧‧‧Base

938‧‧‧末端 End of 938‧‧

1010‧‧‧形成單元 1010‧‧‧ forming unit

1014A‧‧‧橫向方向 1014A‧‧‧ transverse direction

1016‧‧‧方向 1016‧‧‧ Direction

1018‧‧‧第三表面 1018‧‧‧ third surface

1020‧‧‧外表面 1020‧‧‧ outer surface

1022‧‧‧基底的一部分 1022‧‧‧ part of the base

1022A‧‧‧焊線的一部分 Part of the 1022A‧‧‧ welding line

1024‧‧‧第三表面 1024‧‧‧ third surface

1026‧‧‧電線的向上突出部分 1026‧‧‧Upward projection of the wire

1034‧‧‧基底 1034‧‧‧Base

1036‧‧‧電線的向上突出部分 1036‧‧‧Upward protruding part of the wire

1038‧‧‧末端 End of 1038‧‧

1048‧‧‧電線的一部分 1048‧‧‧ part of the wire

1102‧‧‧臨時膜 1102‧‧‧ Temporary film

1110‧‧‧模具平板 1110‧‧‧Mold plate

1111‧‧‧模具平板 1111‧‧‧Mold plate

1112‧‧‧凹腔 1112‧‧‧ cavity

1132‧‧‧焊線 1132‧‧‧welding line

1138‧‧‧末端 End of 1138‧‧

1142‧‧‧囊封層 1142‧‧‧encapsulated layer

1144‧‧‧模具表面 1144‧‧‧Mold surface

1178‧‧‧犧牲材料層 1178‧‧‧Sacrificial material layer

1210‧‧‧所生成的封裝 Package produced by 1210‧‧‧

1212‧‧‧基板 1212‧‧‧Substrate

1222‧‧‧微電子元件 1222‧‧‧Microelectronic components

1223‧‧‧微電子元件 1223‧‧‧Microelectronic components

1228‧‧‧導體元件 1228‧‧‧Conductor components

1232‧‧‧焊線 1232‧‧‧welding line

1232'‧‧‧焊線迴圈 1232'‧‧‧welding wire loop

1232A‧‧‧連接焊線 1232A‧‧‧Connected wire

1232B‧‧‧熱消散焊點 1232B‧‧‧Hot Dissipation Solder Joint

1234A‧‧‧基底 1234A‧‧‧Base

1234B‧‧‧末端 End of 1234B‧‧

1238‧‧‧末端 End of 1238‧‧

1242‧‧‧囊封層 1242‧‧‧encapsulated layer

1244‧‧‧表面 1244‧‧‧ surface

1246‧‧‧經修正的囊封層表面 1246‧‧‧Fixed encapsulation surface

1302‧‧‧焊線 1302‧‧‧welding line

1304‧‧‧基板 1304‧‧‧Substrate

1306‧‧‧電線 1306‧‧‧Wire

1306e‧‧‧末端部分 End section 1306e‧‧‧

1308‧‧‧基底 1308‧‧‧Base

1310‧‧‧隆起的材料區 1310‧‧‧Uplifted material area

1312‧‧‧面 1312‧‧‧

1314‧‧‧硬化層 1314‧‧‧ hardened layer

1316‧‧‧可移除膜 1316‧‧‧Removable membrane

1318‧‧‧模鑄化合物或是其它囊封劑 1318‧‧‧Mold casting compounds or other encapsulants

1328‧‧‧導體元件 1328‧‧‧Conductor components

1332‧‧‧焊線 1332‧‧‧welding line

1334‧‧‧焊線 1334‧‧‧welding line

1337‧‧‧邊緣表面 1337‧‧‧Edge surface

1338‧‧‧基底 1338‧‧‧Base

1372‧‧‧焊球 1372‧‧‧ solder balls

1372'‧‧‧焊球 1372'‧‧‧ solder balls

1373'‧‧‧焊球 1373'‧‧‧ solder balls

1428‧‧‧導體元件 1428‧‧‧Conductor components

1432‧‧‧焊線 1432‧‧‧welding line

1439‧‧‧裸露部分 1439‧‧‧ naked part

1442‧‧‧囊封層 1442‧‧‧encapsulated layer

1444‧‧‧表面 1444‧‧‧ surface

1512‧‧‧基板 1512‧‧‧Substrate

1514‧‧‧表面 1514‧‧‧ surface

1522‧‧‧微電子元件 1522‧‧‧Microelectronic components

1528‧‧‧導體元件 1528‧‧‧Conductor components

1532‧‧‧焊線 1532‧‧‧welding line

1532A‧‧‧釘頭凸塊 1532A‧‧‧nail head bump

1532B‧‧‧釘頭凸塊 1532B‧‧‧nail head bump

1534‧‧‧基底 1534‧‧‧Base

1537‧‧‧邊緣表面 1537‧‧‧Edge surface

1538‧‧‧末端表面 1538‧‧‧End surface

1539‧‧‧未被囊封部分 1539‧‧‧Unencapsulated part

1542‧‧‧囊封層 1542‧‧‧encapsulated layer

1543‧‧‧接點 1543‧‧‧Contacts

1544‧‧‧主要表面 1544‧‧‧Main surface

1545‧‧‧次要表面 1545‧‧‧ minor surface

1552‧‧‧導體質塊 1552‧‧‧Conductor mass

1588‧‧‧微電子封裝 1588‧‧‧Microelectronics package

1612‧‧‧基板 1612‧‧‧Substrate

1614‧‧‧表面 1614‧‧‧ surface

1622‧‧‧微電子元件 1622‧‧‧Microelectronic components

1628‧‧‧導體元件 1628‧‧‧Conductor components

1650‧‧‧微電子元件 1650‧‧‧Microelectronic components

1688‧‧‧焊線 1688‧‧‧welding line

1712‧‧‧基板 1712‧‧‧Substrate

1714‧‧‧表面 1714‧‧‧ surface

1722‧‧‧微電子元件 1722‧‧‧Microelectronic components

1726‧‧‧接點 1726‧‧‧Contacts

1728‧‧‧導體元件 1728‧‧‧Conductor components

1750‧‧‧微電子元件 1750‧‧‧Microelectronic components

1788‧‧‧焊線 1788‧‧‧welding line

1804‧‧‧焊接治具 1804‧‧‧Welding fixture

1810‧‧‧形成元件 1810‧‧‧ Forming components

1812‧‧‧基板 1812‧‧‧Substrate

1814‧‧‧表面 1814‧‧‧ surface

1822‧‧‧微電子元件 1822‧‧‧Microelectronic components

1828‧‧‧導體元件 1828‧‧‧Conductor components

1844‧‧‧焊接頭 1844‧‧‧welding head

1884‧‧‧構件 1884‧‧‧ components

1850‧‧‧微電子元件 1850‧‧‧Microelectronic components

1910A‧‧‧封裝 1910A‧‧‧Package

1910B‧‧‧封裝 1910B‧‧‧Package

1916‧‧‧表面 1916‧‧‧ surface

1942‧‧‧囊封層 1942‧‧‧encapsulated layer

1944‧‧‧表面 1944‧‧‧ surface

1947‧‧‧邊緣表面 1947‧‧‧Edge surface

1949‧‧‧滴塗區 1949‧‧‧Drip coating area

2010A‧‧‧微電子封裝 2010A‧‧‧Microelectronics Packaging

2010B‧‧‧微電子封裝 2010B‧‧Microelectronics package

2016‧‧‧表面 2016‧‧‧Surface

2032‧‧‧焊線 2032‧‧‧welding line

2038‧‧‧末端表面 2038‧‧‧End surface

2039‧‧‧未被囊封部分 2039‧‧‧Unencapsulated part

2043‧‧‧終端 2043‧‧‧ Terminal

2044‧‧‧表面 2044‧‧‧ surface

2052‧‧‧導體質塊 2052‧‧‧Conductor mass

2099‧‧‧底盤 2099‧‧‧Chassis

2110A‧‧‧微電子封裝 2110A‧‧‧Microelectronics package

2110B‧‧‧微電子封裝 2110B‧‧‧Microelectronics package

2112‧‧‧基板 2112‧‧‧Substrate

2132‧‧‧焊線 2132‧‧‧welding line

2142‧‧‧囊封層 2142‧‧‧Encapsulation layer

2144‧‧‧主要表面 2144‧‧‧Main surface

2145‧‧‧次要表面 2145‧‧‧ minor surface

2151‧‧‧對齊表面 2151‧‧‧Aligned surface

2210A‧‧‧封裝 2210A‧‧‧Package

2212‧‧‧基板 2212‧‧‧Substrate

2214‧‧‧表面 2214‧‧‧ surface

2222‧‧‧微電子元件 2222‧‧‧Microelectronic components

2223‧‧‧表面 2223‧‧‧Surface

2232‧‧‧焊線 2232‧‧‧welding line

2244‧‧‧內表面 2244‧‧‧ inner surface

2245‧‧‧外表面 2245‧‧‧Outer surface

2251‧‧‧對齊表面 2251‧‧‧Aligned surface

2252‧‧‧焊球 2252‧‧‧ solder balls

2610‧‧‧封裝 2610‧‧‧Package

2610"‧‧‧在製單元 2610"‧‧‧ in units

2612‧‧‧基板 2612‧‧‧Substrate

2614‧‧‧表面 2614‧‧‧ surface

2618‧‧‧第一區 2618‧‧‧First District

2620‧‧‧第二區 2620‧‧‧Second District

2622‧‧‧微電子元件 2622‧‧‧Microelectronic components

2628‧‧‧導體元件 2628‧‧‧Conductor components

2632‧‧‧焊線 2632‧‧‧welding line

2634‧‧‧基底 2634‧‧‧Base

2637‧‧‧邊緣表面 2637‧‧‧Edge surface

2642‧‧‧囊封層 2642‧‧‧Encapsulation layer

2644‧‧‧表面 2644‧‧‧Surface

2652‧‧‧焊球 2652‧‧‧ solder balls

2677‧‧‧表面 2677‧‧‧ surface

2677'‧‧‧犧牲囊封層 2677'‧‧‧ Sacrificial Sealing Layer

2678‧‧‧犧牲囊封層 2678‧‧‧ Sacrificial Sealing Layer

2679‧‧‧開口 2679‧‧‧ openings

2800‧‧‧電線段 2800‧‧‧Wire segment

2804‧‧‧毛細管 2804‧‧‧Capillary

2806‧‧‧毛細管面 2806‧‧‧Capillary surface

2810‧‧‧形成治具 2810‧‧‧Forming fixtures

2820‧‧‧側壁 2820‧‧‧ side wall

2822‧‧‧第一電線部分 2822‧‧‧First wire section

3800‧‧‧電線段 3800‧‧‧Wire segment

3804‧‧‧毛細管 3804‧‧‧Capillary

3806‧‧‧毛細管面 3806‧‧‧Capillary surface

3808‧‧‧表面 3808‧‧‧ Surface

3812‧‧‧表面 3812‧‧‧ surface

3816‧‧‧形成表面 3816‧‧‧Form surface

3820‧‧‧側壁 3820‧‧‧ side wall

3822‧‧‧電線段的第一部分 The first part of the 3822‧‧‧ wire segment

圖1所示的係根據本發明一實施例的微電子封裝的剖面圖;圖2所示的係圖1的微電子封裝的俯視平面圖;圖3所示的係根據圖1中所示之實施例的變化例的微電子封裝的剖面圖;圖4所示的係根據圖1中所示之實施例的變化例的微電子封裝的剖面圖;圖5A所示的係根據圖1中所示之實施例的變化例的微電子封裝的剖面圖;圖5B所示的係根據本發明一實施例之被形成在一焊線的一未被囊封部分上的導體元件的片斷剖面圖;圖5C所示的係根據圖5B中所示之實施例的變化例之被形成在一焊線的一未被囊封部分上的導體元件的片斷剖面圖;圖5D所示的係根據圖5B中所示之實施例的變化例之被形成在一焊線的一未被囊封部分上的導體元件的片斷剖面圖;圖6所示的係一微電子組件的剖面圖,其包含一根據前面實施例中一或更多者的微電子封裝以及一額外的微電子封裝以及一與其電連接電路鑲板;圖7所示的係根據本發明一實施例的微電子封裝的俯視圖;圖8進一步顯示根據本發明一實施例的微電子封裝的片斷俯視圖;圖9所示的係根據本發明一實施例包含一導線框架型基板的微電子封裝的俯視圖;圖10所示的係圖9中所示的微電子封裝的對應剖面圖; 圖11所示的係根據圖6中所示之實施例的變化例的一微電子組件的剖面圖,其包含被電連接在一起並且以一底部填充層來強化的複數個微電子封裝;圖12所示的係一組件的照相影像,該組件在一第一構件的焊線以及與其附接的一第二構件的焊料質塊之間有焊點;圖13A所示的係根據本發明一實施例在一微電子封裝中的焊線通孔的片斷剖面圖;圖13B所示的係根據本發明一實施例在一微電子封裝中的焊線通孔的片斷剖面圖;圖13C所示的係根據圖13B中所示實施例在一微電子封裝中的焊線通孔的放大片斷剖面圖;圖13D所示的係根據本發明一實施例在一微電子封裝中的焊線通孔的片斷剖面圖;圖13E所示的係根據圖13D中所示實施例在一微電子封裝中的焊線通孔的放大片斷剖面圖;圖13F所示的係根據本發明一實施例在一微電子封裝中的焊線通孔的片斷剖面圖;圖13C所示的係根據圖13B中所示實施例在一微電子封裝中的焊線通孔的放大片斷剖面圖;圖14A所示的係根據本發明一實施例在焊接一金屬電線區段至一導體元件之前先形成該電線區段的方法中的多個階段;圖14B所示的係位在一毛細管面下方的一位置處的一經整形電線部分 的片斷平面圖;圖14C所示的係介於該毛細管面與該鑄造表面之間的經整形電線部分的剖面圖;圖15進一步顯示如圖14中所示的方法以及適合使用在此方法中的一形成單元;圖16A至16D所示的係根據本發明一實施例,在一電線部分的整形期間一焊接治具相對於一形成元件的移動的平面圖;圖16E所示的係根據本發明一實施例所形成的焊線的俯視圖;圖17A、17B、以及17C為從一焊線組件上面看見的圖式,其進一步顯示根據本發明一實施例之整形一電線部分以及焊接該經整形電線部分的製程;圖18A、18B、以及18C為從一焊線組件上面看見的圖式,其進一步顯示根據本發明一實施例之整形一電線部分以及焊接該經整形電線部分的製程;圖19所示的係根據本發明一實施例在焊接一金屬電線區段至一導體元件之前先形成該電線區段的方法中的多個階段;圖20A與20B所示的係在根據本發明一實施例形成一微電子封裝的一囊封層的方法中的其中一個階段以及接續其後的另一階段的剖面圖;圖20C進一步顯示對應於圖19中之階段的放大剖面圖;圖21A所示的係根據本發明一實施例之製作一微電子封裝的一囊封層的一階段的剖面圖;圖21B所示的係接續圖21A中所示階段之製作一微電子封裝的一囊封 層的一階段的剖面圖;圖22A至22E所示的係藉由模鑄來形成一囊封層的又一方法,其中,焊線的未被囊封部分突穿該囊封層;圖23A與23B所示的係根據另一實施例的焊線的片斷剖面圖;圖24A與24B所示的係根據進一步實施例的微電子封裝的剖面圖;圖25A與25B所示的係根據進一步實施例的微電子封裝的剖面圖;圖26所示的係根據另一實施例的微電子封裝的剖面圖;圖27A至C所示的係根據進一步實施例的微電子封裝的實施例範例的剖面圖;圖28A至D所示的係在根據本揭示內容一實施例之形成一微電子組件的步驟期間的微電子封裝的各種實施例;圖29所示的係在根據本揭示內容一實施例之形成一微電子組件的步驟期間的微電子封裝的另一實施例;圖30A至C所示的係在根據本揭示內容另一實施例之形成一微電子組件的步驟期間的微電子封裝的各種實施例;圖31A至C所示的係在根據本揭示內容另一實施例之形成一微電子組件的步驟期間的微電子封裝的各種實施例;圖32A與32B所示的係一機器的一部分,該機器能夠在根據本揭示內容另一實施例的方法的各種階段中被用來形成各種焊線通孔;圖33所示的係一機器的一部分,該機器能夠在根據本揭示內容另一實施例的方法中被用來形成各種焊線通孔;圖34A至C所示的係一器械的一部分,該器械能夠在根據本揭示內容 一實施例之用於製造焊線的方法中;圖35所示的係一機器的一部分,該機器能夠在根據本揭示內容另一實施例的方法的各種階段中被用來形成各種焊線通孔;圖36所示的係一機器的一部分,該機器能夠在根據本揭示內容另一實施例的方法的各種階段中被用來形成各種焊線通孔;圖37A至D所示的係根據本揭示內容一實施例之製作一微電子封裝的各種階段的剖面圖;圖38A與38B所示的係根據本揭示內容另一實施例之製作一微電子封裝的各種階段的剖面圖;以及圖39A至C所示的係根據本揭示內容另一實施例之製作一微電子封裝的各種階段的剖面圖。 1 is a cross-sectional view of a microelectronic package in accordance with an embodiment of the present invention; FIG. 2 is a top plan view of the microelectronic package of FIG. 1; and FIG. 3 is implemented in accordance with FIG. FIG. 4 is a cross-sectional view of the microelectronic package according to a variation of the embodiment shown in FIG. 1; FIG. 5A is shown in FIG. A cross-sectional view of a microelectronic package of a variation of an embodiment; FIG. 5B is a fragmentary cross-sectional view of a conductor element formed on an unencapsulated portion of a wire according to an embodiment of the present invention; 5C is a fragmentary cross-sectional view of a conductor element formed on an unencapsulated portion of a wire according to a variation of the embodiment shown in FIG. 5B; FIG. 5D is according to FIG. 5B A fragmentary cross-sectional view of a conductor element formed on an unencapsulated portion of a bond wire of the variation of the illustrated embodiment; a cross-sectional view of the microelectronic assembly shown in FIG. Microelectronic package of one or more of the embodiments and an additional microelectronic package and It is electrically connected to the circuit board; FIG. 7 is a top view of the microelectronic package according to an embodiment of the invention; FIG. 8 further shows a top view of the chip of the microelectronic package according to an embodiment of the invention; A top view of a microelectronic package including a leadframe type substrate in accordance with an embodiment of the present invention; and a corresponding cross-sectional view of the microelectronic package shown in FIG. Figure 11 is a cross-sectional view of a microelectronic assembly according to a variation of the embodiment shown in Figure 6, comprising a plurality of microelectronic packages electrically connected together and reinforced with an underfill layer; 12 is a photographic image of a component having a solder joint between a bond wire of a first component and a solder mass of a second component attached thereto; FIG. 13A is a FIG. 13B is a fragmentary cross-sectional view of a wire through hole in a microelectronic package in accordance with an embodiment of the present invention; FIG. 13C is a cross-sectional view of a wire through hole in a microelectronic package; An enlarged fragmentary cross-sectional view of a wire via in a microelectronic package in accordance with the embodiment shown in FIG. 13B; and FIG. 13D is a wire via in a microelectronic package in accordance with an embodiment of the present invention. FIG. 13E is an enlarged fragmentary cross-sectional view of a wire through hole in a microelectronic package according to the embodiment shown in FIG. 13D; FIG. 13F is an embodiment according to an embodiment of the present invention. Sectional cross-section of a wire through hole in a microelectronic package; Figure 13C An enlarged fragmentary cross-sectional view of a wire through hole in a microelectronic package according to the embodiment shown in FIG. 13B; FIG. 14A is a view of welding a metal wire segment to a conductor element according to an embodiment of the present invention. a plurality of stages in the method of forming the wire section before; a portion of the shaped wire at a location below the capillary face shown in Figure 14B FIG. 14C is a cross-sectional view of the portion of the shaped wire between the capillary face and the casting surface; FIG. 15 further shows the method as shown in FIG. 14 and is suitable for use in the method. A forming unit; FIGS. 16A to 16D are plan views showing the movement of a welding jig relative to a forming member during shaping of a wire portion according to an embodiment of the present invention; FIG. 16E is a view according to the present invention. FIG. 17A, 17B, and 17C are views seen from above a wire bond assembly, further illustrating shaping a wire portion and welding the shaped wire portion in accordance with an embodiment of the present invention. FIGS. 18A, 18B, and 18C are views seen from above a wire bond assembly, further illustrating a process for shaping a wire portion and soldering the shaped wire portion in accordance with an embodiment of the present invention; A plurality of stages in a method of forming a wire section prior to welding a metal wire segment to a conductor component in accordance with an embodiment of the present invention; the system illustrated in Figures 20A and 20B A cross-sectional view of one of the steps of forming an encapsulation layer of a microelectronic package and another subsequent step in accordance with an embodiment of the present invention; and FIG. 20C further shows an enlarged cross-sectional view corresponding to the stage of FIG. FIG. 21A is a cross-sectional view showing a stage of fabricating an encapsulation layer of a microelectronic package according to an embodiment of the present invention; and FIG. 21B is a step of fabricating a microelectronic package according to the stage shown in FIG. 21A. One pack A cross-sectional view of a layer of a layer; a method of forming an encapsulation layer by die casting as shown in FIGS. 22A to 22E, wherein an unencapsulated portion of the bonding wire protrudes through the encapsulation layer; FIG. 23A 23B is a sectional view of a wire according to another embodiment; FIGS. 24A and 24B are cross-sectional views of a microelectronic package according to a further embodiment; and FIGS. 25A and 25B are further implemented according to FIG. 26 is a cross-sectional view of a microelectronic package according to another embodiment; and FIGS. 27A to C are cross-sectional views showing an example of a microelectronic package according to a further embodiment. 28A-D are various embodiments of a microelectronic package during the steps of forming a microelectronic assembly in accordance with an embodiment of the present disclosure; FIG. 29 is shown in accordance with an embodiment of the present disclosure. Another embodiment of a microelectronic package during the step of forming a microelectronic component; and FIGS. 30A-C illustrate a microelectronic package during the step of forming a microelectronic component in accordance with another embodiment of the present disclosure Various embodiments; shown in Figures 31A-C Various embodiments of a microelectronic package during the steps of forming a microelectronic assembly in accordance with another embodiment of the present disclosure; a portion of a machine illustrated in Figures 32A and 32B that is capable of Various stages of the method of an embodiment are used to form various wire pass through holes; a portion of a machine shown in Figure 33 that can be used to form various methods in a method in accordance with another embodiment of the present disclosure Wire bond through hole; a portion of an apparatus shown in Figures 34A-C that can be used in accordance with the present disclosure In one embodiment of the method for manufacturing a wire bond; Figure 35 is a portion of a machine that can be used to form various wire bonds in various stages of a method in accordance with another embodiment of the present disclosure. Hole; Figure 36 is a portion of a machine that can be used to form various wire pass through holes in various stages of a method in accordance with another embodiment of the present disclosure; Figures 37A through D are based on A cross-sectional view of various stages of fabricating a microelectronic package in accordance with an embodiment of the present disclosure; and FIGS. 38A and 38B are cross-sectional views of various stages of fabricating a microelectronic package in accordance with another embodiment of the present disclosure; 39A through C are cross-sectional views of various stages of fabricating a microelectronic package in accordance with another embodiment of the present disclosure.

現在參考圖式,圖中使用類似的數值符號表示類似的特徵元件,圖1中顯示根據本發明一實施例的微電子組件10。圖1的實施例係一具有已封裝微電子元件之形式的微電子組件,例如,使用在電腦或其它電子應用中的半導體晶片組件。 Referring now to the drawings in which like reference numerals are The embodiment of Figure 1 is a microelectronic assembly in the form of a packaged microelectronic component, such as a semiconductor wafer component for use in a computer or other electronic application.

圖1的微電子組件10包含一基板12,其具有一第一表面14與一第二表面16。基板12通常具有一介電元件的形式,其實質上為平坦。該介電元件可以為類薄板並且可以很細薄。於特殊的實施例中,該介電元件會包含一或更多層有機介電材料或合成介電材料,例如,但是並不受限於:聚亞醯胺、聚四氟乙烯(PolyTetraFluoroEthylene,PTFE)、環氧樹脂、環氧樹脂玻璃、FR-4、BT樹脂、熱塑性塑膠材料、或熱固性塑膠材料。該基 板可以係一具有用於進一步電互連一電路鑲板(舉例來說,電路板)之終端的封裝的一基板。或者,該基板會係一電路鑲板或電路板。於其一範例中,該基板會係一雙直列記憶體模組(Dual-Inline Memory Module,DIMM)的模組板。於又一變化例中,該基板會係一微電子元件,例如,可以為或是包含一具現複數個主動裝置的半導體晶片,舉例來說,其具有積體電路的形式或是其它形式。 The microelectronic assembly 10 of FIG. 1 includes a substrate 12 having a first surface 14 and a second surface 16. Substrate 12 typically has the form of a dielectric element that is substantially planar. The dielectric element can be a thin sheet and can be very thin. In a particular embodiment, the dielectric component may comprise one or more layers of an organic dielectric material or a synthetic dielectric material, such as, but not limited to, polyamine, polytetrafluoroethylene (PolyTetraFluoroEthylene, PTFE). ), epoxy resin, epoxy resin glass, FR-4, BT resin, thermoplastic plastic material, or thermosetting plastic material. The base The board can be a substrate having a package for further electrically interconnecting a terminal of a circuit board (for example, a circuit board). Alternatively, the substrate will be a circuit board or circuit board. In one example, the substrate is a module board of a dual-inline memory module (DIMM). In yet another variation, the substrate may be a microelectronic component, for example, or may comprise a semiconductor wafer having a plurality of active devices, for example, in the form of an integrated circuit or other form.

第一表面14與第二表面16較佳的係實質上彼此平行並且分隔一距離,該距離垂直於該些表面14、16,用以定義基板12的厚度。基板12的厚度較佳的係在本申請案之大體上可接受厚度的範圍內。於一實施例中,第一表面14與第二表面16之間的距離介於約25與500μm之間。為達此討論之目的,第一表面14可以被描述為定位在反向於或遠離第二表面16處。此描述以及本文中用以表示所使用元件的垂直或水平位置之此些元件的相對位置的任何其它描述僅為達解釋之目的以符合圖式內元件的位置,而沒有限制意義。 The first surface 14 and the second surface 16 are preferably substantially parallel to each other and separated by a distance perpendicular to the surfaces 14, 16 for defining the thickness of the substrate 12. The thickness of the substrate 12 is preferably within the range of substantially acceptable thicknesses of the present application. In one embodiment, the distance between the first surface 14 and the second surface 16 is between about 25 and 500 [mu]m. For the purposes of this discussion, the first surface 14 can be described as being positioned opposite or away from the second surface 16. This description and any other description of the relative positions of such elements in the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt;

於一較佳實施例中,基板12被視為分成一第一區18與一第二區20。第一區18落在第二區20裡面並且包含基板12的一中央部分並且從該處向外延伸。第二區20實質上包圍第一區18並且從該處向外延伸至基板12的外緣。於此實施例中,基板本身雖然沒有任何明確特徵實體上分割該兩個區域;然而,為達本文中討論的目的,對於套用至該些區域或是其中所含的處理或特徵元件來說該些區域為無標記性。 In a preferred embodiment, substrate 12 is considered to be divided into a first zone 18 and a second zone 20. The first zone 18 falls within the second zone 20 and contains a central portion of the substrate 12 and extends outward therefrom. The second zone 20 substantially surrounds the first zone 18 and extends therefrom to the outer edge of the substrate 12. In this embodiment, the substrate itself physically separates the two regions, although there are no clear features; however, for the purposes discussed herein, for the application to the regions or the processing or feature elements contained therein These areas are unmarked.

一微電子元件22會被裝設至第一區18裡面的基板12的第一表面14。微電子元件22會係一半導體晶片或是另一可對照的裝置。於圖 1的實施例中,微電子元件22以被稱為習知或「面朝上」的方式被裝設至第一表面14。於此實施例中,焊線24會被用來電連接微電子元件22至裸露在第一表面14處的複數個導體元件28中的一部分。焊線24也會被接合至基板12裡面的線路(圖中並未顯示)或是其它導體特徵元件,該些線路或是其它導體特徵元件接著會被連接至導體元件28。 A microelectronic component 22 is mounted to the first surface 14 of the substrate 12 within the first region 18. The microelectronic component 22 will be a semiconductor wafer or another comparable device. In the picture In the embodiment of Fig. 1, the microelectronic component 22 is mounted to the first surface 14 in a manner known as "faith-up". In this embodiment, the bond wires 24 are used to electrically connect the microelectronic component 22 to a portion of the plurality of conductor elements 28 exposed at the first surface 14. The bond wires 24 are also bonded to wires (not shown) or other conductor features within the substrate 12, which are then connected to the conductor members 28.

導體元件28包含裸露在基板12的第一表面14處的個別「接點」或觸墊30。如本說明中的用法,當一導電元件被描述為「裸露」在具有介電結構的另一元件的表面處時,其表示該導電結構可用於接觸在垂直於該介電結構之該表面的方向中從該介電結構外面朝該介電結構之該表面移動的一理論點。因此,裸露在一介電結構的一表面處的一終端或是其它導體元件可以突出於此表面、可以齊平於此表面、或者可以相對於此表面為凹陷並且經由該介電質中的一孔洞或凹部而露出。該些導體元件28為平坦、細薄的元件,觸墊30會於其中裸露在基板12的第一表面14處。於其中一實施例中,導體元件28會為實質上圓形並且彼此之間互連以及藉由線路(圖中並未顯示)被互連至微電子元件22。導體元件28會至少被形成在基板12的第二區20裡面。除此之外,於特定的實施例中,導體元件28也會被形成在第一區18裡面。當在被稱為「覆晶」配置中裝設微電子元件122(圖3)至基板112時,此排列特別適用,其中,微電子元件122上的接點會藉由被定位在微電子元件122底下的焊料凸塊126或類似物被連接至第一區118裡面的導體元件128。於一實施例中,導體元件28係由一固體金屬材料所形成,例如,銅、金、鎳、或是此應用可接受的其它材料(其包含包含下面一或更多者的各種合金:銅、金、鎳、或是它們的組合)。 Conductor element 28 includes individual "contacts" or contact pads 30 that are exposed at first surface 14 of substrate 12. As used in this specification, when a conductive element is described as being "exposed" at the surface of another element having a dielectric structure, it is meant that the conductive structure can be used to contact the surface perpendicular to the dielectric structure. A theoretical point in the direction that moves from the outside of the dielectric structure toward the surface of the dielectric structure. Thus, a terminal or other conductor element exposed at a surface of a dielectric structure may protrude from the surface, may be flush with the surface, or may be recessed relative to the surface and via one of the dielectrics The hole or the recess is exposed. The conductor elements 28 are flat, thin components in which the contact pads 30 are exposed at the first surface 14 of the substrate 12. In one embodiment, the conductor elements 28 will be substantially circular and interconnected with one another and interconnected to the microelectronic element 22 by circuitry (not shown). Conductor element 28 will be formed at least within second region 20 of substrate 12. In addition to this, in a particular embodiment, conductor elements 28 are also formed in first region 18. This arrangement is particularly useful when the microelectronic component 122 (FIG. 3) is mounted to the substrate 112 in a so-called "flip-chip" configuration in which the contacts on the microelectronic component 122 are positioned by the microelectronic component. Solder bumps 126 or the like underneath 122 are connected to conductor elements 128 inside first region 118. In one embodiment, the conductor element 28 is formed from a solid metallic material, such as copper, gold, nickel, or other materials acceptable for this application (which includes various alloys including one or more of the following: copper , gold, nickel, or a combination thereof).

多個導體元件28的至少一部分會被互連至裸露在基板12之第二表面16處的對應第二導體元件40,例如,導體觸墊。此互連能夠利用被形成在基板12中的通孔41來完成,該些通孔能夠以和導體元件28與40為相同材料的導體金屬作為內襯或填充。視情況,導體元件40能夠藉由基板12上的線路被進一步互連。 At least a portion of the plurality of conductor elements 28 may be interconnected to corresponding second conductor elements 40, such as conductor pads, exposed at the second surface 16 of the substrate 12. This interconnection can be accomplished using vias 41 formed in the substrate 12, which can be lined or filled with a conductor metal of the same material as conductor elements 28 and 40. The conductor elements 40 can be further interconnected by wires on the substrate 12, as appropriate.

微電子組件10進一步包含複數條焊線32,它們被接合至導體元件28中的至少一部分,例如,被接合在其觸墊30上。於某些範例中,焊線32可以由電線形成,舉例來說,銅或銅合金、金、鋁,或是一基本電線金屬(舉例來說,銅、銅合金、金、或是鋁)與其上由不同金屬(於某些情況中,其可以為金或鈀)製成的一金屬塗料拋光漆或塗料層的組合。於某些情況中,該電線的直徑可以為10微米及以上;於更明確的範例中,可以為17微米、25微米或是更大,舉例來說,35微米或是50微米。當微電子組件10需要大量互連線或是輸入或輸出連接線連接至該微電子組件時,舉例來說,可以有1000至2000條焊線32。 The microelectronic assembly 10 further includes a plurality of bond wires 32 that are bonded to at least a portion of the conductor elements 28, for example, to be bonded to their contact pads 30. In some examples, bond wire 32 may be formed from a wire, such as copper or copper alloy, gold, aluminum, or a basic wire metal (for example, copper, copper alloy, gold, or aluminum) and A combination of a metallic paint polish or coating layer made of a different metal (in some cases it may be gold or palladium). In some cases, the wire may have a diameter of 10 microns and above; in a more specific example, it may be 17 microns, 25 microns or larger, for example 35 microns or 50 microns. When the microelectronic assembly 10 requires a large number of interconnect lines or an input or output connection line is connected to the microelectronic assembly, for example, there may be between 1000 and 2000 bond wires 32.

焊線32會沿著其邊緣表面37的一部分被焊接至導體元件28。此焊接的範例包含拼焊、楔焊、以及類似法。如將在下面進一步詳細說明,一電線焊接治具會被用來拼焊一從該電線焊接治具的一毛細管處延伸至一導體元件28的電線區段,同時在該毛細管中從電線供應處切斷該電線的拼焊末端。該電線焊接治具可以在該些焊線32的尖端附近留下一因形成該焊線的製程所造成的標記(圖中並未顯示)。該標記可以造成該焊線的一漸細區及/或可以有任何幾何形狀(包含球狀在內)。 The bond wire 32 is soldered to the conductor element 28 along a portion of its edge surface 37. Examples of such welding include tailor welding, wedge welding, and the like. As will be explained in further detail below, a wire bonding jig will be used to tailor a wire segment extending from a capillary of the wire bonding fixture to a wire segment of a conductor member 28 while being supplied from the wire in the capillary. Cut the tailored end of the wire. The wire bonding jig may leave a mark (not shown) caused by the process of forming the bonding wire near the tips of the bonding wires 32. The indicia can result in a tapered region of the wire and/or can have any geometric shape (including spheres).

該些焊線會在它們個別的「基底」34處被拼焊至該些導體 元件28。下文中,此已拼焊焊線32的「基底」稱為該焊線中和該導體元件28形成一接合點的部分。或者,焊線能夠利用焊球被接合至該些導體元件的至少一部分,其範例在共同待審、共同授讓的美國專利申請案中顯示及說明過,本文以引用的方式將其完整揭示內容併入。 The wire bonds are welded to the conductors at their respective "substrate" 34 Element 28. Hereinafter, the "base" of the welded wire 32 is referred to as a portion of the wire which forms a joint with the conductor member 28. Alternatively, the bonding wires can be bonded to at least a portion of the plurality of conductor elements using solder balls, an example of which is shown and described in co-pending, commonly assigned U.S. Patent Application Serial No. Incorporate.

如本文中所述,本文中所併入的各種形式邊緣焊接(edge bond)能夠讓導體元件28成為非焊料遮罩定義(Non-Solder-Mask-Defined,NSMD)類型的導體元件。在利用其它類型連接至導體元件的封裝中,舉例來說,焊球或是類似物,該些導體元件為焊料遮罩定義類型。也就是,該些導體元件裸露在被形成於一焊料遮罩材料層中的開口中。於此排列中,該焊料遮罩層會部分疊置在該些導體元件上方或者會沿著其一邊緣接觸該些導體元件。相反地,一NSMD導體元件係不會被一焊料遮罩層接觸到的導體元件。舉例來說,該導體元件會裸露在一基板中沒有焊料遮罩層的一表面上;或者,若存在的話,該表面上的焊料遮罩層會有一邊緣和該導體元件隔開的開口。此NSMD導體元件亦能夠被形成非圓形的形狀。當想要透過一焊料質塊焊接至一元件時,焊料遮罩定義的觸墊通常會是圓形,其會在此表面上形成一大體上圓形的輪廓。舉例來說,當利用一邊緣焊接來附接至一導體元件時,該焊接輪廓本身並非圓形,其允許用於一非圓形導體元件。舉例來說,此些非圓形導體元件可能為卵形、矩形、或是具有圓角的矩形形狀。它們能夠進一步被配置成在該邊緣焊接的方向中為較長而容納該焊接,同時在該焊線的寬度的方向為較短。這允許在該基板12的層級處有較小的間距。於其中一範例中,該些導體元件28在兩個方向中大於基底34的預期尺寸介於約10%與25%之間。這能夠允許放置該些基底34 時的精確性變異並且允許焊接製程變異。 As described herein, the various forms of edge bonding incorporated herein enable conductor element 28 to be a Non-Solder-Mask-Defined (NSMD) type of conductor element. In packages that utilize other types of connections to the conductor elements, for example, solder balls or the like, the conductor elements are of the type defined by the solder mask. That is, the conductor elements are exposed in openings formed in a layer of solder mask material. In this arrangement, the solder mask layer may partially overlap the conductor elements or may contact the conductor elements along an edge thereof. Conversely, an NSMD conductor element is a conductor element that is not contacted by a solder mask layer. For example, the conductor element may be exposed on a surface of the substrate that is free of the solder mask layer; or, if present, the solder mask layer on the surface may have an edge spaced from the conductor element. This NSMD conductor element can also be formed into a non-circular shape. When it is desired to solder to a component through a solder mass, the solder mask defines a contact pad that will generally be circular, which will form a substantially circular outline on the surface. For example, when attached to a conductor element using an edge weld, the weld profile itself is not circular, which allows for a non-circular conductor element. For example, such non-circular conductor elements may be oval, rectangular, or have a rectangular shape with rounded corners. They can be further configured to accommodate the weld in the direction of the edge weld while being shorter in the direction of the width of the weld line. This allows for a smaller pitch at the level of the substrate 12. In one example, the conductor elements 28 are between about 10% and 25% greater than the intended size of the substrate 34 in both directions. This can allow the substrates 34 to be placed The accuracy of the time varies and allows the welding process to mutate.

於某些實施例中,一被邊緣焊接的焊線(如上面所述,其可能為拼焊的形式)能夠結合一焊球。如圖23A中所示,一焊球1372會被形成在一導體元件1328上,而一焊線1332會被形成而讓一基底1338沿著邊緣表面1337的一部分被拼焊至焊球1372。於另一範例中,焊球的一般尺寸及擺放會如1372'處所示。於圖23B中所示的另一變化例中,一焊線1332會如上所述般沿著導體元件1328被邊緣焊接,例如,藉由拼焊。一焊球1373接著會被形成在焊線1334的基底1338的頂端。於其中一範例中,焊球的尺寸及擺放會如1373'處所示。焊線32中的每一者會延伸至一自由端36,其遠離此焊線的基底34且遠離基板12。焊線32的末端36的特徵為自由端,因為它們沒有被電連接至或是被電接合至微電子元件22或微電子組件10裡面的任何其它導體特徵元件(它們接著會被連接至微電子元件22)。換言之,自由端36可用於電子連接(直接連接或是如本文中討論般地經由焊球或其它特徵元件間接連接)至微電子組件10外部的一導體特徵元件。末端36藉由囊封層42被固定在預設位置中或是被接合至或被電連接至另一導體特徵元件的事實並不意謂著它們沒有如本文中所述般的「自由」,只要任何此特徵元件沒有被電連接至微電子元件22即可。相反地,如本文中所述般,當基底34直接或間接被電連接至微電子元件22時,其便不是自由。如圖1中所示,焊線32的基底34通常在它們與個別導體元件28的拼焊(或是其它邊緣焊接)接合點處會彎曲。每一條焊線皆有一邊緣表面37延伸在其基底34與此焊線的末端36之間。基底34的特殊尺寸與形狀會根據被用來形成焊線32的材料類型、焊線32與導體元件28之間所希望的連接強度、或是 被用來形成焊線32的特殊製程而改變。在可能的替代實施例中,焊線32會額外地或替代地被接合至裸露在基板12之第二表面16中的導體元件40,延伸遠離該處。 In some embodiments, an edge welded wire (as described above, which may be in the form of a tailor welded) can incorporate a solder ball. As shown in FIG. 23A, a solder ball 1372 is formed on a conductor element 1328, and a bond wire 1332 is formed such that a substrate 1338 is tailor welded to the solder ball 1372 along a portion of the edge surface 1337. In another example, the general size and placement of the solder balls will be as shown at 1372'. In another variation shown in Figure 23B, a bond wire 1332 will be edge welded along the conductor element 1328 as described above, for example, by tailor welding. A solder ball 1373 is then formed on top of the substrate 1338 of the bond wire 1334. In one example, the size and placement of the solder balls will be as shown at 1373'. Each of the bond wires 32 extends to a free end 36 that is remote from the substrate 34 of the bond wire and away from the substrate 12. The ends 36 of the bonding wires 32 are characterized as free ends because they are not electrically connected or electrically bonded to the microelectronic component 22 or any other conductor features within the microelectronic assembly 10 (they are then connected to the microelectronics) Element 22). In other words, the free end 36 can be used for electronic connection (either directly or indirectly via solder balls or other feature elements as discussed herein) to a conductor feature external to the microelectronic assembly 10. The fact that the end 36 is fixed in the predetermined position by the encapsulation layer 42 or is bonded or electrically connected to another conductor feature does not mean that they are not "free" as described herein, as long as Any such feature element is not electrically connected to the microelectronic element 22. Conversely, as described herein, when substrate 34 is electrically or directly connected to microelectronic element 22, it is not free. As shown in FIG. 1, the bases 34 of the bond wires 32 are typically bent at their point of joint welding (or other edge welding) with the individual conductor elements 28. Each of the wire bonds has an edge surface 37 extending between its base 34 and the end 36 of the wire. The particular size and shape of the substrate 34 will depend on the type of material used to form the bond wires 32, the desired bond strength between the bond wires 32 and the conductor elements 28, or It is changed by a special process used to form the bonding wire 32. In a possible alternative embodiment, the bond wires 32 may additionally or alternatively be bonded to the conductor elements 40 exposed in the second surface 16 of the substrate 12, extending away therefrom.

於一特殊的範例中,該些焊線32中的一第一焊線可以被調適(也就是,被建構、被排列)或是被電耦合至基板上的其它電路系統,用以攜載一第一訊號電位,以及該些焊線32中的一第二焊線也可以被調適成用以同步地攜載一不同於該第一訊號電位的第二訊號電位。因此,當一如在圖1與2中所看見的微電子封裝被供能時,該些第一焊線與第二焊線會同步地攜載不同的第一訊號電位與第二訊號電位。 In a particular example, a first bond wire of the bond wires 32 can be adapted (ie, constructed, aligned) or electrically coupled to other circuitry on the substrate for carrying a The first signal potential, and a second one of the bonding wires 32, can also be adapted to synchronously carry a second signal potential different from the first signal potential. Therefore, when the microelectronic package as seen in FIGS. 1 and 2 is energized, the first bonding wires and the second bonding wires synchronously carry different first signal potentials and second signal potentials.

焊線32可以由一導體材料製成,例如,銅、銅合金、或是金。除此之外,焊線32亦能夠由多種材料的組合來製成,例如,一由一種導體材料(例如,銅或是鋁)製成的核心組合一被塗敷在該核心上方的塗料。該塗料能夠為第二導體材料,例如,鋁、鎳、或是類似物。或者,該塗料亦能夠為絕緣材料,例如,一絕緣護套。 The bonding wire 32 can be made of a conductive material such as copper, copper alloy, or gold. In addition, the bonding wires 32 can also be made from a combination of materials, for example, a core combination of a conductive material (e.g., copper or aluminum) coated with a coating over the core. The coating can be a second conductor material such as aluminum, nickel, or the like. Alternatively, the coating can also be an insulating material, such as an insulative jacket.

於特殊的實施例中,該些焊線可以有一由主要金屬製成的核心以及一疊置在該主要金屬上方包含不同於該主要金屬之第二金屬的金屬拋光漆。舉例來說,該些焊線可以有一由銅、銅合金、鋁、或是金製成的主要金屬,而該金屬拋光漆則能夠包含鈀。鈀能夠避免核心金屬(例如,銅)氧化,並且可以充當一擴散屏障,用以防止可溶性焊料金屬(例如,金)擴散在該些焊線的未被囊封部分39與另一構件之間的焊料接合點中,如下面的進一步說明。因此,於其中一實施例中,該些焊線能夠由塗鈀的銅質電線或是塗鈀的金質電線來形成,它們能夠經由該電線焊接治具的毛細管被送 入。 In a particular embodiment, the bonding wires may have a core made of a primary metal and a metal finish varnished over the primary metal containing a second metal different from the primary metal. For example, the wire bonds may have a primary metal made of copper, copper alloy, aluminum, or gold, and the metal finish may contain palladium. Palladium can avoid oxidation of the core metal (eg, copper) and can act as a diffusion barrier to prevent diffusion of soluble solder metal (eg, gold) between the unencapsulated portion 39 of the bond wires and another member. In the solder joint, as further explained below. Therefore, in one embodiment, the bonding wires can be formed by palladium-coated copper wires or palladium-plated gold wires, which can be sent through the capillary of the wire bonding fixture. In.

於一實施例中,被用來形成焊線32的電線會有一介於約15μm與150μm之間的厚度(也就是,在橫切於該電線之長度的維度中)。一般來說,一焊線係利用本技術中已知的專屬設備被形成在一導體元件(例如,導體元件28)、一觸墊、線路、或是類似物上。焊線32的自由端36會有一末端表面38。末端表面38會形成由複數條焊線32的個別末端表面38所形成的一陣列中的一接點的至少一部分。圖2所示的係由末端表面38所形成的接點陣列的一示範性圖樣。此陣列能夠以區域陣列配置的方式被形成,其變化例可利用本文中所述的結構來施行。此陣列會被用於電性或機械性連接微電子組件10至另一微電子結構,例如,連接至一印刷電路板(Printed Circuit Board,PCB)或是連接至其它經封裝的微電子元件,其一範例顯示在圖6中。於此堆疊排列中,焊線32以及導體元件28與40能夠於其中攜載電子訊號,每一個電子訊號有不同的訊號電位用以讓不同的訊號被單一堆疊中不同的微電子元件來處理。焊料質塊52能夠被用來互連此堆疊中的微電子組件,例如,藉由電子與機械的方式附接末端表面38至導體元件40。 In one embodiment, the wires used to form the bond wires 32 have a thickness between about 15 [mu]m and 150 [mu]m (i.e., in a dimension transverse to the length of the wire). Generally, a wire bond is formed on a conductor component (e.g., conductor component 28), a contact pad, circuitry, or the like using proprietary equipment known in the art. The free end 36 of the bond wire 32 has an end surface 38. The end surface 38 will form at least a portion of a joint in an array formed by individual end surfaces 38 of the plurality of bond wires 32. An exemplary pattern of an array of contacts formed by end surface 38 is shown in FIG. This array can be formed in a regional array configuration, variations of which can be performed using the structures described herein. The array can be used to electrically or mechanically connect the microelectronic assembly 10 to another microelectronic structure, for example, to a printed circuit board (PCB) or to other packaged microelectronic components. An example of this is shown in Figure 6. In this stacked arrangement, bond wires 32 and conductor elements 28 and 40 can carry electronic signals therein, each of which has a different signal potential for different signals to be processed by different microelectronic components in a single stack. Solder mass 52 can be used to interconnect microelectronic components in this stack, for example, by attaching end surface 38 to conductor element 40 electronically and mechanically.

微電子組件10進一步包含一由介電材料所形成的囊封層42。於圖1的實施例中,囊封層42被形成在基板12的第一表面14中未被微電子元件22或導體元件28覆蓋或佔據的部分上方。同樣地,囊封層42被形成在導體元件28(包含其觸墊30)中未被焊線32覆蓋的部分上方。囊封層42還能夠實質上覆蓋微電子元件22以及焊線32(包含它們的基底34以及至少一部分的邊緣表面37)。一部分的焊線32會保持沒有被囊封層42覆蓋, 其亦能夠被稱為未被囊封部分39,從而讓該焊線可用於電連接至位在囊封層42外面的一特徵元件或元件。於一實施例中,焊線32的末端表面38在囊封層42的主要表面44內保持沒有被囊封層42覆蓋。在其它可能的實施例中,除了讓末端表面38保持未被囊封層42覆蓋之外,一部分的邊緣表面37亦沒有被囊封層42覆蓋;或者可替代地讓一部分的邊緣表面37沒有被囊封層42覆蓋。換言之,除了一部分的焊線36(例如,末端表面38、邊緣表面37、或是兩者的組合)之外,囊封層42能夠覆蓋第一表面14及以上的全部微電子組件10。於圖中所示的實施例中,一表面(例如,囊封層42的主要表面44)會與基板12的第一表面14隔開某個距離,該距離足以覆蓋微電子元件22。據此,在焊線32的末端38和表面44齊平的微電子組件10的實施例將包含高於微電子元件22的焊線32以及用於覆晶連接的任何底下的焊料凸塊。然而,囊封層42亦可以採用其它配置。舉例來說,該囊封層會有不同高度的多個表面。於此配置中,裡面定位著末端38的表面44會高於或低於一其下放置著微電子元件22的面朝上表面。 Microelectronic assembly 10 further includes an encapsulation layer 42 formed of a dielectric material. In the embodiment of FIG. 1, encapsulation layer 42 is formed over portions of first surface 14 of substrate 12 that are not covered or occupied by microelectronic element 22 or conductor element 28. Likewise, the encapsulation layer 42 is formed over portions of the conductor element 28 (including its contact pads 30) that are not covered by the bonding wires 32. The encapsulation layer 42 can also substantially cover the microelectronic element 22 as well as the bond wires 32 (the substrate 34 containing them and at least a portion of the edge surface 37). A portion of the bond wire 32 will remain uncovered by the encapsulation layer 42, It can also be referred to as an unencapsulated portion 39, thereby allowing the wire to be electrically connected to a feature or element located outside of the encapsulation layer 42. In one embodiment, the end surface 38 of the bond wire 32 remains uncovered by the encapsulation layer 42 within the major surface 44 of the encapsulation layer 42. In other possible embodiments, except that the end surface 38 remains uncovered by the encapsulation layer 42, a portion of the edge surface 37 is also not covered by the encapsulation layer 42; or alternatively, a portion of the edge surface 37 is not The encapsulation layer 42 is covered. In other words, the encapsulation layer 42 can cover all of the microelectronic assembly 10 of the first surface 14 and above, except for a portion of the bond wires 36 (eg, the end surface 38, the edge surface 37, or a combination of both). In the embodiment shown in the figures, a surface (e.g., major surface 44 of encapsulation layer 42) may be spaced from first surface 14 of substrate 12 by a distance sufficient to cover microelectronic component 22. Accordingly, an embodiment of the microelectronic assembly 10 that is flush with the end 38 of the bond wire 32 and the surface 44 will include bond wires 32 that are higher than the microelectronic component 22 and any underlying solder bumps for flip chip bonding. However, the encapsulation layer 42 can also take other configurations. For example, the encapsulation layer will have multiple surfaces of different heights. In this configuration, the surface 44 in which the end 38 is positioned may be higher or lower than the face-up surface on which the microelectronic element 22 is placed.

囊封層42係用以保護微電子組件10裡面的其它元件,尤其是焊線32。這允許有更健全的結構,比較不會因對其進行測試或是在運輸或是組裝至其它微電子結構期間遭到破壞。囊封層42能夠由一具有絕緣特性的介電材料來形成,例如,在美國專利申請公開案第2010/0232129號中所述者,本文以引用的方式將其併入。 The encapsulation layer 42 is used to protect other components within the microelectronic assembly 10, particularly the bond wires 32. This allows for a more robust structure that is less likely to be destroyed by testing it or during transportation or assembly to other microelectronic structures. The encapsulation layer 42 can be formed from a dielectric material having insulating properties, for example, as described in U.S. Patent Application Publication No. 2010/0232129, which is incorporated herein by reference.

圖3所示的係具有焊線132的微電子組件110的實施例,焊線132的末端136沒有被定位在它們個別基底34的正上方。也就是,將基板112的第一表面114視為延伸在兩個橫向方向中而實質上定義一平面,該 些焊線132的末端136或至少其中一者會在此些橫向方向的至少其中一個方向中偏移基底134的對應橫向位置。如圖3中所示,焊線132能夠沿著其縱軸為實質上筆直,如圖1的實施例中,該縱軸與基板112的第一表面114形成角度146。圖3的剖面圖雖然僅在垂直於第一表面114的第一平面中顯示角度146;但是,焊線132亦能夠在垂直於該第一平面且垂直於該第一表面114的另一平面中和該第一表面114形成角度。此角度能夠實質上等於或不同於角度146。也就是,末端136相對於基底134的移位能夠在兩個橫向方向中並且能夠在此些方向中移位相同或不同的距離。 3 is an embodiment of a microelectronic assembly 110 having bond wires 132 with the ends 136 of the bond wires 132 not being positioned directly above their individual substrates 34. That is, the first surface 114 of the substrate 112 is considered to extend in two lateral directions to define a plane substantially, The ends 136 of at least one of the bond wires 132 or at least one of them may be offset from the corresponding lateral position of the substrate 134 in at least one of the lateral directions. As shown in FIG. 3, the bond wire 132 can be substantially straight along its longitudinal axis, as in the embodiment of FIG. 1, the longitudinal axis forms an angle 146 with the first surface 114 of the substrate 112. The cross-sectional view of FIG. 3, while displaying the angle 146 only in a first plane that is perpendicular to the first surface 114; however, the bond wire 132 can also be in another plane that is perpendicular to the first plane and perpendicular to the first surface 114. Forming an angle with the first surface 114. This angle can be substantially equal to or different from angle 146. That is, the displacement of the tip 136 relative to the substrate 134 can be in both lateral directions and can be displaced by the same or different distances in such directions.

於一實施例中,焊線132中的不同焊線會在整個組件110的不同方向中移位並且移位不同的數額。此排列允許組件110在表面144的層級中有一以不同於基板12之層級的方式所配置的陣列。舉例來說,相較於基板112的第一表面114,一陣列會在表面144上覆蓋一較小的總面積或者有較小的間距。進一步言之,某些焊線132的末端138會被定位在微電子元件122上方,以便容納由不同尺寸的已封裝微電子元件所組成的堆疊排列。於另一範例中,焊線132會被配置成使得其中一條焊線的末端實質上被定位在一第二焊線的基底上方,其中,該第二焊線的末端被定位在其它地方。相較於第二表面116上的一對應接點陣列的位置,此排列改變一接點陣列裡面的一接點末端表面138的相對位置。於另一範例中,如圖8中所示,焊線132會被配置成使得其中一條焊線132A的末端138A實質上被定位在另一條焊線132B的基底134B上方,焊線132B的末端138B被定位在其它地方。相較於第二表面116上的一對應接點陣列的位置,此排列改變一接點陣列裡面的一接點末端表面138的相對位置。於此陣列裡面,該些接點末 端表面的相對位置能夠相依於該微電子組件的應用或是其它必要條件而如所希望般的改變或變更。圖4所示的係具有焊線232的微電子組件210的進一步實施例,焊線232的末端236位在相對於基底234的橫向移位位置中。在圖4的實施例中,該些焊線132藉由於其中併入一彎曲部分248來達成此橫向移位。彎曲部分248會在焊線形成製程期間於一額外的步驟中被形成,並且舉例來說,其能夠在該電線部分被拉出至所希望的長度時進行。此步驟能夠利用可用的焊線設備來實現,其包含使用單一機器。 In one embodiment, the different weld lines in the bond wires 132 are displaced in different directions throughout the assembly 110 and displaced by different amounts. This arrangement allows component 110 to have an array in the hierarchy of surface 144 that is configured in a different manner than the level of substrate 12. For example, an array may cover a smaller total area or a smaller pitch on surface 144 than first surface 114 of substrate 112. Further, the ends 138 of certain bond wires 132 will be positioned over the microelectronic element 122 to accommodate a stacked arrangement of packaged microelectronic components of different sizes. In another example, the bond wires 132 are configured such that the ends of one of the bond wires are positioned substantially above the base of a second bond wire, wherein the ends of the second bond wires are positioned elsewhere. This arrangement changes the relative position of a contact end surface 138 in a contact array as compared to the position of a corresponding contact array on the second surface 116. In another example, as shown in FIG. 8, the bond wires 132 are configured such that the end 138A of one of the bond wires 132A is substantially positioned over the base 134B of the other bond wire 132B, the end 138B of the bond wire 132B. Being positioned elsewhere. This arrangement changes the relative position of a contact end surface 138 in a contact array as compared to the position of a corresponding contact array on the second surface 116. Inside the array, the ends of the contacts The relative position of the end surfaces can be changed or altered as desired depending on the application of the microelectronic assembly or other necessary conditions. 4 is a further embodiment of a microelectronic assembly 210 having bond wires 232 with the ends 236 of the bond wires 232 in a laterally displaced position relative to the substrate 234. In the embodiment of FIG. 4, the bond wires 132 achieve this lateral displacement by incorporating a curved portion 248 therein. The curved portion 248 can be formed in an additional step during the wire bonding process, and can be performed, for example, when the wire portion is pulled out to a desired length. This step can be accomplished with available wire bonding equipment, including the use of a single machine.

必要時,彎曲部分248會有各式各樣的形狀,用以達成焊線232之末端236的所希望的位置。舉例來說,彎曲部分248能夠被形成各種形狀的S彎曲,例如,圖4中所示者,或是比較平滑的形式(例如,圖5中所示者)。除此之外,彎曲部分248亦能夠被定位在比較靠近基底234處而遠離末端236,反之亦可。彎曲部分248亦能具有螺旋或迴圈的形式;或者,能夠為混合的形式,其包含在多個方向中的彎曲或者有不同的形狀或形體。 If desired, the curved portion 248 can have a variety of shapes to achieve the desired location of the end 236 of the bond wire 232. For example, curved portion 248 can be formed into various shapes of S-bends, such as those shown in FIG. 4, or in a relatively smooth form (eg, as shown in FIG. 5). In addition, the curved portion 248 can also be positioned closer to the base 234 than to the distal end 236, or vice versa. The curved portion 248 can also have the form of a helix or loop; alternatively, it can be in a mixed form that includes a bend in multiple directions or a different shape or shape.

於圖26中所示的進一步範例中,該些焊線132會被排列成使得該些基底134被排列在具有第一間距的第一圖樣中。該些焊線132會被配置成使得它們的未被囊封部分139包含末端表面138,會被設置在具有某個圖樣的多個位置處,該圖樣在裸露於該囊封層之表面44處的焊線32的相鄰未被囊封部分38之間的最小間距大於該複數個基底134中相鄰基底之間的最小間距,且據此,大於該些基底所接合的導體元件128之間的最小間距。為達此目的,該些焊線會包含延伸在相對於該些導體元件之法線方向的一或更多個角度中的多個部分,例如圖26中所示。於另一範例中,該些焊線會如圖所示般地彎折,舉例來說,如圖4中所示,俾使得該些末端238 在一或更多個橫向方向中與該些基底134產生移位,如上面的討論。如圖26中的進一步顯示,該些導體元件128以及該些末端138會被排列在個別列與行之中,而且在某些位置處(例如,在該些末端的其中一列中)的末端表面138和它們所接合的該基板上個別導體元件之間的橫向移位會大於其它位置處的未被囊封部分和它們所連接的個別導體元件之間的橫向移位。為達此目的,舉例來說,該些焊線132會在與基板112的表面116成不同的角度146A、146B處。 In a further example shown in FIG. 26, the bond wires 132 are arranged such that the substrates 134 are arranged in a first pattern having a first pitch. The wire bonds 132 will be configured such that their unencapsulated portions 139 comprise end surfaces 138 that will be disposed at a plurality of locations having a pattern that is exposed at the surface 44 of the encapsulation layer. The minimum spacing between adjacent unencapsulated portions 38 of the bonding wires 32 is greater than the minimum spacing between adjacent ones of the plurality of substrates 134 and, accordingly, greater than between the conductor elements 128 to which the substrates are bonded The minimum spacing. To this end, the wire bonds may include portions extending in one or more angles relative to the normal direction of the conductor elements, such as shown in FIG. In another example, the wire bonds are bent as shown, for example, as shown in FIG. 4, the ends are 238 Displacement with the substrates 134 in one or more lateral directions, as discussed above. As further shown in FIG. 26, the conductor elements 128 and the ends 138 are arranged in individual columns and rows, and at some locations (eg, in one of the ends) The lateral displacement between the 138 and the individual conductor elements on the substrate to which they are joined may be greater than the lateral displacement between the unencapsulated portions at other locations and the individual conductor elements to which they are attached. To this end, for example, the bond wires 132 may be at different angles 146A, 146B from the surface 116 of the substrate 112.

圖5A所示的係具有多條焊線332之組合的微電子封裝310的進一步示範性實施例,該些焊線332具有各種形狀而導致基底334與末端336之間的各種相對橫向移位。某些焊線332A實質上筆直,末端336A被定位在它們的個別基底334A上面,而其它焊線332B則包含一稍微彎曲部分348B,從而導致末端336B與基底334B之間有些微的相對橫向移位。進一步言之,某些焊線332C包含具有擺動形狀的彎曲部分348C,從而導致末端336C與相關的基底334C之間的橫向移位距離大於基底334B。圖5還顯示由焊線332Ci及332Cii組成的一對示範對,此些焊線332Ci及332Cii的基底334Ci及334Cii被定位在一基板層級陣列的相同列之中而末端336Ci及336Cii則被定位在一對應表面層級陣列的不同列之中。於某些情況中,焊線332Ci、332Cii中的彎折的半徑會很大,俾使得該些焊線的彎曲可以呈現連續。於其它情況中,該些彎折的半徑可以相對小,以及該些焊線在該些焊線中的彎折之間甚至可以有筆直的部分或是相對筆直的部分。再者,於某些情況中,該些焊線的未被囊封部分會與它們的基底在該基板的接點328之間移位至少一最小間距。於其它情況中,該些焊線的未被囊封部分會和 它們的基底移位至少200微米。 A further exemplary embodiment of a microelectronic package 310 having a combination of a plurality of bond wires 332 having various shapes resulting in various relative lateral shifts between the substrate 334 and the end 336 is shown in FIG. 5A. Some of the bond wires 332A are substantially straight, the ends 336A are positioned over their individual substrates 334A, while the other bond wires 332B include a slightly curved portion 348B resulting in a slight relative lateral shift between the ends 336B and the substrate 334B. . Further, certain bond wires 332C include a curved portion 348C having a wobble shape resulting in a lateral displacement distance between the end 336C and the associated substrate 334C that is greater than the substrate 334B. Figure 5 also shows a pair of exemplary pairs of bond wires 332Ci and 332Cii, the substrates 334Ci and 334Cii of the bond wires 332Ci and 332Cii being positioned in the same column of a substrate level array and the ends 336Ci and 336Cii being positioned at One corresponds to a different column of the surface level array. In some cases, the radius of the bends in the bond wires 332Ci, 332Cii may be large, such that the bends of the weld lines may be continuous. In other cases, the radius of the bends may be relatively small, and the weld lines may even have a straight portion or a relatively straight portion between the bends in the weld lines. Moreover, in some cases, the unencapsulated portions of the bonding wires are displaced from their substrate between the contacts 328 of the substrate by at least a minimum spacing. In other cases, the unencapsulated portions of the bonding wires may Their substrate is displaced by at least 200 microns.

圖中顯示一焊線332D的進一步變化例,其被配置成在其側表面47處未被囊封層342覆蓋。於圖中所示的實施例中,自由端336D雖然未被覆蓋;然而,一部分的邊緣表面337D亦能夠額外地或是替代地未被囊封層342覆蓋。此配置會藉由電連接至一適當的特徵元件而被用於微電子組件10的接地,或是,用於將橫向設置的其它特徵元件機械性或電性連接至微電子組件310。除此之外,圖5還顯示囊封層342中一已被蝕除、模鑄、或是其它構形的區域,用以定義一凹陷表面345,其被定位成比主要表面342更靠近基板12。一或更多條焊線,例如,焊線332A,會在凹陷表面345中的一區域裡面沒有被覆蓋。於圖5中所示的示範性實施例中,末端表面338A與一部分的邊緣表面337A沒有被囊封層342覆蓋。除了接合至末端表面338之外,此配置還藉由讓焊料沿著邊緣表面337A進行燈芯吸附並且與其接合而提供連接(例如,藉由焊球或類似物)至另一導體元件。亦可以採用其它配置讓一焊線的一部份能夠在凹陷表面345中沒有被囊封層342覆蓋,其包含下面其中一者:該些末端表面實質上齊平於凹陷表面345;或者,本文中針對囊封層342之任何其它表面所示的其它配置。 A further variation of a bond wire 332D is shown that is configured to be uncovered by the encapsulation layer 342 at its side surface 47. In the embodiment shown in the figures, the free end 336D is not covered; however, a portion of the edge surface 337D can additionally or alternatively be uncovered by the encapsulation layer 342. This configuration can be used for grounding of the microelectronic assembly 10 by electrical connection to a suitable feature element, or for mechanically or electrically connecting other feature elements disposed laterally to the microelectronic assembly 310. In addition, FIG. 5 also shows an area of the encapsulation layer 342 that has been etched, molded, or otherwise configured to define a recessed surface 345 that is positioned closer to the substrate than the major surface 342. 12. One or more weld lines, such as bond wire 332A, may not be covered within an area of recessed surface 345. In the exemplary embodiment shown in FIG. 5, end surface 338A and a portion of edge surface 337A are not covered by encapsulation layer 342. In addition to bonding to the end surface 338, this configuration provides a connection (e.g., by solder balls or the like) to another conductor element by allowing the solder to wick and bond with the wick along the edge surface 337A. Other configurations may be employed to enable a portion of a bond wire to be uncovered by the encapsulation layer 342 in the recessed surface 345, which includes one of the following: the end surfaces are substantially flush with the recessed surface 345; or, Other configurations shown for any other surface of the encapsulation layer 342.

同樣地,藉由讓一部分的焊線332D在側表面347中未被囊封層342覆蓋的其它配置亦類似於在本文中其它地方針對該囊封層之主要表面的變化例所討論的配置。 Likewise, other configurations by having a portion of the bond wire 332D not covered by the encapsulation layer 342 in the side surface 347 are similar to those discussed elsewhere for variations of the major surface of the encapsulation layer.

圖5A進一步顯示在一示範性排列中具有兩個微電子元件322與350的微電子組件310,其中,微電子元件350面朝上地堆疊在微電子元件322上。於此排列中,導線324被用來電連接微電子元件322至基板 312上的導體特徵元件。各種導線被用來電子連接微電子元件350至微電子組件310的各種其它特徵元件。舉例來說,導線380電連接微電子元件350至基板312的導體特徵元件,而導線382電連接微電子元件350至微電子元件322。進一步言之,焊線384(其結構會類似於焊線332中的各條焊線)被用來在囊封層342的表面344上形成一接觸表面386,其被電連接至微電子元件350。這能夠被用來從囊封層342上面直接電連接另一微電子組件的一特徵元件至微電子元件350。當微電子元件322存在而沒有第二微電子元件350貼附其上時,此導線亦會被連接至微電子元件322。一開口(圖中並未顯示)會被形成在囊封層342之中,舉例來說,其從囊封層342的表面344處延伸至導線380中的某一點,從而得以接取導線380,用以讓一位於表面344外面的元件與其進行電連接。一類似的開口會被形成在任何其它導線或焊線332上方,例如,在遠離焊線332C之末端336C的某一點處被形成在焊線332C上方。於此實施例中,末端336C會被定位在表面344底下,該開口僅可用於接取而與其進行電連接。 FIG. 5A further shows a microelectronic assembly 310 having two microelectronic elements 322 and 350 in an exemplary arrangement, wherein the microelectronic elements 350 are stacked face up on the microelectronic element 322. In this arrangement, wires 324 are used to electrically connect microelectronic component 322 to the substrate. Conductor feature on 312. Various wires are used to electronically connect the microelectronic component 350 to various other features of the microelectronic assembly 310. For example, wire 380 electrically connects microelectronic component 350 to the conductor feature of substrate 312, while wire 382 electrically connects microelectronic component 350 to microelectronic component 322. Further, bond wires 384 (which may be similar in construction to the various bond wires in bond wire 332) are used to form a contact surface 386 on surface 344 of encapsulation layer 342 that is electrically coupled to microelectronic element 350. . This can be used to electrically connect a feature element of another microelectronic component directly from the encapsulation layer 342 to the microelectronic component 350. This wire is also connected to the microelectronic element 322 when the microelectronic element 322 is present without the second microelectronic element 350 attached thereto. An opening (not shown) may be formed in the encapsulation layer 342, for example, extending from the surface 344 of the encapsulation layer 342 to a point in the wire 380 to allow access to the wire 380. It is used to electrically connect an element located outside the surface 344 thereto. A similar opening will be formed over any other wire or bond wire 332, for example, at a point away from the end 336C of the bond wire 332C over the bond wire 332C. In this embodiment, the end 336C will be positioned under the surface 344, which is only available for access and is electrically connected thereto.

用於具有多個微電子元件的微電子封裝的額外排列顯示在圖27A至C中。舉例來說,此些排列能夠被用來連接圖5A中所示以及圖6的堆疊封裝排列中所示的焊線排列,下面有進一步討論。明確地說,在圖27A所示的排列中,一下方微電子元件1622被覆晶焊接至基板1612的表面1614上的導體元件1628。第二微電子元件1650能夠疊置在該第一微電子元件1622上方並且面朝上地被連接至該基板上的額外導體元件1628,例如,經由焊線1688。在圖27B所示的排列中,一第一微電子元件1722面朝上地被裝設在表面1714上並且經由焊線1788被連接至導體元件1728。第二微電 子元件1750在其一面處露出接點,該面面向且被接合至背向該基板的該第一微電子元件1722之一面處的對應接點,其係經由該第二微電子元件1750的一組接點1726,該組接點面向且被接合至該第一微電子元件1722之正面上的對應接點。被接合至該第二微電子元件之對應接點的第一微電子元件1722的接點接著會經由該第一微電子元件1722的電路圖樣被連接並且藉由焊線1788被連接至基板1712上的導體元件1728。 An additional arrangement for a microelectronic package having multiple microelectronic components is shown in Figures 27A-C. For example, such arrangements can be used to connect the wire bond arrangements shown in Figure 5A and in the stacked package arrangement of Figure 6, as discussed further below. In particular, in the arrangement shown in FIG. 27A, a lower microelectronic element 1622 is flip chip bonded to conductor element 1628 on surface 1614 of substrate 1612. The second microelectronic element 1650 can be stacked over the first microelectronic element 1622 and connected upwardly to the additional conductor element 1628 on the substrate, for example, via the bond wire 1688. In the arrangement shown in FIG. 27B, a first microelectronic element 1722 is mounted face up on surface 1714 and is connected to conductor element 1728 via bond wire 1788. Second micro-electric The sub-element 1750 exposes a contact at one side thereof that faces and is bonded to a corresponding contact at a face of the first microelectronic component 1722 facing away from the substrate via a second microelectronic component 1750 A set of contacts 1726 that face and are joined to corresponding contacts on the front side of the first microelectronic component 1722. The contacts of the first microelectronic element 1722 bonded to the corresponding contacts of the second microelectronic element are then connected via the circuit pattern of the first microelectronic element 1722 and connected to the substrate 1712 by bond wires 1788. Conductor element 1728.

在圖27C所示的範例中,第一微電子元件1822與第二微電子元件1850在沿著基板1812的表面1814的方向中彼此隔開。該些微電子元件(以及額外的微電子元件)中的任一者或兩者會以本文中所述之面朝上或覆晶配置被裝設。進一步言之,被運用在此排列中的任何微電子元件會經由一或兩個此些微電子元件上或是該基板上或是兩者上的電路圖樣相互連接,該些電路圖樣會電連接該些微電子元件被電連接的個別導體元件1828。 In the example shown in FIG. 27C, first microelectronic element 1822 and second microelectronic element 1850 are spaced apart from each other in a direction along surface 1814 of substrate 1812. Either or both of the microelectronic elements (and additional microelectronic elements) will be mounted in the face up or flip chip configuration described herein. Further, any microelectronic component used in the arrangement is interconnected via one or two of the microelectronic components or circuit patterns on the substrate or both, and the circuit patterns are electrically connected to the circuit pattern. The individual conductor elements 1828 are electrically connected to the microelectronic components.

圖5B進一步圖解根據上述實施例的一變化例的一種結構,其中,一第二導體元件43會被形成接觸裸露在囊封層42的一表面44處或是突出在囊封層42的一表面44上方的一焊線的一未被囊封部分39,該第二導體元件沒有接觸該第一導體元件28(圖1)。於如圖5B中所看見的其中一實施例中,該第二導體元件包含一延伸在該囊封層的表面44上的觸墊45,其提供一用於接合一構件的焊接金屬或焊接材料的表面。 5B further illustrates a structure in accordance with a variation of the above embodiment in which a second conductor member 43 is formed to contact a surface 44 exposed at the encapsulation layer 42 or protrudes on a surface of the encapsulation layer 42. An unencapsulated portion 39 of a bond wire above 44, the second conductor member does not contact the first conductor member 28 (Fig. 1). In one embodiment as seen in Figure 5B, the second conductor member includes a contact pad 45 extending over the surface 44 of the encapsulation layer, which provides a weld metal or solder material for engaging a member s surface.

或者,如在圖5C中所見,第二導體元件48會係一被選擇性形成在一焊線之未被囊封部分39上的金屬拋光漆。任何情況中,於其中一範例中,第二導體元件43或48皆能夠由一鎳層以及一金層或銀層來形 成,例如,藉由電鍍法,該鎳層接觸該焊線的該未被囊封部分並且疊置在該焊線的核心上方,而該金層或銀層疊置在該鎳層上方。於另一範例中,該第二導體元件可以為一單石金屬層,其基本上由單一金屬所構成。於其中一範例中,該單一金屬層會係鎳、金、銅、鈀、或是銀。於另一範例中,第二導體元件43或48會包含一導體膏或是由一導體膏來形成,其會接觸該焊線的未被囊封部分39。舉例來說,模版印刷、滴塗、網印、控制式噴塗(舉例來說,類似於噴墨印刷的製程)、或是轉印模鑄皆能夠被用來在該些焊線的未被囊封部分39上形成第二導體元件43或48。 Alternatively, as seen in Figure 5C, the second conductor element 48 is a metal finish lacquer that is selectively formed on the unencapsulated portion 39 of the bond wire. In any case, in one of the examples, the second conductor element 43 or 48 can be formed by a nickel layer and a gold or silver layer. For example, by electroplating, the nickel layer contacts the unencapsulated portion of the bonding wire and overlies the core of the bonding wire, and the gold layer or silver is laminated over the nickel layer. In another example, the second conductor element can be a monolithic metal layer that is substantially comprised of a single metal. In one example, the single metal layer will be nickel, gold, copper, palladium, or silver. In another example, the second conductor element 43 or 48 may comprise a conductor paste or be formed from a conductor paste that will contact the unencapsulated portion 39 of the bond wire. For example, stencil printing, drop coating, screen printing, controlled spraying (for example, a process similar to inkjet printing), or transfer molding can be used in the non-sacs of the bonding wires. A second conductor element 43 or 48 is formed on the sealing portion 39.

圖5D進一步圖解一第二導體元件43D,其能夠由如同上面針對導體元件43、48所述的金屬或其它導電材料來形成,其中,第二導體元件43D至少部分被形成在一開口49內,該開口延伸至囊封層42的一外部表面44之中。於其中一範例中,開口49能夠藉由在固化或部分固化該囊封層之後移除該囊封層的一部分而形成,以便同步露出其下方的焊線的一部分,該部分接著會變成該焊線的未被囊封部分。舉例來說,開口49能夠藉由雷射燒蝕、蝕刻來形成。於另一範例中,一可溶性材料會在形成該囊封層之前被事先放置在該開口的位置處,並且該被事先放置的材料接著會在形成該囊封層之後被移除,以便形成該開口。 Figure 5D further illustrates a second conductor element 43D that can be formed from a metal or other electrically conductive material as described above for conductor elements 43, 48, wherein the second conductor element 43D is at least partially formed within an opening 49, The opening extends into an outer surface 44 of the encapsulation layer 42. In one example, the opening 49 can be formed by removing a portion of the encapsulation layer after curing or partially curing the encapsulation layer to simultaneously expose a portion of the bond wire below it, which portion then becomes the weld The unencapsulated portion of the line. For example, the opening 49 can be formed by laser ablation, etching. In another example, a soluble material is placed in advance at the location of the opening prior to forming the encapsulation layer, and the pre-placed material is then removed after forming the encapsulation layer to form the Opening.

於進一步的範例中,如在圖24A至24B中所見,多條焊線1432的基底能夠接合單一導體元件1428。此群焊線1432能夠被用來在囊封層1442上方製造額外的連接點,用於電連接導體元件1428。該些被共同接合焊線1432的裸露部分1439會在一約為導體元件1428本身大小的區域中或是在近似一焊接質塊(用於和該焊線1432群進行外部連接)之預期尺寸的 另一區域中的囊封層1442的表面1444上被聚集在一起。如圖示,此些焊線1432能夠在導體元件1428上被球焊(圖24A)或是被邊緣焊接(圖24B),如上面所述;或者,能夠如上面針對圖23A或23B或兩者所述般地被焊接至導體元件。 In a further example, as seen in Figures 24A-24B, the base of the plurality of bond wires 1432 can engage a single conductor component 1428. This group of bond wires 1432 can be used to create additional joints over the encapsulation layer 1442 for electrically connecting the conductor elements 1428. The exposed portions 1439 of the common bond wires 1432 may be in an area approximately the size of the conductor element 1428 itself or in an approximate size of approximately a solder mass (for external connection to the wire bond 1432 group). The surface 1444 of the encapsulation layer 1442 in another region is gathered together. As illustrated, the bond wires 1432 can be ball bonded (Fig. 24A) or edge welded (Fig. 24B) on the conductor element 1428, as described above; or, can be as described above for Fig. 23A or 23B or both The solder is typically soldered to the conductor elements.

如圖25A與25B中所示,被球焊的焊線1532能夠在導體元件1528的至少一部分上被形成為釘頭凸塊。如本文中所述,釘頭凸塊係一被球焊的焊線,其中,延伸在基底1534與末端表面1538之間的電線段的長度最多為被球焊的基底1534的直徑的300%。如其它實施例中,末端表面1538以及,視情況,該釘頭凸塊的邊緣表面1537的一部分沒有被囊封層1542囊封。如圖25B中所示,此釘頭凸塊1532A會被形成在另一釘頭凸塊1532B的頂端,用以基本上形成一由兩個焊球構成的焊線1532的基底1534,其有一焊線段從該處向上延伸至囊封層1542的表面1544。舉例來說,此些焊線1532的高度小於本揭示內容中其它地方所述的焊線。據此,該囊封層會包含一位在一區域中的主要表面1544,舉例來說,疊置在微電子元件1522上方;以及一位在基板1512之表面1514上方的次要表面1545,其高度小於主要表面1544。此些排列還能夠被用來形成對齊特徵元件並且用以降低一運用釘頭凸塊類型焊線以及本文中已揭其它類型焊線的封裝的總高度,同時容納導體質塊1552,該些導體質塊能夠連接焊線1532的未被囊封部分1539和另一微電子封裝1588上的接點1543。 As shown in Figures 25A and 25B, the ball bonded wire 1532 can be formed as a stud bump on at least a portion of the conductor element 1528. As described herein, the stud bump is a ball welded wire bond wherein the length of the wire segment extending between the substrate 1534 and the end surface 1538 is at most 300% of the diameter of the ball bonded substrate 1534. As in other embodiments, the end surface 1538 and, as the case may be, a portion of the edge surface 1537 of the stud bump is not encapsulated by the encapsulation layer 1542. As shown in FIG. 25B, the stud bump 1532A is formed at the top end of the other stud bump 1532B for substantially forming a base 1534 of a bonding wire 1532 composed of two solder balls, which has a solder. From there, the line segment extends upwardly to the surface 1544 of the encapsulation layer 1542. For example, the height of such bond wires 1532 is less than the bond wires described elsewhere in this disclosure. Accordingly, the encapsulation layer will comprise a major surface 1544 in a region, for example, overlying the microelectronic element 1522; and a minor surface 1545 above the surface 1514 of the substrate 1512, The height is less than 1544 of the main surface. Such arrangements can also be used to form alignment features and to reduce the overall height of a package utilizing a stud bump type bond wire and other types of bond wires disclosed herein while accommodating conductor blocks 1552. The mass block can connect the unencapsulated portion 1539 of the bond wire 1532 and the contact 1543 on another microelectronic package 1588.

圖6所示的係由微電子組件410與488所組成的堆疊封裝。於此排列中,焊料質塊452會將組件410的末端表面438電性及機械性連接至組件488的導體元件440。該堆疊封裝能夠包含額外的組件並且最後能夠 被附接至使用在電子裝置中的PCB 490或是類似物上的接點492。於此堆疊排列中,焊線432與導體元件440能夠於其中攜載多個電子訊號,每一個電子訊號有不同的訊號電位用以讓不同的訊號被單一堆疊中不同的微電子元件(例如,微電子元件422或微電子元件489)來處理。 Shown in FIG. 6 is a stacked package of microelectronic components 410 and 488. In this arrangement, the solder mass 452 electrically and mechanically connects the end surface 438 of the assembly 410 to the conductor element 440 of the assembly 488. The stacked package can contain additional components and can finally A contact 492 is attached to the PCB 490 or the like used in the electronic device. In this stacked arrangement, the bonding wires 432 and the conductor element 440 can carry a plurality of electronic signals therein, each of which has a different signal potential for different signals to be different in a single stack of microelectronic components (eg, Microelectronic component 422 or microelectronic component 489) is processed.

在圖6中的示範性配置中,焊線432被配置成具有一彎曲部分448,俾使得該些焊線432的末端436中的至少一部分延伸至一疊置在微電子元件422的主要表面424上方的區域之中。此區域能夠由微電子元件422的外周圍來定義並且從該處向上延伸。此配置的一範例顯示在圖18中面向基板412的第一表面414的視圖中,其中,焊線432疊置在微電子元件422的背主要表面上方,該微電子元件422在其正面425處被覆晶焊接至一基板412。於另一配置中(圖5),該微電子元件422會面朝上地被裝設至基板312,正面325背向基板312且至少一焊線336疊置在微電子元件322的該正面上方。於其中一實施例中,此焊線336沒有電連接微電子元件322。一被焊接至基板312的焊線336亦可以疊置在微電子元件350的正面或背面上方。圖7中所示的微電子組件410的實施例讓多個導體元件428被排列在形成第一陣列的圖樣中,其中,該些導體元件428被排列在包圍微電子元件422的多列與多行之中並且可以在獨特的導體元件428之間有一預設間距。焊線432被接合至該些導體元件428,俾使得它們的個別基底434會遵循由該些導體元件428所創造的第一陣列的圖樣。然而,焊線432則會被配置成使得它們的個別末端436能夠根據一第二陣列配置被排列在一不同的圖樣中。於圖中所示的實施例中,該第二陣列的間距會不同於該第一陣列的間距,且於某些情況中,會小於該第一陣列的間距。然而,在其它實施 例中,該第二陣列的間距可以大於該第一陣列;或者,其中,該些導體元件428雖然沒有被定位在一預設的陣列中,但是,該些焊線432的末端436卻被定位在一預設的陣列中。又進一步言之,導體元件428亦能夠被配置成在整個基板412中的多組陣列之中;以及,焊線432能夠被配置成使得末端436位在不同的陣列組之中或是位在單一陣列之中。 In the exemplary configuration of FIG. 6, the bond wires 432 are configured to have a curved portion 448 such that at least a portion of the ends 436 of the bond wires 432 extend to a major surface 424 that is superposed on the microelectronic element 422. In the upper area. This region can be defined by the outer periphery of the microelectronic element 422 and extends upward therefrom. An example of this configuration is shown in the view of the first surface 414 of the substrate 412 in FIG. 18, wherein the bond wires 432 are stacked over the back major surface of the microelectronic element 422, the microelectronic element 422 being at its front side 425 The cladding is soldered to a substrate 412. In another configuration (FIG. 5), the microelectronic component 422 is mounted face up to the substrate 312 with the front side 325 facing away from the substrate 312 and at least one bonding wire 336 overlying the front side of the microelectronic component 322. . In one embodiment, the bond wire 336 is not electrically connected to the microelectronic component 322. A bond wire 336 that is soldered to the substrate 312 may also be stacked over the front or back side of the microelectronic component 350. The embodiment of microelectronic assembly 410 shown in FIG. 7 has a plurality of conductor elements 428 arranged in a pattern forming a first array, wherein the conductor elements 428 are arranged in multiple columns and multiples surrounding microelectronic element 422 Among the rows and there may be a predetermined spacing between the individual conductor elements 428. Wire bonds 432 are bonded to the conductor elements 428 such that their individual substrates 434 follow the pattern of the first array created by the conductor elements 428. However, bond wires 432 are then configured such that their individual ends 436 can be arranged in a different pattern according to a second array configuration. In the embodiment shown in the figures, the pitch of the second array may be different from the pitch of the first array, and in some cases, may be smaller than the pitch of the first array. However, in other implementations In an example, the second array may have a larger pitch than the first array; or, wherein the conductor elements 428 are not positioned in a predetermined array, the ends 436 of the bonding wires 432 are positioned. In a preset array. Still further, the conductor elements 428 can also be configured to be in multiple sets of arrays throughout the substrate 412; and the bond wires 432 can be configured such that the ends 436 are in different array groups or in a single Among the arrays.

圖6進一步顯示一絕緣層421,其沿著微電子元件422的一表面延伸。絕緣層421會在形成該些焊線之前由一介電材料或是其它電絕緣材料來形成。絕緣層421能夠保護微電子元件,避免接觸在其上方延伸的任何焊線432。明確地說,絕緣層421能夠防止焊線之間發生電氣短路以及防止一焊線與該微電子元件422之間發生短路。依此方式,絕緣層421能夠幫助防止因一焊線432與該微電子元件422之間的非預期電接觸所造成的誤動作或可能的損壞。 FIG. 6 further shows an insulating layer 421 that extends along a surface of the microelectronic element 422. The insulating layer 421 is formed of a dielectric material or other electrically insulating material before forming the bonding wires. The insulating layer 421 is capable of protecting the microelectronic component from contact with any bonding wires 432 extending over it. In particular, the insulating layer 421 can prevent an electrical short between the bonding wires and prevent a short circuit between the bonding wires and the microelectronic element 422. In this manner, the insulating layer 421 can help prevent malfunction or possible damage caused by unintended electrical contact between a bond wire 432 and the microelectronic element 422.

圖6與7中所示的焊線配置能夠在特定的場合中(舉例來說,微電子組件488與微電子元件422的相對尺寸不允許的場合中)讓微電子組件410連接至另一微電子組件,例如,微電子組件488。於圖6的實施例中,微電子組件488的尺寸被設計成使得某些接觸觸墊440位在一小於微電子元件422之正表面424或背表面426之面積的區域裡面的陣列中。於以實質上垂直導體特徵元件(例如支柱)取代焊線432的微電子組件中,導體元件428與觸墊440之間會無法直接連接。然而,如圖6中所示,具有適當配置之彎曲部分448的焊線432的末端436位在適當的位置中,以便在微電子組件410與微電子組件488之間進行必要的電子連接。此排列能夠被用來製造一堆疊封裝,其中,舉例來說,微電子組件410係一具有一預設觸墊陣 列的DRAM晶片或類似物,且其中,微電子元件422係一邏輯晶片,被配置成用以控制該DRAM晶片。這允許使用單一類型的DRAM晶片於各種尺寸的數個不同的邏輯晶片,其包含大於該DRAM晶片的邏輯晶片,因為該些焊線432的末端436被定位在需要和該DRAM晶片進行所希望連接的地方。於一替代實施例中,微電子封裝410會以另一配置被裝設在印刷電路板490上,其中,焊線432的未被囊封表面436被電連接至電路板490的觸墊492。進一步言之,於此實施例中,另一微電子封裝(例如,封裝488的經修正版本)會藉由接合至觸墊440的焊球452被裝設在封裝410上。 The wire bond configurations shown in Figures 6 and 7 enable the microelectronic assembly 410 to be connected to another micro in a particular application (for example, where the relative dimensions of the microelectronic assembly 488 and the microelectronic component 422 are not allowed). Electronic components, such as microelectronic component 488. In the embodiment of FIG. 6, microelectronic assembly 488 is sized such that certain contact pads 440 are positioned in an array that is smaller than the area of the area of front surface 424 or back surface 426 of microelectronic element 422. In a microelectronic assembly in which the bond wires 432 are replaced by substantially vertical conductor features (e.g., struts), there may be no direct connection between the conductor elements 428 and the contact pads 440. However, as shown in FIG. 6, the end 436 of the bond wire 432 having the appropriately configured curved portion 448 is in place to provide the necessary electrical connection between the microelectronic assembly 410 and the microelectronic assembly 488. This arrangement can be used to fabricate a stacked package in which, for example, the microelectronic assembly 410 has a predetermined touch pad array A column of DRAM wafers or the like, and wherein the microelectronic component 422 is a logic die configured to control the DRAM die. This allows the use of a single type of DRAM die in a number of different logic wafers of various sizes, including logic wafers larger than the DRAM die, since the ends 436 of the bond wires 432 are positioned to be desired to be connected to the DRAM die. The place. In an alternate embodiment, the microelectronic package 410 will be mounted on the printed circuit board 490 in another configuration in which the unencapsulated surface 436 of the bond wire 432 is electrically connected to the contact pads 492 of the circuit board 490. Further, in this embodiment, another microelectronic package (eg, a modified version of package 488) is mounted on package 410 by solder balls 452 bonded to contact pads 440.

圖9與10顯示一微電子組件510的進一步實施例,其中,焊線532被形成在一導線框架結構上。導線框架結構的範例已在美國專利案第7,176,506號及第6,765,287號中顯示及說明過,本文以引用的方式將它們的揭示內容併入。一般來說,導線框架係一種由一導體金屬(例如,銅)薄板以及一框架所形成的結構,該導體金屬薄板被圖樣化成包含複數條導線的多個分段並且會進一步包含一導線座(paddle)。該框架係被用來在製作該組件期間固定該些導線與該導線座,如果有用到的話。於一實施例中,一微電子元件(例如,晶粒或是晶片)會面朝上地被接合至該導線座並且利用焊線被電連接至該些導線。或者,該微電子元件能夠直接被裝設在該些導線上,該些導線能夠延伸在該微電子元件下方。於此實施例中,該微電子元件上的接點會藉由焊球或類似物被電連接至個別的導線。該些導線接著會被用來形成電連接線連接至各種其它導體結構,用以攜載一送往以及來自該微電子元件的電子訊號電位。當該結構的組裝完成時(可能包含於其上方形成一囊封層),該框架的暫時性元件會從該導線框架的導線以及導線座 處被移除,以便形成多條獨特的導線。為達本揭示內容的目的,該些獨特的導線513以及該導線座515被視為一起形成基板512的多個分段部分,基板512在與其一體成形的多個部分中包含導體元件528。進一步言之,於此實施例中,導線座515被視為在基板512的第一區518裡面,而導線513被被視為在第二區520裡面。焊線524(其亦被顯示在圖10的圖中)會連接被攜載在導線座515上的微電子元件22至導線515的導體元件528。焊線532會在它們的基底534處進一步被接合至導線515上的額外導體元件528。囊封層542被形成在組件510上,讓焊線532的末端538在表面544的多個位置處沒有被覆蓋。在對應於針對本文中其它實施例所述結構的結構中,焊線532會有額外或替代的部分沒有被囊封層542覆蓋。 9 and 10 show a further embodiment of a microelectronic assembly 510 in which bond wires 532 are formed on a leadframe structure. Examples of lead frame structures are shown and described in U.S. Patent Nos. 7,176,506 and 6,765,287, the disclosures of each of each of each of each of In general, a lead frame is a structure formed by a conductor metal (e.g., copper) sheet and a frame that is patterned into a plurality of segments comprising a plurality of wires and further comprising a wire holder ( Paddle). The frame is used to secure the wires and the wire holder during manufacture of the assembly, if useful. In one embodiment, a microelectronic component (eg, a die or a wafer) is bonded face-up to the wire holder and electrically connected to the wires by wire bonds. Alternatively, the microelectronic component can be mounted directly on the wires that can extend beneath the microelectronic component. In this embodiment, the contacts on the microelectronic component are electrically connected to individual wires by solder balls or the like. The wires are then used to form electrical connections to various other conductor structures for carrying an electronic signal potential to and from the microelectronic component. When the assembly of the structure is completed (possibly including an encapsulation layer formed thereon), the temporary components of the frame will be from the wire of the wire frame and the wire holder The place is removed to form multiple unique wires. For the purposes of this disclosure, the unique wires 513 and the wire holder 515 are considered to form a plurality of segmented portions of the substrate 512 together, and the substrate 512 includes conductor elements 528 in portions that are integrally formed therewith. Further, in this embodiment, the wire holder 515 is considered to be inside the first region 518 of the substrate 512, while the wire 513 is considered to be inside the second region 520. Wire bond 524 (which is also shown in the diagram of FIG. 10) connects the microelectronic component 22 carried on the wire holder 515 to the conductor component 528 of the wire 515. The bond wires 532 will be further bonded to the additional conductor elements 528 on the wires 515 at their base 534. An encapsulation layer 542 is formed over the assembly 510 such that the ends 538 of the bond wires 532 are not covered at multiple locations on the surface 544. In a structure corresponding to the structure described for other embodiments herein, additional or alternative portions of the bond wires 532 are not covered by the encapsulation layer 542.

圖11進一步圖解一底部填充層620,用以強化其中一個封裝610A的焊線632以及被裝設於其上的另一個封裝610B的焊料質塊652之間的接合點。如圖11中所示,底部填充層620雖然僅需要被設置在封裝610A、610B之相互面對的表面642、644之間;不過,該底部填充層620亦能夠接觸封裝610A的邊緣表面並且可以接觸裝設著該封裝610的電路鑲板690的第一表面692。進一步言之,若有的話,沿著封裝610A、610B之邊緣表面延伸的底部填充層620的一部分會被設置在相對於上方設置著該些封裝的電路鑲板的一主要表面之介於0°與90°之間的角度處,並且從相鄰於該電路鑲板的較大厚度處漸細至位在該電路鑲板上方某個高度處且相鄰於該些封裝中一或更多者的較小厚度處。 Figure 11 further illustrates an underfill layer 620 for enhancing the bond between the bond wires 632 of one of the packages 610A and the solder bumps 652 of the other package 610B mounted thereon. As shown in FIG. 11, the underfill layer 620 only needs to be disposed between the mutually facing surfaces 642, 644 of the packages 610A, 610B; however, the underfill layer 620 can also contact the edge surface of the package 610A and can The first surface 692 of the circuit board 690 of the package 610 is contacted. Further, if present, a portion of the underfill layer 620 extending along the edge surface of the package 610A, 610B will be disposed between a major surface of the circuit board with respect to the package disposed above. At an angle between 90 ° and 90 ° , and tapering from a larger thickness adjacent to the circuit board to a certain height above the circuit board and adjacent to one or more of the packages The smaller thickness of the person.

圖28A至D中所示的封裝排列能夠被施行在用於製造一底部填充層的其中一種技術中,且明確地說,其一部分被設置在封裝1910A 與1910B之相互面對面(例如,封裝1910A的表面1942與封裝1910B的表面1916)之間。如圖28A中所示,封裝1910A會延伸超過封裝1910B的邊緣表面1947,俾使得,舉例來說,囊封層1942的表面1944的一部分裸露在封裝1910B的外面。此區域會被當作一滴塗區1949,藉以讓一裝置能夠從相對於該區的一垂直位置處沉積一可流動狀態的底部填充層材料於該滴塗區上。於此排列中,該滴塗區1949的尺寸會被設計成使得該底部填充層材料能夠以質塊的形式被沉積在該表面上,不會溢出該表面的邊緣,同時又有足夠的量在封裝1910B下方流動,該材料能夠於該處藉由毛細管被吸入封裝1910A與1910B的相互面對表面之間的區域之中,包含它們之間的任何接合點周圍,例如,焊料質塊或類似物。當該底部填充層材料在相互面對表面之間被吸取時,額外的材料會被沉積在該滴塗區上,俾使得會達成連續的流動卻不會大量溢出封裝1910A的邊緣。如圖28B中所示,該滴塗區1949會包圍封裝1910B並且在遠離封裝1910B之周圍邊緣的正交方向中的每一邊有約一毫米(1mm)的維度D。此排列允許以依序或同步的方式在封裝1910B的其中一側或一側以上進行滴塗。替代排列顯示在圖28C與圖28D中,在圖28C中,該滴塗區1949僅沿著封裝1910B的兩個相鄰側延伸並且在正交遠離該第二封裝之周圍邊緣的方向中有約1mm的維度D';在圖28D中,該滴塗區1949沿著封裝1910B的單一側延伸並且在遠離該封裝之周圍邊緣的正交方向中有約1.5mm至2mm的維度D"。 The package arrangement shown in Figures 28A through D can be implemented in one of the techniques for fabricating an underfill layer, and in particular, a portion thereof is disposed in package 1910A There is a face-to-face relationship with 1910B (e.g., surface 1942 of package 1910A and surface 1916 of package 1910B). As shown in FIG. 28A, the package 1910A will extend beyond the edge surface 1947 of the package 1910B such that, for example, a portion of the surface 1944 of the encapsulation layer 1942 is exposed outside of the package 1910B. This area is treated as a drop zone 1949 whereby a device can deposit a flowable underfill material onto the drop zone from a vertical position relative to the zone. In this arrangement, the size of the dispensing zone 1949 can be designed such that the underfill material can be deposited on the surface in the form of a mass without spilling over the edge of the surface while having a sufficient amount Flowing under the package 1910B, where the material can be drawn into the region between the facing surfaces of the packages 1910A and 1910B by capillary tubes, including any joints between them, for example, solder mass or the like . When the underfill material is drawn between the mutually facing surfaces, additional material is deposited on the dispensing area so that a continuous flow is achieved without excessively overflowing the edges of the package 1910A. As shown in Figure 28B, the dispensing zone 1949 will enclose the package 1910B and have a dimension D of about one millimeter (1 mm) on each of the orthogonal directions away from the peripheral edge of the package 1910B. This arrangement allows for dispensing over one or more of the packages 1910B in a sequential or synchronized manner. An alternate arrangement is shown in Figures 28C and 28D, in which the drop-coating zone 1949 extends only along two adjacent sides of the package 1910B and in a direction orthogonal to the peripheral edge of the second package. 1 mm dimension D'; in Figure 28D, the dispensing zone 1949 extends along a single side of the package 1910B and has a dimension D" of about 1.5 mm to 2 mm in an orthogonal direction away from the surrounding edge of the package.

於微電子封裝2010A與2010B在水平輪廓中有類似尺寸的排列中,一順從性底盤2099會在附接期間被用來將封裝2010A與2010B固定在一起,舉例來說,藉由加熱或固化導體質塊2052(舉例來說,回焊焊料 質塊)來接合該第二封裝的終端以及包括焊線2032之未被囊封部分2039的元件,以便將封裝2010A與2010B接合在一起。此排列顯示在圖29中,其中,封裝2010B利用被接合至封裝2010B上之終端2043的導體質塊2052(舉例來說,焊料質塊)被組裝在封裝2010A上方。該些封裝會被對齊,俾使得焊料質塊2052會對齊封裝2010A的焊線2032的未被囊封部分2039或者對齊與該些焊線2032之末端表面2038接合的第二導體元件,如上面所述。底盤2099接著會被組裝圍繞封裝2010A與2010B,用以在一加熱製程期間保持此對齊,於該加熱製程期間,第二封裝的終端會接合該些焊線2032或是該第一封裝的第二導體元件。舉例來說,加熱製程會被用來回焊焊料質塊2052,用以焊接該第二封裝的終端至該些焊線2032或是第二導體元件。底盤2099還會沿著封裝2010B的表面2044以及封裝2010A的表面2016的一部分向內延伸,用以在回焊之前及期間保持該些封裝之間的接觸。底盤2099能夠為有彈性順從性的材料,例如,橡膠、TPE、PTFE(聚四氟乙烯)、矽酮、或是類似物,並且尺寸小於該些被組裝封裝的尺寸,俾使得當位在正確地方時該底盤會施加一擠壓作用力。在塗敷一底部填充層材料期間該底盤2099同樣會維持在正確的地方並且會包含一開口,用以經由該開口進行此塗敷。該順從性底盤2099會在封裝組裝之後被移除。 In a similarly sized arrangement of microelectronic packages 2010A and 2010B in a horizontal profile, a compliant chassis 2099 will be used to secure the packages 2010A and 2010B during attachment, for example, by heating or curing. Body block 2052 (for example, reflow solder The die is bonded to the terminal of the second package and the component comprising the unsealed portion 2039 of the bond wire 2032 to bond the packages 2010A and 2010B together. This arrangement is shown in FIG. 29, in which package 2010B is assembled over package 2010A using conductor mass 2052 (eg, solder mass) bonded to terminal 2043 on package 2010B. The packages are aligned such that the solder mass 2052 will align with the unencapsulated portion 2039 of the bond wire 2032 of the package 2010A or the second conductor element aligned with the end surface 2038 of the bond wire 2032, as described above. Said. Chassis 2099 is then assembled around packages 2010A and 2010B to maintain this alignment during a heating process during which the terminals of the second package engage the bond wires 2032 or the second of the first package. Conductor element. For example, the heating process can be used to reflow the solder mass 2052 to solder the termination of the second package to the bond wires 2032 or the second conductor component. Chassis 2099 also extends inwardly along surface 2044 of package 2010B and a portion of surface 2016 of package 2010A to maintain contact between the packages prior to and during reflow. The chassis 2099 can be a resiliently compliant material, such as rubber, TPE, PTFE (polytetrafluoroethylene), fluorenone, or the like, and is smaller in size than the assembled package, so that the position is correct. The chassis exerts a pressing force when it is in place. The chassis 2099 will also remain in the correct position during application of an underfill material and will include an opening for such application via the opening. The compliant chassis 2099 will be removed after package assembly.

除此之外,或者,如圖30A至F中所示的微電子封裝2110A與2110B,下方封裝2110A會包含至少一對齊表面2151。其中一種範例顯示在圖30A中,其中,多個對齊表面2151被併入在囊封層2142中,靠近封裝2110B的轉角。該些對齊表面相對於主要表面2144為傾斜並且在某個位置處相對於主要表面2144定義一約0°且更高的角度並且包含90°,該些對 齊表面延伸位置靠近該主要表面2144以及位在基板2112上方的次要表面2145,其距離大於主要表面2144。該些次要表面2145會被設置相鄰於封裝2110A的轉角並且能夠部分延伸在其相交側之間。如圖30B中所示,該些對齊表面還會形成反向於封裝2110A之相交側的內側轉角並且能夠以類似的形式被併入在封裝2110A的所有轉角(舉例來說,四個轉角)中。如圖30C中所示,該些對齊表面2151會被定位在和對應焊線2132之未被囊封部分相隔一適當距離處,俾使得當一具有多個突出部(舉例來說,導電突出部,例如,與其接合的導體質塊或焊球)的第二封裝2110B被堆疊在封裝2110A的頂端時,該些對齊表面2151會引導該些焊球進入疊置在該些焊線2132之未被囊封部分上方對應於該些對齊表面2151的正確位置之中。該些焊球接著會被回焊,用以接合封裝2110A的該些焊線2132的未被囊封部分。 In addition, or in the microelectronic packages 2110A and 2110B as shown in FIGS. 30A-F, the lower package 2110A may include at least one alignment surface 2151. One example is shown in Figure 30A, in which a plurality of alignment surfaces 2151 are incorporated in the encapsulation layer 2142, near the corners of the package 2110B. The alignment surfaces are inclined relative to the major surface 2144 and define an angle of about 0 ° and higher relative to the major surface 2144 at a location and include 90 ° , the alignment surface extensions being adjacent to the major surface 2144 and The minor surface 2145 above the substrate 2112 has a greater distance than the major surface 2144. The secondary surfaces 2145 will be disposed adjacent to the corners of the package 2110A and can extend partially between their intersecting sides. As shown in FIG. 30B, the alignment surfaces also form an inner corner opposite the intersection side of the package 2110A and can be incorporated in a similar fashion into all corners of the package 2110A (for example, four corners). . As shown in Figure 30C, the alignment surfaces 2151 are positioned at an appropriate distance from the unencapsulated portion of the corresponding bond wire 2132 such that when there is a plurality of protrusions (for example, conductive protrusions) The second package 2110B, for example, a conductor block or solder ball bonded thereto, is stacked on the top end of the package 2110A, and the alignment surfaces 2151 guide the solder balls into the unbonded portions of the bonding wires 2132. The upper portion of the encapsulation portion corresponds to the correct position of the alignment surfaces 2151. The solder balls are then reflowed to bond the unencapsulated portions of the bond wires 2132 of the package 2110A.

運用對齊表面2251的進一步排列顯示在圖31A至C中,齊中,該些對齊表面2251延伸在一隆起內表面2244與一下方外表面2245之間。於此排列中,內表面2244會疊置在微電子元件2222上方並且因而能夠被隔開放置在基板2212上面。外表面2245在基板的厚度方向中比較靠近基板2212並且被垂直定位在基板2212的表面2214與微電子元件2222的表面2223之間。焊線2232的一或更多個未被囊封部分會以對齊表面2251為基準被定位,用以達成如針對圖30A至C所述般的焊球2252或其它導體突出部之對齊。如上面所述,此種梯級式排列能夠配合或不配合所述對齊功能被使用,用以在一特定焊接質塊尺寸的假定下達成總下方組件高度。進一步言之,併入一隆起內表面2244會增加封裝2210A抵抗翹曲的能力。 A further arrangement using alignment surfaces 2251 is shown in Figures 31A-C, which are aligned between a raised inner surface 2244 and a lower outer surface 2245. In this arrangement, the inner surface 2244 can be stacked over the microelectronic element 2222 and thus can be placed spaced above the substrate 2212. The outer surface 2245 is relatively close to the substrate 2212 in the thickness direction of the substrate and is vertically positioned between the surface 2214 of the substrate 2212 and the surface 2223 of the microelectronic element 2222. One or more of the unsealed portions of the bond wires 2232 are positioned with respect to the alignment surface 2251 for achieving alignment of the solder balls 2252 or other conductor projections as described with respect to Figures 30A-C. As described above, such a stepped arrangement can be used with or without the alignment function to achieve a total lower component height under the assumption of a particular weld mass size. Further, incorporating a raised inner surface 2244 increases the ability of the package 2210A to resist warpage.

圖12所示的係一照相影像,其顯示第一構件610A的焊線 632以及一第二構件(例如,微電子封裝610B)的對應焊料質塊652之間的示範性接合點。在圖12中,元件符號620表示能夠設置一底部填充層的地方。 Figure 12 is a photographic image showing the bonding wire of the first member 610A An exemplary junction between 632 and a corresponding solder mass 652 of a second component (eg, microelectronic package 610B). In Fig. 12, reference numeral 620 denotes a place where an underfill layer can be disposed.

圖13A、13B、13C、13D、13E、以及13F所示的係上面配合圖1所述的焊線32之結構中的某些可能變化例。舉例來說,如在圖13A中所看見,一焊線732A可以有一向上延伸部分736,其終止在一末端738A中,該末端具有和736部分之半徑相同的半徑。 13A, 13B, 13C, 13D, 13E, and 13F show some possible variations in the structure of the bonding wire 32 described above in connection with FIG. For example, as seen in Figure 13A, a weld line 732A can have an upwardly extending portion 736 that terminates in an end 738A having the same radius as the radius of the portion 736.

圖13B圖解一種變化例,其中,末端738B係相對於736部分為漸細的尖端。此外,如在圖13C中所看見,焊線732A的漸細尖端738B可以有一質心740,其在徑向方向741中偏離與其一體成形的焊線的圓柱部分。此形狀可以為因形成該焊線的製程所造成的焊接治具標記,如下面的進一步說明。或者,一如738B處所示以外的焊接治具標記亦可出現在該焊線的該未被囊封部分上。如在圖13A中進一步看見者,一焊線的未被囊封部分739可以和其上設置著導體元件728的基板712之表面730之垂直線成25度內的角度750突出遠離基板712。 Figure 13B illustrates a variation in which end 738B is a tapered tip relative to portion 736. Furthermore, as seen in Figure 13C, the tapered tip 738B of the bond wire 732A can have a center of mass 740 that is offset from the cylindrical portion of the wire formed therewith in the radial direction 741. This shape may be a weld fixture mark resulting from the process of forming the wire, as further described below. Alternatively, a weld fixture mark other than that shown at 738B may also be present on the unencapsulated portion of the bond wire. As further seen in FIG. 13A, the unencapsulated portion 739 of a wire bond can protrude away from the substrate 712 at an angle 750 within 25 degrees of the perpendicular to the surface 730 of the substrate 712 on which the conductor element 728 is disposed.

圖13D圖解一焊線732D的一未被囊封部分會包含一球狀部分738D。該封裝上的一部分或全部焊線會有此結構。如在圖13D中所看見,該球狀部分738D會整合該焊線732D的一圓柱部分736,其中,該球狀部分以及該焊線的該圓柱部分的至少一核心基本上係由銅、銅合金、或是金所組成。如下面的進一步說明,該球狀部分能夠藉由在拼焊該焊線至該基板的一導體元件728之前於一前置整形製程期間熔化裸露在該焊接治具之毛細管的一開口處的該焊線的一部分來形成。如在圖13D中所看見,該球狀部分738D的直徑744可以大於與其一體成形的圓柱形焊線部分736的直徑 746。於一特殊的實施例中,例如,圖13D中所示者,與該球狀部分738D一體成形的焊線732D的圓柱部分會突出超越該封裝的囊封層751的表面752。或者,如在圖13E中所看見,一焊線732D的圓柱部分可以被該囊封層完全覆蓋。於此情況中,如在圖13E中所看見,焊線732D的球狀部分738D可於某些情況中被該囊封層751部分覆蓋。 Figure 13D illustrates that an unencapsulated portion of a bond wire 732D will include a spherical portion 738D. Some or all of the bonding wires on the package will have this structure. As seen in FIG. 13D, the spherical portion 738D will integrate a cylindrical portion 736 of the bonding wire 732D, wherein the spherical portion and at least one core of the cylindrical portion of the bonding wire are substantially copper and copper. Alloy, or gold. As further explained below, the spherical portion can be melted at an opening of the capillary of the soldering fixture during a pre-shaping process prior to tailor welding the wire to a conductor member 728 of the substrate. A part of the wire is formed. As seen in Figure 13D, the diameter 744 of the spherical portion 738D can be greater than the diameter of the cylindrical wire portion 736 integrally formed therewith. 746. In a particular embodiment, for example, as shown in FIG. 13D, the cylindrical portion of the bond wire 732D integrally formed with the spherical portion 738D will protrude beyond the surface 752 of the encapsulation layer 751 of the package. Alternatively, as seen in Figure 13E, the cylindrical portion of a bond wire 732D can be completely covered by the encapsulation layer. In this case, as seen in Figure 13E, the spherical portion 738D of the bond wire 732D may be partially covered by the encapsulation layer 751 in some cases.

圖13F進一步圖解一焊線732F,其具有一由主要金屬製成的核心731以及一其上的金屬拋光漆733,該金屬拋光漆包含一疊置在該主要金屬上方的第二金屬,例如,上面所述的鈀殼銅質電線或是鈀殼金質電線。於另一範例中,一非金屬材料製成的氧化保護層(例如,市售的「有機保銲膜(Organic Solderability Preservative,OSP)」)會被形成在一焊線的未被囊封部分上,用以防止其氧化,直到該焊線的未被囊封部分被接合至另一構件的對應接點為止。 Figure 13F further illustrates a bond wire 732F having a core 731 made of a primary metal and a metal finish 733 thereon, the metal finish comprising a second metal superposed over the primary metal, for example, The palladium shell copper wire described above or the palladium shell gold wire. In another example, an oxidized protective layer made of a non-metallic material (for example, a commercially available "Organic Solderability Preservative (OSP)") is formed on an unencapsulated portion of a bonding wire. To prevent oxidation thereof until the unencapsulated portion of the wire is bonded to the corresponding joint of the other member.

圖14A所示的係能夠在將經整形的電線部分800焊接至一焊接表面(舉例來說,焊接至一基板上的導體元件28)之前藉以將本文中所述的焊線32(圖1)整形為延伸自一焊接治具804之一面(舉例來說,延伸自一毛細管類型焊接治具804的面806)的電線部分的方法,本文中將作進一步說明。如在該圖中的階段A處所看見,一部分的電線800(也就是,一金屬電線中具有預設長度802的一體成形部分,例如,上面配合圖1所述的金質或銅質電線或是合成電線)延伸超越一焊接治具804的一面806。於下面的範例中,該焊接治具804係一在其面806中有一開口的毛細管,該電線部分會延伸超越該開口。然而,雖然下面的範例將焊接治具表示為一毛細管;不過,除非另外提及,否則,該焊接治具可能係一毛細管或是一不同類型的焊接治 具,例如,超音波或是熱超音波焊接治具或熔焊治具。 The system shown in Figure 14A is capable of bonding the wire bond 32 described herein prior to soldering the shaped wire portion 800 to a soldering surface (e.g., soldering to the conductor component 28 on a substrate) (Figure 1). The method of shaping the portion of the wire extending from one of the faces of a welding fixture 804 (for example, extending from the face 806 of a capillary type welding fixture 804) is further described herein. As seen at stage A in the figure, a portion of the wire 800 (i.e., an integrally formed portion of a metal wire having a predetermined length 802, such as the gold or copper wire described above in connection with Figure 1 or The synthetic wire) extends beyond a side 806 of a welding fixture 804. In the following example, the welding fixture 804 is a capillary having an opening in its face 806 that extends beyond the opening. However, although the following example shows the welding fixture as a capillary; however, unless otherwise mentioned, the welding fixture may be a capillary or a different type of welding treatment. With, for example, ultrasonic or thermal ultrasonic welding fixtures or welding fixtures.

為安排該金屬電線的預設長度向外延伸超越毛細管面806,初始的電線長度會藉由利用焊接治具804來設定,用以在先前的處理階段中將該電線焊接至一焊接表面,舉例來說,藉由拼焊法或是藉由帶焊法。於一實施例中,當運用帶焊法時,該帶體會係一或更多個平坦表面,並且有多邊形剖面,例如,矩形剖面。而後,該焊接治具的面806會相對於焊接表面被移動,俾使得該焊接治具面806接著會被設置在此焊接表面所在的平面上方的較大高度處,而且具有該預設長度的電線部分會延伸超越該毛細管面806。因此,該焊接治具相對於該焊接表面的移動會導致具有該預設長度的電線部分800被拉出該焊接治具。而後,該電線會在送往該焊接表面的拼焊焊料與該電線部分800之間的邊界處被切斷。依此方式,該電線部分800會在其末端838處被切斷。於其中一範例中,為切斷該電線部分800,該電線會在該毛細管面上方的某一位置處被夾鉗,而且該被夾鉗的電線接著會被拉緊,以便讓該被夾鉗的電線會相鄰於該電線的被焊接部分斷裂,並且因而從被焊接的第二電線部分處釋放該電線部分800的末端838。該電線能夠藉由相對於該毛細管或是該焊接表面中至少其中一者施加一作用力於另一者上而被拉緊,舉例來說,藉由在相對於該電線延伸穿過該毛細管之方向的至少部分垂直方向中拉引該毛細管。此時,該電線部分800可以在筆直方向801中延伸遠離該毛細管的面806。於其中一範例中,方向801可以垂直於該毛細管的面806。 To arrange the predetermined length of the metal wire to extend outward beyond the capillary face 806, the initial wire length is set by using the welding fixture 804 to weld the wire to a soldered surface in a previous processing stage, for example In this case, by tailor welding or by welding. In one embodiment, when the tape bonding method is applied, the tape body is tied to one or more flat surfaces and has a polygonal cross section, for example, a rectangular cross section. Thereafter, the face 806 of the welding fixture is moved relative to the welding surface such that the welding fixture surface 806 is then disposed at a greater height above the plane in which the welding surface is located, and has the predetermined length The wire portion extends beyond the capillary face 806. Therefore, the movement of the welding jig relative to the welding surface causes the wire portion 800 having the predetermined length to be pulled out of the welding jig. Then, the wire is cut at the boundary between the tailor solder which is sent to the soldering surface and the wire portion 800. In this manner, the wire portion 800 will be severed at its end 838. In one example, to cut the wire portion 800, the wire will be clamped at a location above the capillary face, and the clamped wire will then be tensioned to allow the clamp to be clamped. The wire will break adjacent to the welded portion of the wire and thus release the end 838 of the wire portion 800 from the second wire portion being welded. The wire can be tensioned by applying a force to the other relative to the capillary or the welding surface, for example, by extending through the capillary relative to the wire The capillary is pulled in at least a portion of the direction of the vertical direction. At this point, the wire portion 800 can extend away from the face 806 of the capillary in the straight direction 801. In one example, the direction 801 can be perpendicular to the face 806 of the capillary.

在整形該電線部分800中,該毛細管與一形成表面(舉例來說,一形成元件810的一通道或溝槽內的表面812)會相對於彼此被定位,俾 使得延伸超越毛細管面806的電線部分800的末端838被定位在和毛細管面806相隔較大的深度802處,深度802大於在該毛細管面底下的形成表面812的深度803。形成元件810可以為一或更多個治具或元件,它們一起擁有適合在該電線部分被焊接至該基板的導體元件之前幫助形成(也就是,整形)該電線部分的表面。 In shaping the wire portion 800, the capillary and a forming surface (e.g., a channel or 812 within the channel forming the element 810) are positioned relative to each other, The end 838 of the wire portion 800 extending beyond the capillary face 806 is positioned at a greater depth 802 from the capillary face 806, the depth 802 being greater than the depth 803 forming the surface 812 under the capillary face. Forming element 810 can be one or more fixtures or elements that together have a surface adapted to help form (i.e., shape) the portion of the wire before the wire portion is soldered to the conductor element of the substrate.

如在階段B處所看見,毛細管804或是一形成表面812中的至少其中一者會相對於彼此移動,俾使得電線部分800在與其平行的至少第一方向814中相對於該形成表面812移動,以便朝毛細管804彎折該電線部分800。舉例來說,如圖14A中所示,毛細管804相對於第一形成表面812移動會讓該電線部分遠離如在階段A處所看見的初始方向801被彎折,俾使得該電線部分800的至少一部分沿著毛細管面806延伸。於其中一範例中,該第一形成表面812會係一沿著一形成元件810延伸在第一方向814中的溝槽裡面的一表面,其中,該第一方向會平行於該毛細管面806。舉例來說,溝槽815會張開於面對毛細管面806的形成元件的第二表面813。如在階段B處所看見,在整形或前置形成製程期間,電線部分800可以延伸至溝槽之中並且可以延伸在平行於表面812且平行於毛細管804之移動方向814的第一方向中,如在圖14A的階段B處所看見。 As seen at stage B, at least one of the capillary 804 or a forming surface 812 is moved relative to each other such that the wire portion 800 moves relative to the forming surface 812 in at least a first direction 814 parallel thereto, In order to bend the wire portion 800 toward the capillary 804. For example, as shown in FIG. 14A, movement of the capillary 804 relative to the first forming surface 812 will cause the wire portion to be bent away from the initial direction 801 as seen at stage A, such that at least a portion of the wire portion 800 is made. Extending along the capillary face 806. In one example, the first forming surface 812 is a surface that extends within a groove in the first direction 814 along a forming element 810, wherein the first direction is parallel to the capillary face 806. For example, the groove 815 will open to the second surface 813 forming the element facing the capillary face 806. As seen at stage B, during the shaping or pre-forming process, the wire portion 800 can extend into the groove and can extend in a first direction parallel to the surface 812 and parallel to the direction of movement 814 of the capillary 804, such as Seen at stage B of Figure 14A.

而後,在階段B處實施電線整形之後,在階段C處,毛細管804會在第二方向817中移動,該第二方向橫切於與毛細管面806平行的方向。於此處理階段期間,延伸遠離毛細管面806的該毛細管的裸露壁820可以面對一第二形成表面864。依此方式,毛細管804在方向817中的移動會導致電線部分800在朝向該裸露壁820的方向中被彎折。於其中一範例 中,第二形成表面864會係形成元件810的一表面,該第二形成表面864延伸遠離第一形成表面812。於其中一範例中,該第二形成表面會以和該第一形成表面812成角度865延伸,角度865可以和毛細管的裸露壁相對於毛細管面806延伸的角度867相同。如在圖14A的階段C處所看見,毛細管的移動會導致電線部分800的一部分沿著該毛細管的裸露壁820於方向818中朝上突出。毛細管或焊接治具804可以在其裸露壁上有一溝槽、平坦側、或是其它電線引導特徵元件,用以於該處幫助引導電線。當該焊接治具有一垂直壁時(如圖35中所示),第二形成表面864能夠為垂直的,也就是,位在正交於該焊接治具面的角度處。該些電線部分800可以由銅或銅合金來形成,並且可以有相對小的直徑,舉例來說,25微米,俾使得每一個封裝有大量的輸入/輸出連接線,舉例來說,1000至2000條。 Then, after wire shaping is performed at stage B, at stage C, the capillary 804 is moved in a second direction 817 that is transverse to the direction parallel to the capillary face 806. During this processing stage, the bare wall 820 of the capillary extending away from the capillary face 806 can face a second forming surface 864. In this manner, movement of the capillary 804 in the direction 817 can cause the wire portion 800 to be bent in a direction toward the bare wall 820. One of the examples The second forming surface 864 will form a surface of the element 810 that extends away from the first forming surface 812. In one example, the second forming surface may extend at an angle 865 to the first forming surface 812, the angle 865 being the same as the angle 867 at which the bare wall of the capillary extends relative to the capillary surface 806. As seen at stage C of Figure 14A, movement of the capillary causes a portion of the wire portion 800 to protrude upwardly in the direction 818 along the exposed wall 820 of the capillary. The capillary or welding fixture 804 can have a groove, flat side, or other wire guiding feature on its exposed wall to help guide the wire there. When the welding process has a vertical wall (as shown in Figure 35), the second forming surface 864 can be vertical, i.e., at an angle normal to the face of the welding jig. The wire portions 800 may be formed of copper or a copper alloy and may have a relatively small diameter, for example, 25 microns, such that each package has a large number of input/output connections, for example, 1000 to 2000. article.

階段C圖解藉由毛細管804和另一形成表面823在橫切於毛細管面806的方向中(舉例來說,在方向817中)或是在垂直於該毛細管面806、該形成表面823、或是垂直於兩個表面的方向中的相對移動而對電線部分800所進行的進一步處理。就其目的來說,該形成表面823會被視為一「鑄造表面」。當完成之後,此相對移動會鑄造被設置在該毛細管面806與該鑄造表面823之間的電線部分的一部分825。 Stage C is illustrated by capillary 804 and another forming surface 823 in a direction transverse to capillary face 806 (for example, in direction 817) or perpendicular to the capillary face 806, the forming surface 823, or Further processing of the wire portion 800 is performed perpendicular to the relative movement in the direction of the two surfaces. For its purposes, the forming surface 823 will be considered a "casting surface." When completed, this relative movement will cast a portion 825 of the wire portion disposed between the capillary face 806 and the casting surface 823.

圖14B所示的係位在毛細管面806下方的一位置處的一經整形電線部分800的片斷平面圖;而圖14C進一步顯示介於該毛細管面806與該鑄造表面823之間的電線部分800以及該電線部分的多個部分的位置的剖面圖,如下面的進一步說明。舉例來說,圖14B圖解在鑄造表面823下方的一位置處並且朝該電線部分800的已鑄造部分825看去的該經整形電線 部分,俾使得該毛細管面806出現在圖14B中該電線部分的已鑄造部分825上方(也就是,後面)的一位置處。對齊毛細管面中之開口808的電線部分800的一部分827同樣被圖解在圖14B、14C中。沿著該毛細管的裸露壁820(圖14A)延伸遠離該毛細管806的電線部分800的一部分831同樣被圖解在圖14A至B中。該電線部分的該些部分827與831通常在上面根據圖14A所述的處理之後仍維持圓柱形剖面,當電線部分800的825部分被鑄造在毛細管面806與鑄造表面823之間時,電線的此些部分827、831可以防止該電線平坦化。 Figure 14B is a fragmentary plan view of a shaped wire portion 800 at a location below the capillary face 806; and Figure 14C further shows the wire portion 800 between the capillary face 806 and the cast surface 823 and A cross-sectional view of the location of portions of the wire portion, as further described below. For example, FIG. 14B illustrates the shaped wire at a location below the casting surface 823 and looking toward the cast portion 825 of the wire portion 800. In part, the capillary surface 806 is present at a location above (i.e., behind) the cast portion 825 of the wire portion of Figure 14B. A portion 827 of the wire portion 800 that aligns the opening 808 in the capillary face is also illustrated in Figures 14B, 14C. A portion 831 of the wire portion 800 extending away from the capillary 820 along the bare wall 820 (Fig. 14A) of the capillary is also illustrated in Figures 14A-B. The portions 827 and 831 of the wire portion typically maintain a cylindrical cross-section after the process described above with respect to Figure 14A, when the portion 825 of the wire portion 800 is cast between the capillary face 806 and the cast surface 823, the wire Such portions 827, 831 can prevent the wire from flattening.

當鑄造表面823為平坦時,於其中一範例中,面向該鑄造表面823的該電線部分的已鑄造部分825的一面833的至少一部分同樣會為平坦。此平坦面833接著可進一步被該毛細管焊接至一導體元件28的一焊接表面,如上面所述。 When the casting surface 823 is flat, in one example, at least a portion of one side 833 of the cast portion 825 of the wire portion facing the casting surface 823 will also be flat. This flat surface 833 can then be further capillary welded to a soldering surface of a conductor element 28, as described above.

然而,或者,該鑄造表面823於某些情況中可被圖樣化,俾使得其中會有隆起特徵元件與凹陷特徵元件。於此情況中,該電線部分的已鑄造部分825的面833可以同樣為由隆起特徵元件與凹陷特徵元件所組成的已圖樣化面,其背向該毛細管面806。該已鑄造部分825的此已圖樣化面接著可被焊接至一導體元件28的一焊接表面。 Alternatively, however, the cast surface 823 may be patterned in some cases such that there are raised features and recessed features. In this case, the face 833 of the cast portion 825 of the wire portion can likewise be a patterned face comprised of a raised feature and a recessed feature that faces away from the capillary face 806. This patterned surface of the cast portion 825 can then be soldered to a soldering surface of a conductor element 28.

依此方式前置整形該電線部分800之後,該毛細管便能夠被用來焊接該經前置整形的電線部分800至一基板的一導體元件28的一焊接表面(圖1)。為實施線焊,該電線現在會被移動遠離該形成單元810並且朝基板的導體元件28(圖1)移動,該毛細管接著會於該導體元件28處將該已鑄造的電線部分825拼焊至該導體元件28,該電線部分的末端838會係該 遠離該導體元件28的焊線的遠端末端38(圖1)。 After pre-shaping the wire portion 800 in this manner, the capillary can be used to weld the pre-shaped wire portion 800 to a soldering surface of a conductor member 28 of a substrate (Fig. 1). To perform wire bonding, the wire will now be moved away from the forming unit 810 and moved toward the conductor element 28 (FIG. 1) of the substrate, which will then weld the cast wire portion 825 to the conductor element 28 to The conductor element 28, the end 838 of the wire portion will be Distal from the distal end 38 of the wire of the conductor element 28 (Fig. 1).

讓具有一已鑄造部分825的電線部分800具備一能夠為平坦或者經圖樣化的下方表面833或是具備一部分平坦及部分圖樣化的面能夠幫助在該經整形的電線部分800與該導體元件28的焊接表面之間形成良好的焊接。如從圖14A中便能夠瞭解,當準備焊接至該焊接表面時,該經整形的電線部分800相對於該電線的直徑為長,而且當該電線部分被焊接至該導體元件28時,除了受到該導體元件28的焊接表面支撐以外(圖1),該電線的冗長延伸部分(雖然並非全部,但為該經整形電線部分中的大部分)並未受到支撐。 Having the wire portion 800 having a cast portion 825 with a flat or patterned lower surface 833 or having a portion of a flat and partially patterned surface can aid in the shaped wire portion 800 and the conductor member 28 A good weld is formed between the welded surfaces. As can be understood from Fig. 14A, the shaped wire portion 800 is long relative to the wire when it is ready for soldering to the soldering surface, and when the wire portion is soldered to the conductor member 28, Except for the soldering surface of the conductor element 28 (Fig. 1), the lengthy extension of the wire, although not all, is largely unsupported by the majority of the shaped wire portion.

當該電線部分被焊接至該焊接表面時,鑄造該電線部分能構改良該電線部分的穩定性。舉例來說,該電線的已鑄造部分825的平坦化或圖樣化可以在該毛細管施加作用力至該電線部分用以將其焊接至該焊接表面時幫助提高該已鑄造部分825的下方表面833與該焊接表面之間的摩擦,並且可以在該焊接作用力被施加時降低該電線旋轉、滾動、或是其它移動的傾向。依此方式,該電線部分的已鑄造部分825能夠在一毛細管的面806施加作用力用以將該電線焊接至該焊接表面時克服具有原始圓柱形形狀的電線旋轉或滾動的可能性。圖15進一步顯示在根據本發明一實施例的方法中該毛細管在一形成元件810的表面上方移動的範例。如在該圖中所看見,於一特殊的範例中,該形成元件810可以有一第一開口或凹部830,其中,當該電線部分800向外延伸超越該毛細管的開口808時,毛細管804被設置在電線整形的初始階段處(圖14A的階段A)。該開口830或凹部可以包含一漸細部分、通道、或溝槽832,其能夠幫助在階段B處於表面812上 引導該電線部分800,並且其還可以在表面812的特殊部分上引導該電線部分。此漸細部分能夠為漸細而使得該漸細部分在朝向表面812的方向中越來越小,以便幫助扣接與引導該電線部分至一特殊位置。 When the wire portion is welded to the soldering surface, casting the wire portion can improve the stability of the wire portion. For example, planarization or patterning of the cast portion 825 of the wire can help increase the lower surface 833 of the cast portion 825 when the capillary exerts a force to the wire portion for soldering it to the weld surface. The friction between the welding surfaces and the tendency of the wire to rotate, roll, or otherwise move when the welding force is applied. In this manner, the cast portion 825 of the wire portion can exert a force on a face 806 of the capillary to overcome the possibility of rotation or rolling of the wire having the original cylindrical shape when the wire is welded to the weld surface. Figure 15 further illustrates an example of the movement of the capillary over a surface forming element 810 in a method in accordance with an embodiment of the present invention. As seen in this figure, in a particular example, the forming element 810 can have a first opening or recess 830, wherein when the wire portion 800 extends outward beyond the opening 808 of the capillary, the capillary 804 is set At the initial stage of wire shaping (stage A of Figure 14A). The opening 830 or recess may include a tapered portion, channel, or groove 832 that can assist in phase B on surface 812. The wire portion 800 is guided and it is also possible to guide the wire portion over a particular portion of the surface 812. This tapered portion can be tapered such that the tapered portion becomes smaller and smaller in the direction toward the surface 812 to assist in fastening and guiding the wire portion to a particular position.

該形成單元可以進一步包含一通道834或溝槽,用以在該製程的階段B中引導該電線段800。如圖15中的進一步顯示,該形成單元可以包含進一步的開口或凹部840,其中,它的一內表面816可以充當第二形成表面,該毛細管會在該製程的階段C中沿著該第二形成表面移動用以讓該金屬電線段倚靠著該毛細管的外壁820於方向818中彎折。於其中一範例中,開口或凹部816內的該第二形成表面會包含一通道或溝槽819,其相對於該開口816內的另一內表面為凹陷。於一特殊的範例中,該鑄造表面823會被設置在該開口816內。視情況,除了溝槽819之外,或者替代地,一溝槽亦可以被形成在該治具上或者被形成在該毛細管本身上。舉例來說,如圖14C中所示,除了溝槽819之外,或者替代地,一溝槽811亦可以被形成在該毛細管面806上。 The forming unit can further include a channel 834 or trench for guiding the wire segment 800 in stage B of the process. As further shown in FIG. 15, the forming unit can include a further opening or recess 840, wherein an inner surface 816 thereof can serve as a second forming surface that will follow the second in stage C of the process. A surface movement is formed to bend the metal wire segment against the outer wall 820 of the capillary in direction 818. In one example, the second forming surface in the opening or recess 816 will include a channel or groove 819 that is recessed relative to the other inner surface within the opening 816. In a particular example, the casting surface 823 will be disposed within the opening 816. Optionally, in addition to the grooves 819, or alternatively, a groove may be formed on the jig or formed on the capillary itself. For example, as shown in FIG. 14C, in addition to or in addition to the grooves 819, a groove 811 can also be formed on the capillary face 806.

於一實施例中會使用圖14中所示的毛細管的變化例,其併入一垂直或接近垂直的側壁2820。如圖35中所示,毛細管2804的側壁2820能夠為實質上垂直,或者,換言之,平行於電線段2800或垂直於毛細管2804的面2806。相較於由定義一實質上小於90°的角度的毛細管外部的側壁所達到的角度(例如,圖14中所示的毛細管),這能夠允許形成一更接近垂直的焊線(圖1中的32),也就是,遠離基板之第一表面的表面更接近90°的角度。舉例來說,利用形成治具2810能夠達到讓該焊線被設置成使得該第一部分延伸在與該第一電線部分2822成下面之間的角度:25°與90°之間,或是約 45°與90°之間,或是約80°與90°之間。 A variation of the capillary shown in Figure 14 will be used in an embodiment that incorporates a vertical or nearly vertical sidewall 2820. As shown in FIG. 35, the sidewall 2820 of the capillary 2804 can be substantially vertical or, in other words, parallel to the wire segment 2800 or perpendicular to the face 2806 of the capillary 2804. This allows for a closer to vertical weld line (as in Figure 1) compared to the angle achieved by the sidewall of the outside of the capillary defining an angle substantially less than 90 ° (eg, the capillary shown in Figure 14). 32), that is, the surface away from the first surface of the substrate is closer to an angle of 90 ° . For example, using the forming fixture 2810, the wire can be placed such that the first portion extends at an angle between the lower portion of the first wire portion 2822: between 25 ° and 90 ° , or about 45 degrees . Between ° and 90 ° , or between about 80 ° and 90 ° .

於另一變化例中,一毛細管3804會包含一表面3808,其突出超越其面3806。舉例來說,此表面3808會被併入於側壁3820的邊緣上方並且可以形成一唇部。在用於形成一焊線(舉例來說,圖1中的32)的方法中,毛細管3804會在形成電線段期間被擠壓抵頂電線段3800的第一部分3822,舉例來說,當該毛細管在沿著一形成表面3816(其延伸在遠離表面3812的方向中)的方向中移動時。於此範例中,表面3808會在接近剩餘電線段3800延伸彎折的位置處擠壓至該第一部分3822之中。這會導致該電線段3800變形,俾使得其可以擠壓抵頂毛細管3804的壁部3820並且當毛細管3804被移除時移至一更垂直的位置。於其它實例中,因表面3808所造成的變形會使得當該毛細管3804被移除時該電線段3800的一位置能夠實質上保持不變。 In another variation, a capillary 3804 would include a surface 3808 that protrudes beyond its face 3806. For example, this surface 3808 would be incorporated over the edge of the sidewall 3820 and could form a lip. In the method for forming a weld line (for example, 32 in Fig. 1), the capillary 3804 is pressed against the first portion 3822 of the top wire segment 3800 during formation of the wire segment, for example, when the capillary When moving in a direction along a forming surface 3816 that extends in a direction away from surface 3812. In this example, surface 3808 will be squeezed into the first portion 3822 near the location where the remaining wire segments 3800 extend the bend. This can cause the wire segment 3800 to deform such that it can squeeze against the wall portion 3820 of the top capillary 3804 and move to a more vertical position when the capillary 3804 is removed. In other examples, the deformation caused by the surface 3808 can cause a position of the wire segment 3800 to remain substantially unchanged when the capillary 3804 is removed.

圖16A至16C所示的係根據本發明一實施例,在形成焊線的方法中整形一電線的各個階段以及其中所使用的一組形成表面。圖16A顯示一形成元件850,其能夠在該電線部分與一基板的焊接表面之間形成一焊接之前被用來整形延伸超越一焊接治具之一面的一電線的一部分。如上面所述的範例中(圖14A至C),該焊接治具804能夠係一毛細管類型治具或是其它焊接治具,例如,超音波焊接治具或是熔焊治具。如在圖16A中所看見,一凹陷852可以從形成元件850的邊緣851處延伸在向內的方向中。凹陷852會被配置成用以收容延伸自一焊接治具的一面的一電線的一部分,例如,延伸自該毛細管或是其它類型焊接治具的一面的一電線部分。於一特殊的實施例中,該些凹陷可以額外包含一具有寬度855的漸細部分 或通道854,寬度855略大於要被整形於其中的電線的直徑。就一漸細部分來說,該寬度會在朝第一形成表面860的方向中變得越來越小,俾使得該漸細部分會幫助引導該電線移往該第一形成表面的一特殊區862(舉例來說,中央區)。該第一形成表面可以為平坦的,也就是,延伸在第一與第二橫切方向中的平面或實質平面的表面;而該第一形成表面的區域862同樣能夠為平坦的。依此方式,當在該方法的一階段中(例如,在圖14中所看見的階段B中)整形該電線部分時,該第一形成表面能夠延伸在平行於該焊接治具或毛細管之一面的方向中。 16A through 16C illustrate various stages of shaping a wire and a set of forming surfaces used therein in a method of forming a wire bond, in accordance with an embodiment of the present invention. Figure 16A shows a forming element 850 that can be used to shape a portion of an electrical wire that extends beyond one face of a welding fixture prior to forming a weld between the wire portion and a soldering surface of a substrate. As in the example described above (Figs. 14A-C), the welding fixture 804 can be a capillary type fixture or other welding fixture, such as an ultrasonic welding fixture or a fusion welding fixture. As seen in Figure 16A, a recess 852 can extend from the edge 851 of the forming element 850 in an inward direction. The recess 852 can be configured to receive a portion of an electrical wire extending from one side of a welding fixture, for example, a wire portion extending from one side of the capillary or other type of welding fixture. In a particular embodiment, the depressions may additionally include a tapered portion having a width 855 Or channel 854, the width 855 is slightly larger than the diameter of the wire to be shaped therein. In the case of a tapered portion, the width will become smaller and smaller in the direction toward the first forming surface 860, such that the tapered portion will help guide the wire to a particular region 862 of the first forming surface. (for example, Central District). The first forming surface may be flat, that is, a planar or substantially planar surface extending in the first and second transverse directions; and the first surface forming region 862 can also be flat. In this manner, when the wire portion is shaped in a stage of the method (e.g., in stage B as seen in Figure 14), the first forming surface can extend parallel to one side of the welding fixture or capillary In the direction.

形成元件850通常還包含一第二形成表面864,其延伸遠離該第一形成表面860。於在圖16A中所看見的範例中,第二形成表面864延伸遠離該第一形成表面860。該第二形成表面864可以被設置在一第二凹陷866中,該凹陷從和邊緣851反向的該形成元件的邊緣861處向內延伸。於其中一範例中,第二形成表面864傾斜遠離該第一形成表面860的角度865會和該焊接治具的裸露壁868傾斜遠離該焊接治具面的角度867相同,如在圖14A中所看見。 Forming element 850 also typically includes a second forming surface 864 that extends away from the first forming surface 860. In the example seen in FIG. 16A, the second forming surface 864 extends away from the first forming surface 860. The second forming surface 864 can be disposed in a second recess 866 that extends inwardly from the edge 861 of the forming element that is opposite the edge 851. In one example, the angle 865 at which the second forming surface 864 is inclined away from the first forming surface 860 is the same as the angle 867 at which the bare wall 868 of the welding fixture is inclined away from the welding fixture face, as in FIG. 14A. see.

該形成元件860通常具有一額外表面,其能夠為一「鑄造」表面870,該焊接治具或毛細管的一面會在電線整形製程期間被擠壓抵頂該鑄造表面870,用以鑄造被設置在該焊接治具的面806與該鑄造表面870之間該電線的一部分。 The forming element 860 typically has an additional surface that can be a "cast" surface 870 that is pressed against the casting surface 870 during the wire shaping process for casting to be placed A portion of the wire between the face 806 of the welding fixture and the casting surface 870.

圖16B圖解當該毛細管或其它類型焊接治具804已經移至即將開始對延伸超越該焊接治具面的電線部分進行整形的位置之中時整形該電線部分800(圖14A)的一階段。此時,該電線部分800延伸在形成元件850 的凹陷852之中。圖16B所示的整形該電線的階段類同於圖14A中所示的階段A,圖16B進一步顯示該焊接治具沿著該形成元件850移動的方向814。 Figure 16B illustrates a stage in shaping the wire portion 800 (Figure 14A) when the capillary or other type of welding fixture 804 has been moved into a position to begin shaping the portion of the wire that extends beyond the surface of the welding fixture. At this time, the wire portion 800 extends over the forming member 850 Among the depressions 852. The stage of shaping the wire shown in FIG. 16B is similar to stage A shown in FIG. 14A, and FIG. 16B further shows the direction 814 in which the welding jig moves along the forming element 850.

圖16C圖解當該焊接治具804已經沿著一第一形成表面860或862在方向814中移動時整形該電線部分800(圖14A)的進一步階段,此些表面已經配合圖16A在上面說明過。圖中所示的該電線部分的一部分831延伸遠離該焊接治具的開口808,類似於在圖14A中的階段B處所看見的電線部分。 Figure 16C illustrates a further stage of shaping the wire portion 800 (Figure 14A) as the welding fixture 804 has moved in a direction 814 along a first forming surface 860 or 862, which has been described above in connection with Figure 16A. . A portion 831 of the wire portion shown in the figures extends away from the opening 808 of the welding fixture, similar to the portion of the wire seen at stage B in Figure 14A.

圖16D進一步圖解類似於在圖14A的階段C處所看見的整形該電線的一階段,其中,該焊接治具804已經移動到對齊於該形成元件中一第二凹陷的位置。此時,延伸遠離該開口的該電線部分的831部分會朝該焊接治具的裸露壁彎折,如上面針對圖14A所示及所述。除此之外,此時,如上面關於圖14A的階段C所示及所述,該焊接治具804會藉由擠壓介於該焊接治具的該面與該鑄造表面之間的該電線部分的一部分來鑄造該電線部分,該鑄造表面870如圖16A中所示。圖16E的示意圖顯示,根據本文中所述一或更多種方法所形成的焊線932會有偏離它們個別基底934的末端938。於其中一範例中,一電線的一末端938會和其個別基底產生移位,俾使得該末端938在平行於該基板之表面的方向中移位超越其所連接的導體元件的周圍。於另一範例中,一焊線的末端938會和其個別基底934產生移位,俾使得該末端938在平行於該基板之表面的方向中移位超越其所連接的導體元件的周圍933。 Figure 16D further illustrates a stage similar to that seen at stage C of Figure 14A, wherein the welding fixture 804 has been moved to a position aligned with a second recess in the forming element. At this point, the portion of portion 831 of the wire portion that extends away from the opening is bent toward the exposed wall of the welding fixture, as shown and described above with respect to Figure 14A. In addition, at this time, as shown and described above with respect to stage C of FIG. 14A, the welding jig 804 is extruded by the wire between the face of the welding jig and the casting surface. A portion of the portion is cast to the wire portion, and the casting surface 870 is as shown in Figure 16A. Figure 16E is a schematic diagram showing that bond wires 932 formed in accordance with one or more of the methods described herein have ends 938 that are offset from their individual substrates 934. In one example, an end 938 of a wire will be displaced from its individual substrate such that the end 938 is displaced in a direction parallel to the surface of the substrate beyond the circumference of the conductor element to which it is attached. In another example, the end 938 of a wire bond will be displaced from its individual substrate 934 such that the end 938 is displaced in a direction parallel to the surface of the substrate beyond the perimeter 933 of the conductor element to which it is attached.

圖17A至C所示的係在形成站880處利用一焊接治具來整形該電線部分的範例。該形成站會組裝至(舉例來說,被裝設至)一焊線站同 樣與其組裝的結構,因此,一電線部分會在該形成站處被該焊接治具整形之後被該焊接治具移動到該焊線站並且接著被焊接至一基板、微電子元件、或是其它構件上的一焊接表面。如在圖17A中所看見,一焊接頭844的一焊接治具804部分會先藉由如上面所述般移動該焊接治具而被移至形成站880,該電線部分會在該形成站880處被整形。舉例來說,焊接頭844或是該焊接頭的一部分會繞著一軸線旋轉,用以移動該焊接治具至形成站880。 17A to C illustrate an example of shaping the wire portion at a forming station 880 using a welding jig. The forming station will be assembled (for example, to be installed) to a wire bonding station a structure assembled therewith, whereby a wire portion is moved by the welding fixture to the wire bonding station after being shaped by the welding fixture at the forming station and then soldered to a substrate, microelectronic component, or the like a welded surface on the component. As seen in Figure 17A, a portion of a weld fixture 804 of a weld head 844 is first moved to a forming station 880 by moving the welding fixture as described above, and the wire portion will be at the forming station 880. The place was shaped. For example, the weld head 844 or a portion of the weld head can rotate about an axis to move the welding jig to the forming station 880.

形成元件850會以該焊線站為基準被配向在特定方向中,用以減少在該形成站與焊線站之間該焊接頭或焊接治具所需要的移動範圍。如在圖17A中所看見,於其中一範例中,在該形成站處的形成元件850會被配向成使得上面配合圖16A所述的凹陷852可以在相對於該焊線站的一遠端位置處,而該鑄造表面870可以在比較靠近(也就是,相鄰於)該焊線站的位置處。於另一範例中,凹陷852與鑄造表面870被配向在反向方向中,凹陷852比該鑄造表面更靠近該焊線站。於又一範例中,該形成元件可能在該電線部分的整形期間位於其中一個配向中,並且接著該形成元件的配向會被反向,以便在移動該經整形電線部分至用於焊接的最終位置中之前允許其上有該經整形電線部分的焊接治具有較大的移動自由度。 The forming element 850 is oriented in a particular direction with respect to the wire bonding station to reduce the range of movement required for the welding head or welding fixture between the forming station and the wire station. As seen in Figure 17A, in one example, the forming element 850 at the forming station will be oriented such that the recess 852 described above in conjunction with Figure 16A can be at a distal location relative to the wire station. Whereas, the casting surface 870 can be at a location that is relatively close (i.e., adjacent to) the wire station. In another example, the recess 852 and the casting surface 870 are aligned in a reverse direction with the recess 852 being closer to the wire station than the casting surface. In yet another example, the forming element may be in one of the alignments during shaping of the wire portion, and then the alignment of the forming element may be reversed to move the shaped wire portion to a final position for soldering The welding process on which the portion of the shaped wire is allowed to have a greater degree of freedom of movement before.

圖17B圖解在整形該電線部分(其可以包含如上面所述的鑄造該電線部分)結束時焊接治具804與焊接頭844的位置。此時,該焊接治具接著會從形成站880處的位置(圖17B)移到焊線站882處的位置(圖17C)之中,該經整形電線部分接著會於該處被焊接至一構件884的一焊接表面上。 Figure 17B illustrates the position of the welding jig 804 and the welding head 844 at the end of shaping the wire portion (which may include casting the wire portion as described above). At this point, the welding fixture will then be moved from the position at the forming station 880 (Fig. 17B) to the position at the bonding station 882 (Fig. 17C) where the shaped wire portion will then be welded to one. A welded surface of member 884.

圖18A至18C所示的係另一變化例,其中,焊接治具804和一形成元件1810(例如,上面所述的形成元件810或850)會被組裝至一共同焊接頭1844。於其中一範例中,該形成元件1810會被附接至焊接頭1844或是被攜載於該焊接頭1844上,俾使得該焊接頭的移動會運送被附接至該處的形成元件1810以及該焊接治具。然而,該形成元件1810會相對於該焊接治具移動,以便在焊接該電線部分之前幫助整形該電線部分;但是,接著,一旦該電線已經被整形並且準備被焊接至一構件1884之後,該形成元件1810會被移動遠離此形成位置,如在圖18C中所看見。 Another variation of the embodiment shown in Figures 18A through 18C in which the welding fixture 804 and a forming member 1810 (e.g., forming member 810 or 850 described above) are assembled to a common bonding head 1844. In one example, the forming element 1810 can be attached to or otherwise carried on the soldering tip 1844 such that movement of the soldering tip carries the forming component 1810 attached thereto and The welding fixture. However, the forming element 1810 is moved relative to the welding fixture to aid in shaping the wire portion prior to welding the wire portion; however, then, once the wire has been shaped and ready to be welded to a member 1884, the formation Element 1810 will be moved away from this formation position as seen in Figure 18C.

於其中一範例中,該形成元件1810會被攜載於一可旋轉或是可移動的臂部1812上,以便在該焊接治具1804與該臂部1812之間有相對移動。或者,該形成元件1810可以在操作期間被提供在一具有一固定位置的臂部上,並且取而代之的係,該焊接治具會相對於該形成元件來移動。於一操作的範例中,在如圖18A中所示的處理階段處,該焊接治具1804與該形成元件1810會被排列在如圖18A中所示的位置中,其中,該形成元件1810與該焊接治具係位在分隔的位置處。當如圖18A中所示般排列時,一經整形電線部分會被焊接至構件1884上的一導體元件或其它特徵元件的焊接表面。 In one example, the forming element 1810 can be carried on a rotatable or movable arm 1812 for relative movement between the welding jig 1804 and the arm 1812. Alternatively, the forming element 1810 can be provided on an arm having a fixed position during operation and, in the alternative, the welding jig can be moved relative to the forming element. In an example of operation, at the processing stage as shown in FIG. 18A, the bonding fixture 1804 and the forming element 1810 are arranged in a position as shown in FIG. 18A, wherein the forming element 1810 is The welding fixture is tied at a spaced apart position. When aligned as shown in Figure 18A, a shaped wire portion is welded to the soldering surface of a conductor member or other feature member on member 1884.

而後,如在圖18B中所看見,該形成元件與該焊接治具之間的相對運動將該焊接治具與該形成元件放置在該電線部分能夠被整形的位置處,例如,上面配合圖14至16中一或更多圖式所述。因此,於一特殊的範例中,在該電線部分的整形期間,該焊接治具會保持在要被焊接的構件1884上面或是靠近要被焊接的構件1884的一位置處,該位置可以在構件 1884上的一特殊焊接部位上面或是靠近該特殊焊接部位。依此方式,該焊接頭的移動會減少,並且因而其可以在焊接該電線部分至該構件上的焊接表面之前縮短用以整形該電線部分所需要的時間數額。 Then, as seen in FIG. 18B, the relative movement between the forming element and the welding jig places the welding jig and the forming element at a position where the wire portion can be shaped, for example, with FIG. 14 As described in one or more of 16 patterns. Thus, in a particular example, during the shaping of the wire portion, the welding jig will remain on or adjacent to a member 1884 to be welded, which may be at the component. A special weld on 1884 is either above or near the particular weld. In this manner, the movement of the weld head is reduced, and thus it is possible to shorten the amount of time required to shape the wire portion prior to welding the wire portion to the weld surface on the member.

如在圖18C中所看見,在該電線部分已經被整形之後,該形成元件1810可以移到如在圖18C中所看見的第三位置,並且當該形成元件位在此位置中時,該焊接治具接著可以焊接該經整形電線部分至該構件。 As seen in Figure 18C, after the wire portion has been shaped, the forming element 1810 can be moved to a third position as seen in Figure 18C, and when the forming element is in this position, the soldering The jig can then weld the shaped wire portion to the member.

圖19所示的係上面所述之前置形成製程的一變化例,其能夠用於形成焊線332Cii(圖5),該焊線具有一彎折以及末端1038,末端1038在橫向方向1014A中和會被拼焊至作為該些焊線之基底1034的導體元件的部分1022產生移位。 Figure 19 is a variation of the pre-formation process described above, which can be used to form a bond wire 332Cii (Fig. 5) having a bend and end 1038 with the end 1038 in the transverse direction 1014A. The portion 1022, which will be tailor welded to the conductor elements of the substrate 1034 of the bond wires, is displaced.

如在圖19中所看見,該製程的前面三個階段A、B、以及C會和上面參考圖14A所述者相同。接著,參考圖中的階段C與D,相鄰於毛細管804的面806的焊線的一部分1022A會被一與該形成單元一體成形的治具夾鉗。該夾鉗作用可以因該毛細管在該形成單元上方運動的關係而主動或被動地實施。於其中一範例中,該夾鉗作用能夠藉由擠壓一其上具有不滑動表面的平板於該金屬電線段800上來實施,用以防止該金屬電線段的移動。 As seen in Figure 19, the first three phases A, B, and C of the process will be the same as described above with reference to Figure 14A. Next, referring to stages C and D in the figure, a portion 1022A of the bond wire adjacent to the face 806 of the capillary 804 is clamped by a jig integrally formed with the forming unit. The clamping action can be actively or passively implemented by the relationship of the capillary movement over the forming unit. In one example, the clamping action can be performed by squeezing a flat plate having a non-sliding surface thereon onto the metal wire segment 800 to prevent movement of the metal wire segment.

當該金屬電線段800依此方式被夾鉗時,在圖19中所示的階段D處,該毛細管或焊接治具804會沿著形成單元1010的第三表面1018在方向1016中移動並且送出等於在表面1018中移動之距離的電線長度。而後,在階段E處,該毛細管會沿著該形成單元的第三表面1024向下移動,用以讓該電線的一部分沿著毛細管804的外表面1020向上彎折。依此方式, 該電線的一向上突出部分1026會藉由該金屬電線的一第三部分1048被連接至另一向上突出部分1036。 When the metal wire segment 800 is clamped in this manner, at stage D shown in Figure 19, the capillary or welding fixture 804 will move in the direction 1016 along the third surface 1018 of the forming unit 1010 and be sent out The length of the wire equal to the distance moved in the surface 1018. Then, at stage E, the capillary will move down the third surface 1024 of the forming unit to allow a portion of the wire to flex upwardly along the outer surface 1020 of the capillary 804. In this way, An upwardly projecting portion 1026 of the wire is coupled to the other upwardly projecting portion 1036 by a third portion 1048 of the wire.

在形成該電線段並且將其焊接至一導體元件用以形成一焊線之後,尤其是上面討論的焊球類型,該焊線(舉例來說,圖1中的32)接著會與該毛細管(例如,圖14A中的804)裡面的剩餘的電線部分分離。這能夠在遠離焊線32之基底34的任何位置處來完成並且較佳的係在和基底34遠離相隔的距離足以定義焊線32的所希望的高度的位置處來完成。此分離能夠在面806以及焊線32的基底34之間由一被設置在毛細管804裡面或是被設置在毛細管804外面的機制來實行。於其中一方法中,電線段800能夠藉由在所希望的分離點處有效地燒穿該電線800而被分離,其能夠藉由施加火光或火焰於該處來完成。為達到更大的焊線高度精確性,可以不同的形式來削切該電線段800。如本文中的討論,削切能夠用來描述一種在所希望位置處減弱該電線的部分削切;或者,完全切穿該電線,用以達到完全分離該焊線32與剩餘電線段800之目的。 After forming the wire segment and soldering it to a conductor element for forming a wire bond, particularly the type of solder ball discussed above, the wire (for example, 32 in Figure 1) will then be associated with the capillary ( For example, the remaining wires in 804) of Figure 14A are partially separated. This can be done at any location away from the substrate 34 of the bond wire 32 and is preferably accomplished at a location that is spaced apart from the substrate 34 by a distance sufficient to define the desired height of the bond wire 32. This separation can be performed between the face 806 and the base 34 of the bond wire 32 by a mechanism disposed within the capillary 804 or disposed outside of the capillary 804. In one of the methods, the wire segment 800 can be separated by effectively burning through the wire 800 at a desired separation point, which can be accomplished by applying a flare or flame thereto. To achieve greater wire bond height accuracy, the wire segment 800 can be cut in different forms. As discussed herein, shaving can be used to describe a partial cut that attenuates the wire at a desired location; or, completely cut through the wire for the purpose of completely separating the bond wire 32 from the remaining wire segment 800. .

於圖32中所示的其中一範例中,一削切刀片805會被整合至該焊接頭組件之中,例如,在毛細管804裡面。如圖示,一開口807會被併入在削切刀片805能夠延伸貫穿的毛細管804的側壁820中。削切刀片805能夠移入與移出毛細管804的內部,因此,其能夠交替地讓電線800自由地通過或是扣接該電線800。據此,削切刀片805位在毛細管內部外面的一位置中時,電線800會被拉出並且焊線32會被形成且被焊接至一導體元件28。在焊接形成之後,該電線段800會利用被整合在該焊接頭組件中的一夾鉗器803而被夾鉗,用以固定該電線的位置。削切刀片805接著會被移 到該電線段之中,用以完全削切該電線或是部分削切或減弱該電線。完整削切會毛細管804能夠移動遠離焊線32(舉例來說,以便形成另一焊線)的位置點處形成焊線32的末端表面38。同樣地,倘若電線段800被削切刀片805減弱的話,在電線仍被電線夾鉗器803固持時移動該焊接頭單元則能夠藉由在被該部分削切減弱的區域處折斷該電線800而導致分離。 In one of the examples shown in FIG. 32, a cutting blade 805 is integrated into the welding head assembly, for example, within the capillary 804. As shown, an opening 807 will be incorporated into the sidewall 820 of the capillary 804 through which the cutting blade 805 can extend. The cutting blade 805 can be moved into and out of the interior of the capillary 804 so that it can alternately allow the wire 800 to freely pass or snap the wire 800. Accordingly, when the cutting blade 805 is positioned in a position outside the inside of the capillary, the wire 800 is pulled out and the wire 32 is formed and welded to a conductor member 28. After the weld is formed, the wire segment 800 is clamped with a clamp 803 integrated into the weld head assembly to secure the position of the wire. The cutting blade 805 will then be moved Into the wire segment, to completely cut the wire or partially cut or weaken the wire. The complete cut will form the end surface 38 of the bond wire 32 at a point where the capillary 804 can move away from the bond wire 32 (for example, to form another bond wire). Likewise, if the wire segment 800 is attenuated by the cutting blade 805, moving the welding head unit while the wire is still held by the wire clamp 803 can break the wire 800 at the region that is weakened by the portion. Lead to separation.

削切刀片805的移動能夠利用一偏心凸輪(offset cam)藉由氣動式元件或是藉由伺服馬達來啟動。於其它範例中,削切刀片805移動能夠藉由一彈簧或是振動隔板來啟動。用於削切刀片805啟動的觸發訊號能夠以一從形成該焊球處開始倒數計時的時間延遲為基礎;或者,能夠藉由移動毛細管804至焊線基底34上面的預設高度處而被啟動。此訊號會被連結至操作該焊接機器的其它軟體,俾使得該削切刀片805位置能夠在進行任何接續的焊接形成之前被重置。該削切機制還會在一並列於刀片805的位置處包含一第二刀片(圖中並未顯示),該電線位在它們之間,以便藉由相對於該些第一刀片與第二刀片中的一或更多者來移動該些第一刀片與第二刀片中的另一者來削切該電線,例如,於其中一範例中,從該電線的反向側處削切該電線。 The movement of the cutting blade 805 can be initiated by a pneumatic cam or by a servo motor using an offset cam. In other examples, the cutting blade 805 can be moved by a spring or a vibrating diaphragm. The trigger signal for the initiation of the cutting blade 805 can be based on a time delay from the start of the countdown to form the solder ball; or can be initiated by moving the capillary 804 to a predetermined height above the bond wire substrate 34. . This signal will be coupled to other software that operates the welding machine such that the cutting blade 805 position can be reset prior to any subsequent weld formation. The cutting mechanism also includes a second blade (not shown) at a position juxtaposed to the blade 805, the wire being positioned therebetween so as to be relative to the first blade and the second blade One or more of the ones move the other of the first and second blades to cut the wire, for example, in one example, the wire is cut from the opposite side of the wire.

於另一範例中,一雷射809會被組裝置該焊接頭單元並且被定位用以削切該電線。如在圖33中所示,一雷射頭809會被定位在毛細管804的外面,例如,藉由裝設於該處或是裝設至包含毛細管804的焊接頭單元上的另一位置點。該雷射會在所希望的時間處被啟動,例如,上面針對圖32中的削切刀片805所討論的時間,用以削切電線800,在基底34上面所希望的高度處形成焊線32的末端表面38。於其它施行方式中,雷射809 會被定位用以指引削切射束通過或是進入毛細管804本身之中並且會在該焊接頭單元內部。於一範例中會使用二氧化碳雷射;或者,於一替代例中會使用Nd:YAG雷射或是Cu蒸汽雷射。 In another example, a laser 809 would be assembled to the soldering head unit and positioned to cut the wire. As shown in FIG. 33, a laser head 809 will be positioned outside of the capillary 804, for example, by being mounted there or at another location on the solder joint unit including the capillary 804. The laser will be activated at the desired time, for example, for the time discussed above with respect to the cutting blade 805 of FIG. 32, for cutting the wire 800 to form a bond wire 32 at a desired height above the substrate 34. End surface 38. In other modes of implementation, Laser 809 It will be positioned to direct the cutting beam through or into the capillary 804 itself and will be inside the welding head unit. Carbon dioxide lasers are used in one example; alternatively, Nd:YAG lasers or Cu vapor lasers may be used in an alternative.

於另一實施例中會使用如在圖34A至C中所示的一模版單元824來分離該些焊線32與剩餘的電線段800。如在圖34A中所示,模版824會係一種具有一主體用以在該些焊線32之所希望高度處或附近定義一上表面826的結構。模版824會被配置成用以接觸導體元件28或是基板12的任何部分或是在該些導體元件28之間與其連接的封裝結構。該模版包含複數個孔洞828,它們會對應於焊線32的所希望位置,例如,在導體元件28上方。該些孔洞828的尺寸會被設計成用以於其中接受該焊接頭單元的毛細管804,俾使得該毛細管能夠延伸至該孔洞之中抵達一相對於該導體元件28的位置,以便焊接該電線800至該導體元件28,用以形成基底34,例如,藉由球焊法或類似法。於其中一範例中,該模版會有多個孔洞,藉以露出該些導體元件中的獨特導體元件。於另一範例中,複數個導體元件能夠由該模版的單一孔洞露出。舉例來說,一孔洞會係該模版中的一通道形狀的開口或凹陷,一列或一行該些導體元件會經由該孔洞裸露在該模版的頂端表面826處。 In another embodiment, a stencil unit 824 as shown in Figures 34A-C is used to separate the bond wires 32 from the remaining wire segments 800. As shown in FIG. 34A, the stencil 824 is a structure having a body for defining an upper surface 826 at or near a desired height of the bond wires 32. The stencil 824 will be configured to contact the conductor elements 28 or any portion of the substrate 12 or a package structure connected thereto between the conductor elements 28. The stencil includes a plurality of holes 828 that will correspond to the desired location of the bond wires 32, for example, above the conductor elements 28. The holes 828 are sized to receive the capillary 804 of the weld head unit therein such that the capillary can extend into the hole to a position relative to the conductor member 28 for soldering the wire 800. To the conductor element 28, a substrate 34 is formed, for example, by ball bonding or the like. In one example, the stencil may have a plurality of holes to expose unique conductor elements in the plurality of conductor elements. In another example, a plurality of conductor elements can be exposed by a single aperture of the stencil. For example, a hole would be a channel shaped opening or depression in the stencil through which a row or row of conductor elements would be exposed at the top end surface 826 of the stencil.

接著,當拉出該電線段至所希望的長度時,毛細管804會垂直地被移出孔洞828。一旦通過孔洞828,該電線段便會被夾鉗在該焊接頭單元裡面,例如,被夾鉗器803夾鉗;而毛細管804則會在一橫向方向(例如,平行於模版824的表面826)中移動,用以移動該電線段800使其接觸因孔洞828的該表面與模版824的外表面826相交所定義的模版824的邊緣 829。此移動會導致焊線32與仍被固持在毛細管804裡面的電線段800的剩餘部分分離。此製程會重複進行,以便在所希望的位置中形成所希望數量的焊線32。於一施行方式中,該毛細管會在焊線分離之前被垂直地移動,俾使得剩餘的電線段突出超越毛細管804的面806一距離802,該距離足以形成一接續的焊球。圖34B顯示模版824的一變化例,其中,該些孔洞828會為漸細的,俾使得它們的直徑從表面826處的第一直徑遞增至遠離表面826的較大直徑。於另一變化例中,如在圖34C中所示,該模版會被形成具有一外框架821,該外框架821的厚度足以隔開位在和基板12相隔所希望距離處的表面826。框架821會至少部分包圍一凹腔823,其被配置成被定位在基板12旁邊,模版824的厚度延伸在表面826與開放區823之間,俾使得當模版824被定位在基板12上時,模版824中包含孔洞828的部分會與基板12隔開。 Next, when the wire segment is pulled out to the desired length, the capillary 804 is removed vertically from the hole 828. Once through the aperture 828, the wire segment is clamped within the weld head unit, for example, clamped by the clamp 803; and the capillary 804 is in a lateral direction (e.g., parallel to the surface 826 of the stencil 824). Medium movement for moving the wire segment 800 to contact the edge of the stencil 824 defined by the intersection of the surface of the hole 828 with the outer surface 826 of the stencil 824 829. This movement causes the bond wire 32 to separate from the remainder of the wire segment 800 that is still held within the capillary 804. This process is repeated to form the desired number of bond wires 32 in the desired location. In one mode of operation, the capillary is moved vertically prior to wire bond separation such that the remaining wire segments protrude beyond the face 806 of the capillary 804 by a distance 802 that is sufficient to form a continuous solder ball. Figure 34B shows a variation of the stencil 824 in which the holes 828 are tapered such that their diameter increases from a first diameter at the surface 826 to a larger diameter away from the surface 826. In another variation, as shown in Figure 34C, the stencil will be formed with an outer frame 821 having a thickness sufficient to separate the surface 826 at a desired distance from the substrate 12. The frame 821 will at least partially surround a cavity 823 that is configured to be positioned alongside the substrate 12, the thickness of the stencil 824 extending between the surface 826 and the open area 823 such that when the stencil 824 is positioned on the substrate 12, Portions of the stencil 824 that include the holes 828 are spaced from the substrate 12.

圖20A至C所示的係藉由模鑄來形成該囊封層時能夠使用的一種技術,以便讓該些焊線的未被囊封部分39(圖1)突出超越囊封層42的表面44。因此,如在圖20A中所看見,薄膜輔助式模鑄技術能夠被用來將一臨時膜1102放置在一模具的平板1110與一凹腔1112之間,一包含該基板、與其接合的焊線1132、以及一構件(例如,微電子元件)的子組件可以被接合於該凹腔1112中。膜1102可以由乙烯-四氟乙烯來形成。膜1102可以覆蓋該些焊線之長度的至少10%並且可以為至少50微米。於其中一實施例中,膜1102可以為200微米;不過,該膜亦能夠為厚於或是薄於200微米。圖20A進一步顯示該模具的一第二平板1111,其能夠被設置成反向於第一平板1110。 20A to C are a technique that can be used by molding to form the encapsulation layer so that the unencapsulated portion 39 (Fig. 1) of the bonding wires protrudes beyond the surface of the encapsulation layer 42. 44. Thus, as seen in Figure 20A, a thin film assisted die casting technique can be used to place a temporary film 1102 between a flat plate 1110 of a mold and a cavity 1112, a bond wire comprising the substrate, bonded thereto A subassembly of 1132, and a component (eg, a microelectronic component) can be bonded into the cavity 1112. The film 1102 can be formed of ethylene-tetrafluoroethylene. The film 1102 can cover at least 10% of the length of the wire bonds and can be at least 50 microns. In one embodiment, the film 1102 can be 200 microns; however, the film can also be thicker or thinner than 200 microns. FIG. 20A further shows a second flat plate 1111 of the mold that can be disposed opposite the first flat plate 1110.

接著,如在圖20B至20C中所看見,當模具平板1110、1111組合在一起時,焊線1132的末端1138會突出至該臨時膜1102之中。當一模具化合物在凹腔1112中流動用以形成囊封層1142時,該模具化合物不會接觸該些焊線的末端1138,因為它們被臨時膜1102覆蓋。於此步驟之後,該些模具平板1110、1111會從囊封層1142處被移除,而臨時膜1102則會現在從模具表面1144處被移除,其會讓焊線1132的末端1138維持突出超越該囊封層的表面1144。 Next, as seen in FIGS. 20B through 20C, when the mold plates 1110, 1111 are combined, the end 1138 of the bonding wire 1132 protrudes into the temporary film 1102. When a mold compound flows in the cavity 1112 to form the encapsulation layer 1142, the mold compound does not contact the ends 1138 of the bonding wires because they are covered by the temporary film 1102. After this step, the mold plates 1110, 1111 are removed from the encapsulation layer 1142, and the temporary film 1102 is now removed from the mold surface 1144, which will maintain the end 1138 of the bond wire 1132. Beyond the surface 1144 of the encapsulation layer.

薄膜輔助式模鑄技術亦可被調適成用於大量生產。舉例來說,於該製程的其中一範例中,該臨時膜的一連續薄板的一部分會被施加至該模具平板。接著,該囊封層會被形成在至少部分由該模具平板定義的凹腔1112之中。接著,在模具平板1110上的臨時膜1102的目前部分會自動地被該臨時膜的一連續薄板的另一部分取代。於該薄膜輔助式模鑄技術的一變化例中不必使用如上面所述的可移除膜,取而代之的係,在形成該囊封層之前,一可水溶性膜會被放置在模具平板1110的一內表面上。當該些模具平板被移除時,該可水溶性膜會能夠藉由沖洗而被移除,俾便如上面所述般讓焊線的末端維持突出超越該囊封層的表面1144。 Thin film assisted die casting techniques can also be adapted for mass production. For example, in one example of the process, a portion of a continuous sheet of the temporary film is applied to the mold plate. The encapsulation layer will then be formed in a cavity 1112 defined at least in part by the mold plate. Next, the current portion of the temporary film 1102 on the mold plate 1110 is automatically replaced by another portion of a continuous sheet of the temporary film. In a variation of the film-assisted molding technique, it is not necessary to use a removable film as described above. Instead, a water-soluble film is placed on the mold plate 1110 before forming the encapsulation layer. On the inner surface. When the mold plates are removed, the water soluble film can be removed by rinsing, and the ends of the wire are maintained to protrude beyond the surface 1144 of the encapsulation layer as described above.

於圖20A至B之方法的一範例中,囊封層1142的表面1144以上的焊線1132的高度在該些焊線1132中並不相同,如在圖37A中所示。用於進一步處理封裝1110俾使得焊線1132突出在表面1142上面實質上均勻高度的方法顯示在圖37B至D中並且運用一犧牲材料層1178,該犧牲材料層能夠藉由將其塗敷在表面1144上方而被形成用以覆蓋該些焊線1132的未被囊封部分。該犧牲層1178接著會被平坦化,用以降低其高度至焊線 1132的所希望的高度,其能夠藉由磨削、碾磨、拋光、或是類似方法來達成。同樣如中所示,犧牲層1178的平坦化會始於降低其高度至讓焊線1132變成裸露在該犧牲層1178之表面處的位置點。該平坦化製程接著還會同步於該犧牲層1178來平坦化該些焊線1132,俾使得當犧牲層1178的高度持續下降時,焊線1132的高度也會下降。一旦達到焊線1132的所希望的高度,該平坦化便會停止。應該注意的係,於此製程中,焊線1132一開始被形成的高度雖然並不均勻,但是它們的高度全部大於目標均勻高度。在平坦化降低焊線1132至所希望的高度之後,犧牲層1178會被移除,例如,藉由蝕刻或類似方法。該犧牲層1178能夠由可利用不會明顯影響囊封材料的蝕刻劑蝕刻移除的材料來形成。於其中一範例中,該犧牲層1178能夠由可水溶性的塑膠材料來製成。 In an example of the method of FIGS. 20A-B, the height of the bonding wires 1132 above the surface 1144 of the encapsulation layer 1142 is not the same in the bonding wires 1132, as shown in FIG. 37A. A method for further processing the package 1110 such that the bond wire 1132 protrudes substantially above the surface 1142 is shown in Figures 37B-D and utilizes a sacrificial material layer 1178 that can be applied to the surface by applying it Above the 1144 is formed to cover the unencapsulated portions of the bonding wires 1132. The sacrificial layer 1178 is then planarized to reduce its height to the bond wire The desired height of 1132 can be achieved by grinding, milling, polishing, or the like. As also shown, the planarization of the sacrificial layer 1178 will begin by lowering its height to a point where the bond wire 1132 becomes bare at the surface of the sacrificial layer 1178. The planarization process is then also synchronized to the sacrificial layer 1178 to planarize the bond wires 1132 such that as the height of the sacrificial layer 1178 continues to decrease, the height of the bond wires 1132 also decreases. Once the desired height of the bond wire 1132 is reached, the planarization stops. It should be noted that in this process, the height at which the bonding wires 1132 are initially formed is not uniform, but their heights are all greater than the target uniform height. After planarizing the drop wire 1132 to a desired height, the sacrificial layer 1178 is removed, for example, by etching or the like. The sacrificial layer 1178 can be formed from a material that can be removed by etchant etching that does not significantly affect the encapsulating material. In one example, the sacrificial layer 1178 can be made of a water soluble plastic material.

圖21A與21B所示的係能夠藉以形成突出超越該囊封層的一表面的焊線之未被囊封部分的另一種方法。因此,於圖21A中所看見的範例中,剛開始,焊線1232可以齊平於囊封層1242的表面1244,或者甚至可以沒有裸露在囊封層1242的表面1244處。接著,如圖21B中所示,該囊封層的一部分(舉例來說,已模鑄的囊封層)會被移除,用以讓末端1238突出超越經修正的囊封層表面1246。因此,於其中一範例中,雷射燒蝕會被用來均勻地挖凹該囊封層,用以形成一平坦的凹陷表面1246。或者,雷射燒蝕能夠在該囊封層中鄰接獨特焊線的多個區域中被選擇性地實施。 The method shown in Figures 21A and 21B is capable of forming another method of projecting the unencapsulated portion of the bond wire that extends beyond a surface of the encapsulation layer. Thus, in the example seen in FIG. 21A, initially, bond wire 1232 may be flush with surface 1244 of encapsulation layer 1242, or may even be absent from surface 1244 of encapsulation layer 1242. Next, as shown in FIG. 21B, a portion of the encapsulation layer (eg, the molded encapsulation layer) is removed to cause the end 1238 to protrude beyond the modified encapsulation surface 1246. Thus, in one example, laser ablation will be used to evenly dent the envelope layer to form a flat recessed surface 1246. Alternatively, laser ablation can be selectively performed in a plurality of regions of the encapsulation layer that are adjacent to the unique bond wire.

能夠用來以該些焊線為基準選擇性地移除該囊封層之至少一部分的其它技術包含「濕式噴磨(wet blasting)」技術。在濕式噴磨中,由一液體媒介所攜載的磨蝕性顆粒流會被引導朝向一目標物,用以從該目標 物的表面處移除材料。該顆粒流有時候可以結合一化學蝕刻劑,其可以其它結構(例如,在濕式噴磨之後希望保留的焊線)為基準來幫助或加速選擇性移除材料。 Other techniques that can be used to selectively remove at least a portion of the encapsulation layer based on the bond wires include "wet blasting" techniques. In wet blasting, a flow of abrasive particles carried by a liquid medium is directed toward a target from which the target is directed The material is removed from the surface of the object. The particle stream can sometimes incorporate a chemical etchant that can assist or accelerate the selective removal of materials based on other structures (e.g., weld lines that are desired to remain after wet jet blasting).

於圖38A與38B中所示的範例中,於圖21A與21B中所示方法的一變化例中,焊線迴圈1232’會被形成使得基底1234a在其中一末端處的導體元件1228上並且在另一末端1234b處被附接至微電子元件1222的一表面。為將焊線迴圈1232’附接至微電子元件1222,微電子元件1223的表面會被金屬化,例如,藉由濺鍍、化學氣相沉積、電鍍、或是類似方法。基底1234a能夠被球焊(如圖示)或是如被接合至微電子元件1222的末端1234b般地被邊緣焊接。如圖38A中進一步所示,介電囊封層1242能夠被形成在基板1212上方,用以覆蓋該些焊線迴圈1232’。囊封層1242接著會被平坦化(例如,藉由碾磨、磨削、拋光、或是類似方法),用以降低其高度並且用以將該些焊線迴圈1232’分成連接焊線1232A以及熱消散焊點1232B,連接焊線1232A可用於接合至其至少末端表面1238以便電連接至導體元件1228,而熱消散焊點1232B則被接合至微電子元件1222。該些熱消散焊點會使得它們沒有被電連接至該微電子元件1222的任何電路系統,而被定位成用以將熱傳導離開該微電子元件1222,送往囊封層1242的表面1244。額外的處理方法會被套用至如本文中其它地方所述之所生成的封裝1210’。 In the example shown in Figures 38A and 38B, in a variation of the method illustrated in Figures 21A and 21B, wire bond loop 1232' will be formed such that substrate 1234a is on conductor element 1228 at one of its ends and Attached to a surface of the microelectronic element 1222 at the other end 1234b. To attach wire bond loop 1232' to microelectronic element 1222, the surface of microelectronic element 1223 can be metallized, for example, by sputtering, chemical vapor deposition, electroplating, or the like. Substrate 1234a can be ball bonded (as shown) or edge welded as bonded to end 1234b of microelectronic element 1222. As further shown in FIG. 38A, a dielectric encapsulation layer 1242 can be formed over the substrate 1212 to cover the wire bond loops 1232'. The encapsulation layer 1242 is then planarized (eg, by milling, grinding, polishing, or the like) to reduce its height and to divide the wire bond loops 1232' into bond wires 1232A. As well as the heat dissipation solder joint 1232B, the bond wire 1232A can be used to bond to at least its end surface 1238 for electrical connection to the conductor element 1228, while the heat dissipation solder joint 1232B is bonded to the microelectronic element 1222. The heat dissipating solder joints may be such that they are not electrically connected to any circuitry of the microelectronic component 1222 and are positioned to conduct heat away from the microelectronic component 1222 to the surface 1244 of the encapsulation layer 1242. Additional processing methods will be applied to the package 1210' generated as described elsewhere herein.

圖22A至22E所示的係藉由模鑄來形成一囊封層的又一種方法,其中,焊線的未被囊封部分伸出穿過該囊封層。如圖22A中所示,多條焊線1302被模鑄在一基板1304上。該些焊線1302可以包含一電線1306 與一基底1308,其可以被連接至一導體元件,例如,無電鍍鎳無電鍍鈀浸鍍金(Electroless Nickel Electroless Palladium Immersion Gold,ENEPIG)材料。電線1306可以由包含銅或銅合金的材料來形成。舉例來說,一隆起的材料區1310(例如,堤部)可以沿著基板1304的面1312的周邊被形成在該半導體區的面1312處或上,該些焊線1302則被定位在一由區域1310劃界或是至少部分接壤的區域裡面。於一特殊的範例中,區域1310可以由可成像的材料來形成,例如,焊料遮罩。 A further method of forming an encapsulating layer by die casting as shown in Figures 22A through 22E, wherein the unencapsulated portion of the bonding wire projects through the encapsulating layer. As shown in FIG. 22A, a plurality of bonding wires 1302 are molded on a substrate 1304. The bonding wires 1302 may include a wire 1306 And a substrate 1308, which can be connected to a conductor element, such as an electroless nickel electroless Palladium Immersion Gold (ENEPIG) material. The wire 1306 can be formed from a material comprising copper or a copper alloy. For example, a raised material region 1310 (eg, a bank) may be formed at or above the face 1312 of the semiconductor region along the perimeter of the face 1312 of the substrate 1304, and the bond wires 1302 are positioned The area 1310 is delimited or is at least partially bordered. In a particular example, region 1310 can be formed from an imageable material, such as a solder mask.

如圖22B中所示,一硬化層1314(於其中一情況中,其可被稱為電線固鎖材料1314)會被設置在基板1304的面1312上並且被區域1310完全或至少部分納入。依此方式,區域1310可以至少部分定義要於其中將電線固鎖材料提供於表面1312上的區域。電線長度會如上所述,並且於一特殊的範例中,每一條電線1306的長度可以在150至200微米的近似範圍內。於其中一範例中,該電線固鎖材料1314可以利用自旋(spin-on)製程來散佈及分配。在被沉積時,電線固鎖材料1314可以覆蓋從基板1304的面1312處延伸一距離的該電線1306的一部分,舉例來說,固鎖材料可以覆蓋約50微米或是近似該電線之長度的四分之一至三分之一。電線固鎖材料1314會增加電線1306的硬度或剛性,防止撓折或彎折該電線。於其中一範例中,該電線固鎖材料可以為充滿二氧化矽的液態囊封劑,其硬度通常大於等效而沒有任何填充的囊封劑,例如,商標名稱為NoSWEEPTM的囊封劑。 As shown in FIG. 22B, a hardened layer 1314 (which in one case may be referred to as wire lock material 1314) may be disposed on face 1312 of substrate 1304 and fully or at least partially incorporated by region 1310. In this manner, region 1310 can at least partially define an area in which wire securing material is to be provided on surface 1312. The length of the wires will be as described above, and in a particular example, the length of each wire 1306 can be in the approximate range of 150 to 200 microns. In one example, the wire lock material 1314 can be dispensed and dispensed using a spin-on process. When deposited, the wire securing material 1314 can cover a portion of the wire 1306 that extends a distance from the face 1312 of the substrate 1304. For example, the locking material can cover about 50 microns or approximately four the length of the wire. One to one third. The wire lock material 1314 increases the stiffness or rigidity of the wire 1306, preventing the wire from being bent or bent. In one example, the wire lock material can be a liquid encapsulant filled with cerium oxide, typically having a hardness greater than equivalent without any filled encapsulant, such as the encapsulant under the trade name NoSWEEPTM.

如圖22C中所示,當形成囊封時,該些電線1306可以被插入於一可移除膜1316之中,該膜可以和上面針對圖20A至20C所述的臨時膜1102相同或類似並且可以由乙烯-四氟乙烯來形成。於一實施例中,膜 1316可以覆蓋該些焊線之長度的至少10%並且可以為至少50微米。於其中一實施例中,膜1316的厚度可以為200微米;不過,該膜厚度亦能夠大於或小於200微米。例如,在如上面所述的囊封層42的形成期間,膜1316會防止電線1306的末端部分1306e被第二材料(舉例來說,一模鑄化合物或是其它囊封劑1318)覆蓋。 As shown in Figure 22C, when an encapsulation is formed, the wires 1306 can be inserted into a removable film 1316 that can be the same or similar to the temporary film 1102 described above with respect to Figures 20A-20C and It can be formed from ethylene-tetrafluoroethylene. In one embodiment, the film 1316 can cover at least 10% of the length of the wire bonds and can be at least 50 microns. In one embodiment, the film 1316 can have a thickness of 200 microns; however, the film thickness can also be greater or less than 200 microns. For example, during formation of the encapsulation layer 42 as described above, the film 1316 prevents the end portion 1306e of the wire 1306 from being covered by a second material (eg, a molding compound or other encapsulant 1318).

如上面針對圖20A與20B所述並且如圖22D中所示,囊封劑1318可以被沉積在一模具的內部凹腔裡面或是在該內部凹腔裡面流動,於該凹腔中已經放置該基板以及被附接的焊線並且已經提供一類似於圖20A至20C中所示的膜1102的膜1316。藉由沉積該電線固鎖材料1314於該些電線的一部分周圍來強化與硬化該些電線1306有助於該些電線1306穿入膜1316之中,使得該些電線的移動會少於其它方式可達成的移動。在沉積該囊封劑1318用以覆蓋該些電線1306的一部分之後,膜1316可以被移除,露出該些電線的末端1306e,以便形成微電子組件1302,如在圖22E中所看見。 As described above with respect to Figures 20A and 20B and as shown in Figure 22D, the encapsulant 1318 can be deposited within or within the internal cavity of the mold in which the placement has been placed. The substrate and the attached wire are also provided with a film 1316 similar to the film 1102 shown in Figures 20A-20C. Reinforcing and hardening the wires 1306 by depositing the wire securing material 1314 around a portion of the wires facilitates penetration of the wires 1306 into the film 1316 such that the wires move less than otherwise. The move achieved. After depositing the encapsulant 1318 to cover a portion of the wires 1306, the film 1316 can be removed to expose the ends 1306e of the wires to form the microelectronic assembly 1302, as seen in Figure 22E.

用以形成焊線2632至預設高度的另一種方法顯示在圖39A至C中。於此方法中,一犧牲囊封層2678會被形成在基板2612的表面2614上方,至少在其第二區2620中。該犧牲層2678也會被形成在基板2612的第一區2618上方,以類似於上面針對圖1所述的囊封層的方式來覆蓋微電子元件2622。犧牲層2678包含至少一開口2679,且於某些實施例中,包含複數個開口2679,用以露出導體元件2628。該些開口2679會在藉由蝕刻、鑽鑿、或是類似方法模鑄該犧牲層2678期間或是在模鑄之後被形成。於其中一實施例中,一大型開口2679會被形成用以露出所有導體元件2628;而 於其它實施例中,複數個大型開口2679會被形成用以露出個別的導體元件2628群。於進一步實施例中,開口2679會被形成對應於獨特的導體元件2628。犧牲層2678被形成為有一表面2677位在該些焊線2632所希望的高度處,俾使得該些焊線2632能夠藉由將其基底2634焊接至導體元件2628並且接著拉出該電線抵達犧牲層2678的表面2677而被形成。接著,該些焊線會橫向地被拉出該開口,用以疊置在犧牲層2678的表面2677的一部分上方。該焊接形成器械的毛細管(例如,如圖14中所示的毛細管804)會被移動用以擠壓該電線段使其接觸表面2677,俾使得介於表面2677與該毛細管之間的電線上的壓力會讓該電線在表面2677上切斷,如圖39A中所示。 Another method for forming the bonding wire 2632 to a preset height is shown in Figs. 39A to C. In this method, a sacrificial encapsulation layer 2678 will be formed over the surface 2614 of the substrate 2612, at least in its second region 2620. The sacrificial layer 2678 is also formed over the first region 2618 of the substrate 2612 to cover the microelectronic element 2622 in a manner similar to the encapsulation layer described above with respect to FIG. The sacrificial layer 2678 includes at least one opening 2679 and, in some embodiments, a plurality of openings 2679 for exposing the conductor elements 2628. The openings 2679 may be formed during the molding of the sacrificial layer 2678 by etching, drilling, or the like or after molding. In one embodiment, a large opening 2679 is formed to expose all of the conductor elements 2628; In other embodiments, a plurality of large openings 2679 are formed to expose a plurality of individual conductor elements 2628. In a further embodiment, the opening 2679 will be formed to correspond to a unique conductor element 2628. The sacrificial layer 2678 is formed with a surface 2677 at a desired height of the bonding wires 2632 so that the bonding wires 2632 can be soldered to the conductor element 2628 and then pulled out of the wire to reach the sacrificial layer. The surface 2677 of 2678 is formed. The wire bonds are then pulled laterally out of the opening for stacking over a portion of the surface 2677 of the sacrificial layer 2678. The capillary of the weld-forming instrument (e.g., capillary 804 as shown in Figure 14) is moved to squeeze the wire segment to contact surface 2677, such that it is on the wire between surface 2677 and the capillary. The pressure will cause the wire to be severed on surface 2677, as shown in Figure 39A.

犧牲層2678接著會藉由蝕刻或是另一類似製程而被移除。於一範例中,該犧牲層2678能夠由一可水溶性的塑膠材料來形成,俾使得其能夠藉由曝露於水中而被移除,不會影響在製單元2610"的其它構件。於另一實施例中,犧牲層2678能夠由一可成像的材料(例如,光阻)製成,俾使得其能夠藉由曝露於一光源中而被移除。一部分的犧牲層2678'會殘留在微電子元件2622以及基板2612的表面2614之間,其能夠充當一圍繞焊球2652的底部填充層。在移除犧牲層2678之後,一囊封層2642會被形成在該在製單元上方,用以形成封裝2610。該囊封層2642會類似於上面所述囊封層並且會實質上覆蓋基板2612的表面2614以及微電子元件2622。囊封層2642會進一步支撐與分離該些焊線2632。在圖39C中所示的封裝2610中,該些焊線包含裸露在囊封劑2642之表面2644處並且實質上與其平行延伸的其邊緣表面2637的一部分。於其它實施例中,該些焊線2632與該囊封層2642會被平坦化,用以形成一表面2644,焊線的末端表面會裸露於其上並 且實質上與其齊平。 The sacrificial layer 2678 is then removed by etching or another similar process. In one example, the sacrificial layer 2678 can be formed from a water soluble plastic material such that it can be removed by exposure to water without affecting other components of the unit 2610. In an embodiment, the sacrificial layer 2678 can be made of an imageable material (eg, photoresist) such that it can be removed by exposure to a light source. A portion of the sacrificial layer 2678' remains in the microelectronics. Between element 2622 and surface 2614 of substrate 2612, which can serve as an underfill layer surrounding solder ball 2652. After removal of sacrificial layer 2678, an encapsulation layer 2642 can be formed over the in-process cell for formation The package 2610. The encapsulation layer 2642 will be similar to the encapsulation layer described above and will substantially cover the surface 2614 of the substrate 2612 and the microelectronic element 2622. The encapsulation layer 2642 will further support and separate the bonding wires 2632. In package 2610 shown in 39C, the bond wires comprise a portion of edge surface 2637 that is exposed at surface 2644 of encapsulant 2642 and extends substantially parallel thereto. In other embodiments, the bond wires 2632 and The capsule 2642 is planarized to a surface 2644 is formed, a bonding wire will end surface exposed thereon, and And in fact it is flush with it.

本發明的上述實施例及變化例能夠以上面明確說明以外的方式來結合。本發明希望涵蓋落在本發明的範疇與精神內的所有變化例。 The above-described embodiments and modifications of the present invention can be combined in other ways than those explicitly described above. The invention is intended to cover all modifications that fall within the scope and spirit of the invention.

10‧‧‧微電子組件 10‧‧‧Microelectronic components

12‧‧‧基板 12‧‧‧Substrate

14‧‧‧第一表面 14‧‧‧ first surface

16‧‧‧第二表面 16‧‧‧ second surface

18‧‧‧第一區 18‧‧‧First District

20‧‧‧第二區 20‧‧‧Second District

22‧‧‧微電子元件 22‧‧‧Microelectronic components

24‧‧‧焊線 24‧‧‧welding line

28‧‧‧導體元件 28‧‧‧Conductor components

30‧‧‧觸墊 30‧‧‧ touch pads

32‧‧‧焊線 32‧‧‧welding line

34‧‧‧基底 34‧‧‧Base

36‧‧‧末端 End of 36‧‧‧

37‧‧‧邊緣表面 37‧‧‧Edge surface

38‧‧‧末端表面 38‧‧‧End surface

39‧‧‧未被囊封部分 39‧‧‧Unenclosed part

40‧‧‧第二導體元件 40‧‧‧Second conductor element

41‧‧‧通孔 41‧‧‧through hole

42‧‧‧囊封層 42‧‧‧encapsulated layer

44‧‧‧主要表面 44‧‧‧ main surface

Claims (42)

一種形成被連接至基板的複數條焊線的方法,其包括:(a)定位下面至少其中一者:一焊接治具與一向下延伸超越其一面的電線的一部分;或是,相對於彼此來定位一形成表面,俾使得向下延伸超越該焊接治具之一面的電線部分的一末端被定位成其與該焊接治具面相隔的深度大於與該形成表面相隔的深度;(b)接著沿著該第一形成表面在平行於該焊接治具之該面的第一方向中移動該焊接治具,以便朝該焊接治具彎折該電線部分;(c)接著在橫切於該焊接治具面的第二方向中移動該焊接治具,俾使得延伸遠離該焊接治具面的該焊接治具的一裸露壁面對一延伸遠離該第一形成表面的第二形成表面,藉以朝該焊接治具的該裸露壁彎折讓該電線部分;(d)鑄造介於該焊接治具面與一鑄造表面之間的該電線部分的一部分;(e)利用該焊接治具來焊接該電線部分的該已鑄造部分至該基板的一導電焊接表面,以便形成一焊線,同時讓遠離該已鑄造部分的該電線部分的末端保持未被焊接;以及(f)重複步驟(a)至(e),以便形成複數條該些焊線至該焊接表面中的至少其中一者。 A method of forming a plurality of bond wires connected to a substrate, comprising: (a) positioning at least one of: a soldering fixture and a portion of a wire extending downwardly beyond one side; or, relative to each other Positioning a forming surface such that an end of the wire portion extending downward beyond one of the welding jigs is positioned such that it is spaced apart from the welding jig surface by a depth greater than a depth from the forming surface; (b) The first forming surface moves the welding fixture in a first direction parallel to the face of the welding fixture to bend the wire portion toward the welding fixture; (c) then transversely to the welding Moving the welding fixture in a second direction of the surface, such that a bare wall of the welding fixture extending away from the welding fixture surface faces a second forming surface extending away from the first forming surface, thereby The bare wall of the welding jig bends the wire portion; (d) casting a portion of the wire portion between the welding jig face and a casting surface; (e) welding the wire with the welding jig Part of the cast Portioning a conductive bonding surface to the substrate to form a bonding wire while leaving the end of the wire portion remote from the cast portion unwelded; and (f) repeating steps (a) through (e) to form A plurality of the bonding wires to at least one of the soldering surfaces. 根據申請專利範圍第1項的方法,其中,該鑄造表面包含一溝槽,其深度小於該電線部分的直徑,而且該電線部分的鑄造係被實施用以配合該鑄造表面之該溝槽來鑄造該電線部分的該部分。 The method of claim 1, wherein the casting surface comprises a groove having a depth smaller than a diameter of the wire portion, and the casting of the wire portion is implemented to fit the groove of the casting surface for casting The portion of the wire portion. 根據申請專利範圍第1項的方法,其中,該焊接治具有一毛細管,該電線部分會延伸至該毛細管外面,而且該焊接治具面係該毛細管面。 The method of claim 1, wherein the welding treatment has a capillary tube extending to the outside of the capillary tube, and the welding fixture surface is the capillary surface. 根據申請專利範圍第1項的方法,其中,該焊接治具係一楔焊治具。 The method of claim 1, wherein the welding fixture is a wedge welding fixture. 根據申請專利範圍第1項的方法,其中,該焊接治具與該些形成表面會被組裝至一共同焊接頭。 The method of claim 1, wherein the welding fixture and the forming surfaces are assembled to a common welding head. 根據申請專利範圍第5項的方法,其中,該些第一形成表面與第二形成表面被設置在一形成站處並且至少步驟(b)、(c)會在該形成站處被實施,以及至少步驟(e)會在一焊接站處被實施,其中,該焊接治具被一焊接頭支撐,以及該方法進一步包括在步驟(d)之前先將該焊接頭及受其支撐的焊接治具從該形成站移動至該焊接站。 The method of claim 5, wherein the first forming surface and the second forming surface are disposed at a forming station and at least steps (b), (c) are performed at the forming station, and At least step (e) is carried out at a welding station, wherein the welding fixture is supported by a welding head, and the method further comprises welding the welding head and the welding fixture supported thereby before the step (d) Moving from the forming station to the welding station. 根據申請專利範圍第5項的方法,其中,該鑄造表面被設置在該形成站處,而且步驟(d)會在該形成站處被實施。 The method of claim 5, wherein the casting surface is disposed at the forming station, and step (d) is performed at the forming station. 根據申請專利範圍第1項的方法,其中,該電線部分係一第一電線部分,而且步驟(a)該第一電線部分的延伸係藉由焊接該電線的一第二部分至一第二焊接表面來實施,並且接著移動該焊接治具面至該第二焊接表面所在的平面上方的較大高度處,俾使得,該第一電線部分朝外延伸超越該焊接治具的該面,接著切斷該電線而分離該第一電線部分與該第二電線部分。 The method of claim 1, wherein the wire portion is a first wire portion, and wherein the step (a) the first wire portion extends by welding a second portion of the wire to a second weld The surface is implemented, and then the welding fixture surface is moved to a greater height above the plane in which the second welding surface is located, such that the first wire portion extends outward beyond the face of the welding fixture, and then cut The wire is broken to separate the first wire portion from the second wire portion. 根據申請專利範圍第8項的方法,其中,切斷該電線的步驟包含夾鉗該電線並且拉緊該受夾鉗的電線,以便讓該受夾鉗的電線在介於該些第一電線部分與第二電線部分之間的邊界處斷裂。 The method of claim 8, wherein the step of cutting the wire comprises clamping the wire and tightening the wire of the clamp so that the wire of the clamp is between the first wire portions Breaking at the boundary with the second wire portion. 根據申請專利範圍第8項的方法,其中,切斷該電線包含夾鉗該電線並且拉緊該受夾鉗的電線,以便讓該受夾鉗的電線在一預設的長度處斷裂。 The method of claim 8, wherein cutting the wire comprises clamping the wire and tightening the wire of the clamp to allow the wire of the clamp to break at a predetermined length. 根據申請專利範圍第8項的方法,其中,切斷包含夾鉗且拉緊複數 條電線,以便讓該些受夾鉗的電線在複數個不同的預設長度處斷裂。 According to the method of claim 8, wherein the cutting comprises a clamp and tightening the plurality Wires to allow the clamped wires to break at a plurality of different preset lengths. 根據申請專利範圍第1項的方法,其中,該第二形成表面和該第一形成表面成第一角度傾斜遠離該第一形成表面,而且該裸露的焊接治具壁以該第一角度傾斜遠離該焊接治具面。 The method of claim 1, wherein the second forming surface and the first forming surface are inclined away from the first forming surface at a first angle, and the bare welding fixture wall is inclined away from the first angle The welding fixture surface. 根據申請專利範圍第1項的方法,其中,該第二形成表面為一相對於至少一第三表面為凹陷的通道。 The method of claim 1, wherein the second forming surface is a channel that is recessed relative to the at least one third surface. 根據申請專利範圍第1項的方法,其中,步驟(d)會形成該已鑄造部分,其會在步驟(e)被實施用以焊接該電線部分至該焊接表面時阻止橫向方向中的移動。 The method of claim 1, wherein the step (d) forms the cast portion which is prevented from moving in the lateral direction when the step (e) is performed to weld the wire portion to the soldering surface. 根據申請專利範圍第1項的方法,其中,步驟(d)會形成該已鑄造部分,其會在步驟(e)被實施用以焊接該電線部分至該焊接表面時阻止橫向方向中的滾動。 The method of claim 1, wherein the step (d) forms the cast portion that prevents rolling in the transverse direction when the step (e) is performed to weld the wire portion to the soldering surface. 根據申請專利範圍第14項的方法,其中,該電線部分的該已鑄造部分有一平坦表面,而且步驟(e)會將該已鑄造部分的該平坦表面焊接至該焊接表面。 The method of claim 14, wherein the cast portion of the wire portion has a flat surface, and step (e) welds the flat surface of the cast portion to the weld surface. 根據申請專利範圍第14項的方法,其中,該電線部分的該已鑄造部分有一由隆起特徵元件及凹陷特徵元件組成的經圖樣化面,而且步驟(e)會將該已鑄造部分的該經圖樣化面焊接至該焊接表面。 The method of claim 14, wherein the cast portion of the wire portion has a patterned surface composed of a raised feature and a recessed feature, and step (e) of the cast portion The patterned face is welded to the welded surface. 根據申請專利範圍第3項的方法,其中,該毛細管面有一溝槽,而且該鑄造係配合該溝槽與該毛細管面來鑄造該電線部分的該部分。 The method of claim 3, wherein the capillary face has a groove, and the casting cooperates with the groove and the capillary face to cast the portion of the wire portion. 根據申請專利範圍第18項的方法,其中,該鑄造表面包含一溝槽,其深度小於該電線部分的直徑,而且該電線部分的鑄造係被實施用以配合 該鑄造表面之該溝槽來鑄造該電線部分的該部分。 The method of claim 18, wherein the casting surface comprises a groove having a depth smaller than a diameter of the wire portion, and the casting of the wire portion is implemented to match The groove of the casting surface casts the portion of the wire portion. 根據申請專利範圍第1項的方法,其中,該第一形成表面包括一溝槽,而且步驟(b)包含沿著該溝槽的長度於該第一方向中移動該焊接治具面,俾使得該電線部分的至少一部分會在該溝槽內移動。 The method of claim 1, wherein the first forming surface comprises a groove, and the step (b) comprises moving the welding jig surface in the first direction along a length of the groove, such that At least a portion of the wire portion moves within the groove. 根據申請專利範圍第1項的方法,其進一步包括在步驟(f)之後接著形成一囊封層疊置在該些一或更多個焊接表面上方,其中,該囊封層被形成用以至少部分覆蓋該焊接表面與該些焊線,俾使得每一條焊線的一未被囊封部分係由此焊線的一末端表面或是未被該囊封層覆蓋的此焊線的一邊緣表面中至少其中一者的一部分來定義。 The method of claim 1, further comprising forming an encapsulation layer over the one or more soldering surfaces after step (f), wherein the encapsulating layer is formed to at least partially Covering the soldering surface and the bonding wires such that an unencapsulated portion of each bonding wire is in an end surface of the bonding wire or an edge surface of the bonding wire not covered by the encapsulating layer At least one of the parts is defined. 根據申請專利範圍第1項的方法,其中,該第一形成表面為其中有一開口的一形成元件的一表面,其中,步驟(a)包含定位該焊接治具使得該電線部分至少部分延伸至該開口之中。 The method of claim 1, wherein the first forming surface is a surface of a forming element having an opening therein, wherein the step (a) comprises positioning the welding jig such that the wire portion extends at least partially to the surface In the opening. 根據申請專利範圍第22項的方法,其中,該開口包含一相鄰於該第一形成表面的漸細部分,該漸細部分被配置成用以引導該電線部分朝向該第一形成表面的一預設位置。 The method of claim 22, wherein the opening comprises a tapered portion adjacent to the first forming surface, the tapered portion being configured to guide the wire portion toward the first forming surface Preset location. 根據申請專利範圍第22項的方法,其中,該第一形成表面為其中有一開口的一形成元件的一表面,其中,步驟(a)包含定位該焊接治具使得該電線部分至少部分延伸至該開口之中,而且該開口包含一相鄰於該第一形成表面的漸細部分,該漸細部分被配置成用以引導該電線部分至該溝槽之中。 The method of claim 22, wherein the first forming surface is a surface of a forming element having an opening therein, wherein the step (a) comprises positioning the welding jig such that the wire portion extends at least partially to the surface And wherein the opening includes a tapered portion adjacent to the first forming surface, the tapered portion being configured to guide the wire portion into the groove. 根據申請專利範圍第1項的方法,其中,該第一形成表面為其中有一開口的一形成元件的一表面,其中,步驟(c)包含移動該焊接治具至該開 口之中,俾使得該電線部分至少部分延伸至該開口之中。 The method of claim 1, wherein the first forming surface is a surface of an forming element having an opening therein, wherein the step (c) comprises moving the welding jig to the opening Among the mouths, the wire extends at least partially into the opening. 根據申請專利範圍第25項的方法,其中,該鑄造表面被設置在該開口裡面。 The method of claim 25, wherein the casting surface is disposed inside the opening. 根據申請專利範圍第22項的方法,其中,該開口係一第一開口,而且該形成元件包含一第二開口,其中,步驟(c)包含移動該焊接治具至該第二開口之中,俾使得該電線部分至少部分延伸至該第二開口之中。 The method of claim 22, wherein the opening is a first opening, and the forming element comprises a second opening, wherein the step (c) comprises moving the welding fixture into the second opening, The wire causes the wire portion to extend at least partially into the second opening. 根據申請專利範圍第27項的方法,其中,該鑄造表面被設置在該第二開口裡面。 The method of claim 27, wherein the casting surface is disposed inside the second opening. 根據申請專利範圍第1項的方法,其中,該些焊線中的一第一焊線被調適成用以攜載一第一訊號電位,以及該些焊線中的一第二焊線被調適成用以同步攜載一不同於第一訊號電位的第二訊號電位。 The method of claim 1, wherein a first one of the bonding wires is adapted to carry a first signal potential, and a second one of the bonding wires is adapted The signal is used to synchronously carry a second signal potential different from the first signal potential. 根據申請專利範圍第1項的方法,其中,當步驟(e)被實施用以焊接該鑄造表面至該焊接表面時,該焊接表面會裸露在一基板的一表面處。 The method of claim 1, wherein when the step (e) is performed to weld the casting surface to the soldering surface, the soldering surface is exposed at a surface of a substrate. 根據申請專利範圍第25項的方法,其進一步包括裝設及電互連一微電子元件與該基板,俾使得該微電子元件會與至少一部分該些焊線電互連。 The method of claim 25, further comprising: mounting and electrically interconnecting a microelectronic component with the substrate such that the microelectronic component is electrically interconnected with at least a portion of the bonding wires. 根據申請專利範圍第1項的方法,其中,該些焊線中的至少兩者被焊接至該複數個焊接表面中的單一焊接表面。 The method of claim 1, wherein at least two of the plurality of bonding wires are soldered to a single one of the plurality of bonding surfaces. 一種微電子封裝,其包括:一構件,其具有一表面以及位在該表面處的複數個導體元件;複數條焊線,其具有被接合至該些導體元件的第一末端以及遠離該些第一末端的第二末端,該些焊線的長度介於其個別的第一末端與第二末端之間; 一介電硬化層,其疊置在該些導電元件和該表面上方並且覆蓋每一條焊線的長度的一第一部分;以及一囊封層,其疊置在位於該構件的表面上且比該囊封層還硬之該介電硬化層上方,並且其覆蓋每一條焊線的長度的一第二部分,其中該些焊線的第二末端會在該介電硬化層上且遠離該介電硬化層的該囊封層的一表面處至少部分沒有被該囊封層覆蓋。 A microelectronic package comprising: a member having a surface and a plurality of conductor elements positioned at the surface; a plurality of bonding wires having a first end bonded to the conductor elements and away from the plurality of a second end of one end, the length of the bonding wires being between its individual first end and second end; a dielectric hardened layer superposed over the conductive elements and the surface and covering a first portion of the length of each of the bonding wires; and an encapsulating layer overlying the surface of the member and An encapsulating layer is also hard over the dielectric hardened layer and covering a second portion of the length of each of the bonding wires, wherein the second ends of the bonding wires are on the dielectric hardened layer and away from the dielectric At least a portion of the surface of the encapsulation layer of the hardened layer is not covered by the encapsulation layer. 根據申請專利範圍第33項的微電子封裝,其中,該構件係一基板。 A microelectronic package according to claim 33, wherein the member is a substrate. 根據申請專利範圍第33項的微電子封裝,其進一步包括除了該囊封劑和該介電硬化層之外的隆起的材料區,該隆起的材料區(i)從該構件之表面延伸的一方向上以及在平行於該構件之表面的至少一方向上至少部分鄰接該介電硬化層,並且(ii)至少部分鄰接該構件的表面中該些焊線的第一末端分別與該些導電元件所接合之區域。 A microelectronic package according to claim 33, further comprising a raised material region other than the encapsulant and the dielectric hardened layer, the raised material region (i) extending from a surface of the member At least partially adjoining the dielectric hardened layer upwardly and at least in a direction parallel to a surface of the member, and (ii) at least partially abutting the surface of the member, the first ends of the bonding wires are respectively bonded to the conductive elements The area. 根據申請專利範圍第33項的微電子封裝,其中,該介電硬化層會覆蓋該些焊線之長度的至少10%。 The microelectronic package of claim 33, wherein the dielectric hard layer covers at least 10% of the length of the bonding wires. 根據申請專利範圍第33項的微電子封裝,其中,該介電硬化層會覆蓋該些焊線之長度的至少50微米。 The microelectronic package of claim 33, wherein the dielectric hardened layer covers at least 50 microns of the length of the bonding wires. 根據申請專利範圍第33項的微電子封裝,其中,該些焊線的每一條會被拼焊至該些導體元件中的一者。 A microelectronic package according to claim 33, wherein each of the bonding wires is tailor welded to one of the conductor elements. 根據申請專利範圍第33項的微電子封裝,其中,該些焊線上會有焊接治具標記,其相鄰於該些焊線的第二末端。 The microelectronic package of claim 33, wherein the soldering wires have soldering fixture marks adjacent to the second ends of the bonding wires. 根據申請專利範圍第39項的微電子封裝,其中,該些焊線在相鄰於該些焊線之第二末端的至少其中一個方向中為漸細。 The microelectronic package of claim 39, wherein the bonding wires are tapered in at least one of the directions adjacent to the second ends of the bonding wires. 根據申請專利範圍第39項的微電子封裝,其中,該焊接治具標記係一球形區。 The microelectronic package of claim 39, wherein the welding fixture is labeled as a spherical region. 根據申請專利範圍第33項的微電子封裝,其中,該些焊線的第二末端以和該囊封層之表面所定義的一平面成65至90度的角度突出遠離該囊封層。 The microelectronic package of claim 33, wherein the second ends of the bonding wires protrude away from the encapsulation layer at an angle of 65 to 90 degrees from a plane defined by the surface of the encapsulation layer.
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