TWI568166B - A High Efficiency LLC Resonant Converter with Secondary Side Synchronous Rectifier Blind Control - Google Patents

A High Efficiency LLC Resonant Converter with Secondary Side Synchronous Rectifier Blind Control Download PDF

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TWI568166B
TWI568166B TW104139518A TW104139518A TWI568166B TW I568166 B TWI568166 B TW I568166B TW 104139518 A TW104139518 A TW 104139518A TW 104139518 A TW104139518 A TW 104139518A TW I568166 B TWI568166 B TW I568166B
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driving signal
resonant
circuit
voltage
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TW201720036A (en
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Shun-Zhong Wang
Yi-Hua Liu
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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一種二次側同步整流器盲時調控之高效率LLC共振式轉換器High-efficiency LLC resonant converter for blind-time regulation of secondary side synchronous rectifier

本發明係有關於LLC共振式轉換器,特別是關於一種二次側同步整流器盲時調控之高效率LLC共振式轉換器。The present invention relates to LLC resonant converters, and more particularly to a high efficiency LLC resonant converter for blind time regulation of a secondary side synchronous rectifier.

現今切換式電源供應器已廣泛應用於不同電器設備中。為了滿足高效率、輕薄短小、高功率密度(High Power Density)等要求,對直流-直流轉換器而言,提高切換頻率可以達到高功率密度的優點,但為了減少硬性切換(Hard Switching)造成的切換損失來提高轉換器整機效率,通常會使用柔性切換(Soft Switching)技術,其優點在於可降低功率開關切換時因開關上跨壓與電流的乘積造成的切換損失,達到零電壓切換(Zero Voltage Switching, ZVS)或零電流切換(Zero Current Switching, ZCS)之目的,進而提升電源轉換器的效率。Today's switching power supplies have been widely used in different electrical equipment. In order to meet the requirements of high efficiency, light and short, high power density (High Power Density), for DC-DC converters, the switching frequency can be increased to achieve high power density, but to reduce hard switching (Hard Switching) Switching losses to improve the overall efficiency of the converter, usually using Soft Switching technology, has the advantage of reducing the switching loss caused by the product of the voltage across the switch and the current when switching the power switch, achieving zero voltage switching (Zero Voltage Switching, ZVS) or Zero Current Switching (ZCS), which improves the efficiency of the power converter.

串聯諧振轉換器(Series Resonant Converter, SRC)擁有切換頻率高與零電壓切換等特性,而當串聯諧振轉換器操作於不同操作區間時,則會有不同電路特性而衍生出LLC諧振轉換器,由於LLC諧振轉換器具有電路架構簡單、寬範圍輸入電壓、高功率密度與高效率等優點,因此LLC諧振轉換器目前已被大量應用於液晶電視與個人電腦之電源等場合。另一方面,由於數位式電源可以透過數位控制介面進行控制設計,更可精準地進行電源管理與監控,數位式電源相較於類比式電源最大的差別在於回授的設計,類比式電源是用傳統類比電路進行回授控制,需額外使用處理器進行監控;數位式電源具備可程式化且不易受溫度影響,同時功能整合度上也較類比式來得高,因此數位式電源被視為電源設計的重要發展趨勢,在市場上對數位式電源的需求也日益增加。The Series Resonant Converter (SRC) has the characteristics of high switching frequency and zero voltage switching. When the series resonant converter operates in different operating ranges, it will have different circuit characteristics and derive the LLC resonant converter. LLC resonant converter has the advantages of simple circuit structure, wide input voltage, high power density and high efficiency. Therefore, LLC resonant converter has been widely used in power supplies such as LCD TVs and personal computers. On the other hand, because the digital power supply can be controlled by the digital control interface, the power management and monitoring can be accurately performed. The biggest difference between the digital power supply and the analog power supply is the feedback design. The analog power supply is used. The traditional analog circuit is controlled by feedback, and the processor needs to be additionally monitored. The digital power supply is programmable and not susceptible to temperature, and the function integration is higher than the analogy. Therefore, the digital power supply is regarded as the power supply design. An important development trend is the increasing demand for digital power supplies in the market.

過去有許多文獻探討有關LLC諧振轉換器的基本架構並分析其動作原理,在效率方面,為了提升整體電源轉換器之效率,有文獻提出同步整流技術應用於LLC諧振轉換器中,並以不同的驅動方式改善LLC諧振轉換器之效率。也有文獻提出以穩態分析描述同步整流,能降低輸出整流的損耗並以電壓箝位驅動電路控制一、二次側開關,最後實作同步整流LLC諧振轉換器並與非同步LLC諧振轉換器進行效率比較,結果為同步整流效率確實優於非同步。隨著半導體科技與微處理器技術的進步,數位化電源可透過數位控制介面進行控制與設計,許多文獻提出不同數位控制策略來驅動LLC諧振轉換器,有的針對LLC諧振轉換器之控制方法進行說明,另外有文獻針對微處理器PID控制設計部分對效率的影響進行探討。LLC諧振轉換器亦廣泛用於電腦電源、LCD電源與車用充電機,有文獻設計並實現一數位控制LLC諧振轉換器作為充電機之應用,並詳細介紹LLC諧振轉換器的模式分析與其控制策略。In the past, there have been many literatures discussing the basic architecture of LLC resonant converters and analyzing their operating principles. In terms of efficiency, in order to improve the efficiency of the overall power converter, it is proposed in the literature that synchronous rectification technology is applied to LLC resonant converters, and different The driving method improves the efficiency of the LLC resonant converter. It has also been proposed in the literature to describe synchronous rectification by steady-state analysis, which can reduce the loss of output rectification and control the primary and secondary side switches with a voltage clamp drive circuit. Finally, the synchronous rectification LLC resonant converter is implemented and operated with an asynchronous LLC resonant converter. The efficiency comparison shows that the synchronous rectification efficiency is indeed better than the non-synchronization. With the advancement of semiconductor technology and microprocessor technology, digital power supply can be controlled and designed through digital control interface. Many literatures propose different digital control strategies to drive LLC resonant converters, and some control methods for LLC resonant converters. Explain that another paper discusses the impact of the microprocessor design part of the microprocessor on efficiency. LLC resonant converter is also widely used in computer power supply, LCD power supply and vehicle charger. It has been designed and implemented as a digital control LLC resonant converter as a charger. It also introduces the mode analysis and control strategy of LLC resonant converter. .

本發明之主要目的在於提出一種二次側同步整流器盲時調控之高效率LLC共振式轉換器,其可藉由調整二次側的盲時區間以提升電源轉換效率。The main object of the present invention is to provide a high-efficiency LLC resonant converter for blind-time regulation of a secondary-side synchronous rectifier, which can improve the power conversion efficiency by adjusting the blind time interval of the secondary side.

為達到上述目的,一種二次側同步整流器盲時調控之高效率LLC共振式轉換器乃被提出,其具有:In order to achieve the above object, a high-efficiency LLC resonant converter for blind-time regulation of a secondary side synchronous rectifier is proposed, which has:

一第一半橋開關電路,具有二輸入端以與一輸入電壓之正、負端耦接、二控制端以分別與一第一驅動信號及一第二驅動信號耦接、以及一輸出端以在該第一驅動信號呈現一作用電位時與該正端耦接及該第二驅動信號呈現一作用電位時與該負端耦接;a first half bridge switching circuit having two input ends coupled to the positive and negative terminals of an input voltage, two control terminals coupled to a first driving signal and a second driving signal, and an output terminal When the first driving signal is coupled to the positive terminal and the second driving signal exhibits an active potential, the first driving signal is coupled to the negative terminal;

一電容-電感串聯電路,其一端係與該第一半橋開關電路之所述輸出端耦接;a capacitor-inductor series circuit having one end coupled to the output end of the first half bridge switch circuit;

一變壓器,具有一主線圈及一次級線圈,該主線圈之一端係與該電容-電感串聯電路之另一端耦接,該主線圈之另一端係與該輸入電壓之所述負端耦接,該次級線圈具有一第一輸出端、一第二輸出端、及一中心抽頭接點;a transformer having a main coil and a primary coil, one end of the main coil being coupled to the other end of the capacitor-inductor series circuit, the other end of the main coil being coupled to the negative terminal of the input voltage, The secondary coil has a first output end, a second output end, and a center tap contact;

一第二半橋開關電路,具有二輸入端以與該第一輸出端及該第二輸出端耦接、二控制端以分別與一第三驅動信號及一第四驅動信號耦接、以及一輸出端以在該第三驅動信號呈現一作用電位時與該第一輸出端耦接及該第四驅動信號呈現一作用電位時與該第二輸出端耦接;a second half-bridge switching circuit having two input ends coupled to the first output end and the second output end, and two control ends coupled to a third driving signal and a fourth driving signal, respectively The output end is coupled to the second output end when the third driving signal is coupled to the first output terminal when the third driving signal exhibits an active potential; and the fourth driving signal exhibits an active potential;

一輸出電容,耦接於該第二半橋開關電路之所述輸出端與該中心抽頭接點之間;An output capacitor coupled between the output end of the second half bridge switch circuit and the center tap contact;

一負載電阻,耦接於該第二半橋開關電路之所述輸出端與該中心抽頭接點之間;a load resistor coupled between the output end of the second half bridge switch circuit and the center tap contact;

一回授電路,用以依該負載電阻之一跨壓產生一回授信號;以及a feedback circuit for generating a feedback signal according to one of the load resistors; and

一控制單元,用以依該回授信號執行一驅動信號產生程序以產生該第一驅動信號、該第二驅動信號、該第三驅動信號、以及該第四驅動信號,其中,該第一驅動信號和該第二驅動信號之間有一固定的盲時區間,該第三驅動信號相對於該第一驅動信號有一延遲導通時間及一提前截止時間,該第四驅動信號相對於該第二驅動信號有該延遲導通時間及該提前截止時間,且該驅動信號產生程序包括一比例-積分-微分運算以調整該延遲導通時間及該提前截止時間。a control unit configured to perform a driving signal generating program to generate the first driving signal, the second driving signal, the third driving signal, and the fourth driving signal according to the feedback signal, wherein the first driving There is a fixed blind time interval between the signal and the second driving signal, the third driving signal has a delayed on-time and an early cut-off time with respect to the first driving signal, and the fourth driving signal is opposite to the second driving signal. The delay on-time and the advance-off time are available, and the drive signal generation program includes a proportional-integral-derivative operation to adjust the delay on-time and the advance-off time.

在一實施例中,該回授電路包含一分壓電路及一光耦合電路。In an embodiment, the feedback circuit includes a voltage dividing circuit and an optical coupling circuit.

在一實施例中,該驅動信號產生程序包含一類比至數位轉換運算。In one embodiment, the drive signal generation program includes an analog to digital conversion operation.

在一實施例中,該驅動信號產生程序進一步包含一濾波運算。In an embodiment, the drive signal generating program further includes a filtering operation.

在一實施例中,該控制單元包含一脈波寬度調變模組以提供該第一驅動信號、該第二驅動信號、該第三驅動信號、以及該第四驅動信號。In one embodiment, the control unit includes a pulse width modulation module to provide the first driving signal, the second driving signal, the third driving signal, and the fourth driving signal.

請參照圖1,其繪示本發明之二次側同步整流器盲時調控之高效率LLC共振式轉換器之一實施例。如圖1所示,該LLC共振式轉換器具有一第一半橋開關電路100、一電容-電感串聯電路110、一變壓器120、一第二半橋開關電路130、一輸出電容140、一負載電阻150、一回授電路160、以及一控制單元170。Referring to FIG. 1, an embodiment of a high efficiency LLC resonant converter for blind time regulation of a secondary side synchronous rectifier of the present invention is illustrated. As shown in FIG. 1 , the LLC resonant converter has a first half bridge switching circuit 100 , a capacitor-inductor series circuit 110 , a transformer 120 , a second half bridge switching circuit 130 , an output capacitor 140 , and a load resistor . 150, a feedback circuit 160, and a control unit 170.

第一半橋開關電路100具有二輸入端A、B以與一輸入電壓V IN之正、負端耦接、二控制端以分別與一第一驅動信號S 1及一第二驅動信號S 2耦接、以及一輸出端C以在該第一驅動信號S 1呈現一作用電位時與該正端耦接及該第二驅動信號S 2呈現一作用電位時與該負端耦接。 The first half bridge switching circuit 100 has two input terminals A, B coupled to the positive and negative terminals of an input voltage V IN , and two control terminals respectively coupled to a first driving signal S 1 and a second driving signal S 2 . The output terminal C is coupled to the negative terminal when the first driving signal S 1 is coupled to the positive terminal and the second driving signal S 2 exhibits an active potential.

電容-電感串聯電路110之一端係與該第一半橋開關電路100之所述輸出端C耦接。One end of the capacitor-inductor series circuit 110 is coupled to the output terminal C of the first half bridge switch circuit 100.

變壓器120具有一主線圈及一次級線圈,該主線圈之一端係與該電容-電感串聯電路110之另一端耦接,該主線圈之另一端係與該輸入電壓V IN之所述負端耦接,該次級線圈具有一第一輸出端D、一第二輸出端E、及一中心抽頭接點F。 The transformer 120 has a main coil and a primary coil. One end of the main coil is coupled to the other end of the capacitor-inductor series circuit 110. The other end of the main coil is coupled to the negative terminal of the input voltage V IN . The secondary coil has a first output terminal D, a second output terminal E, and a center tap contact F.

第二半橋開關電路130具有二輸入端以與該第一輸出端D及該第二輸出端E耦接、二控制端以分別與一第三驅動信號S 3及一第四驅動信號S 4耦接、以及一輸出端O以在該第三驅動信號S 3呈現一作用電位時與該第一輸出端D耦接及該第四驅動信號S 4呈現一作用電位時與該第二輸出端E耦接。 The second half-bridge switching circuit 130 has two input ends for coupling with the first output terminal D and the second output terminal E, and two control terminals respectively for a third driving signal S 3 and a fourth driving signal S 4 . And the output terminal O is coupled to the first output terminal D when the third driving signal S 3 exhibits an active potential, and the fourth driving signal S 4 exhibits an active potential and the second output terminal E coupled.

輸出電容140係耦接於該第二半橋開關電路130之所述輸出端O與該中心抽頭接點F之間。The output capacitor 140 is coupled between the output terminal O of the second half bridge switch circuit 130 and the center tap contact F.

負載電阻150係耦接於該第二半橋開關電路之所述輸出端O與該中心抽頭接點F之間。The load resistor 150 is coupled between the output terminal O of the second half bridge switch circuit and the center tap contact F.

回授電路160,包含一分壓電路161及一光耦合電路162,係用以依該負載電阻150之一跨壓V O產生一回授信號V FBThe feedback circuit 160 includes a voltage dividing circuit 161 and an optical coupling circuit 162 for generating a feedback signal V FB according to one of the load resistors 150 across the voltage V O .

控制單元170儲存有一韌體程式,係用以依該回授信號V FB執行一驅動信號產生程序以產生該第一驅動信號S 1、該第二驅動信號S 2、該第三驅動信號S 3、以及該第四驅動信號S 4,其中,該第一驅動信號S 1和該第二驅動信號S 2之間有一固定的盲時區間,該第三驅動信號S 3相對於該第一驅動信號S 1有一延遲導通時間及一提前截止時間,該第四驅動信號S 4相對於該第二驅動信號S 2有該延遲導通時間及該提前截止時間,且該驅動信號產生程序包括一比例-積分-微分運算以調整該延遲導通時間及該提前截止時間。也就是說,該第三驅動信號S 3的高電位期間係在該第一驅動信號S 1的高電位期間之內被適應性地調整且該第四驅動信號S 4的高電位期間係在該第二驅動信號S 2的高電位期間之內被適應性地調整。 The control unit 170 stores a firmware program for executing a driving signal generating program according to the feedback signal V FB to generate the first driving signal S 1 , the second driving signal S 2 , and the third driving signal S 3 . And the fourth driving signal S 4 , wherein the first driving signal S 1 and the second driving signal S 2 have a fixed blind time interval, and the third driving signal S 3 is opposite to the first driving signal. S 1 has a delay on-time and an early cut-off time, the fourth driving signal S 4 with respect to the second driving signal S 2 has the delay turn-on time and the early cut-off time, and the drive signal generator comprises a proportional - integral a differential operation to adjust the delayed on-time and the advance-off time. That is, the high potential period of the third driving signal S 3 is adaptively adjusted within the high potential period of the first driving signal S 1 and the high potential period of the fourth driving signal S 4 is in the The second drive signal S 2 is adaptively adjusted within the high potential period.

控制單元170包含一類比至數位轉換單元171、一濾波運算單元172、一比例-積分-微分運算單元173、一脈衝寬度調變運算單元174、以及一驅動單元175。The control unit 170 includes an analog-to-digital conversion unit 171, a filter operation unit 172, a proportional-integral-derivative operation unit 173, a pulse width modulation operation unit 174, and a drive unit 175.

類比至數位轉換單元171係用以對回授信號V FB執行一類比至數位轉換運算;濾波運算單元172係用以對類比至數位轉換單元171之輸出執行一濾波運算;比例-積分-微分運算單元173係用以調整延遲導通時間及該提前截止時間以經由脈衝寬度調變運算單元174及驅動單元175提供該第一控制信號S 1、該第二控制信號S 2、該第三控制信號S 3、以及該第四控制信號S 4The analog to digital conversion unit 171 is configured to perform an analog-to-digital conversion operation on the feedback signal V FB ; the filtering operation unit 172 is configured to perform a filtering operation on the output of the analog to digital conversion unit 171; proportional-integral-derivative operation The unit 173 is configured to adjust the delayed on-time and the advance-off time to provide the first control signal S 1 , the second control signal S 2 , and the third control signal S via the pulse width modulation operation unit 174 and the driving unit 175 . 3 and the fourth control signal S 4 .

依此,本發明即可在低電壓大電流之應用中大幅提升電源轉換效率。Accordingly, the present invention can greatly improve power conversion efficiency in applications of low voltage and high current.

以下將對本發明的原理做詳細說明。The principle of the invention will be described in detail below.

LLC諧振轉換器架構LLC resonant converter architecture

圖2所示為在二次側採用二極體之LLC諧振轉換器之架構,電路架構中諧振槽由諧振電感L r、諧振電容C r與激磁電感L m所組成,其中諧振電感和諧振電容之組合會產生較高的諧振頻率,而激磁電感、諧振電感與諧振電容之組合則會產生較低的諧振頻率。 Figure 2 shows the architecture of a LLC resonant converter with a diode on the secondary side. In the circuit architecture, the resonant tank consists of a resonant inductor L r , a resonant capacitor C r and a magnetizing inductor L m , where the resonant inductor and the resonant capacitor The combination produces a higher resonant frequency, and the combination of the magnetizing inductance, resonant inductor and resonant capacitor produces a lower resonant frequency.

基本波近似法頻率響應分析Fundamental wave approximation frequency response analysis

為了探討LLC串聯諧振轉換電路並簡化分析,以下採用基本波近似法(First harmonic approximation, FHA)並將圖2之非線性電路轉換成圖3之線性雙埠模型進行分析,以便於了解其電路之頻率響應。In order to explore the LLC series resonant converter circuit and simplify the analysis, the following uses the basic harmonic approximation (FHA) and converts the nonlinear circuit of Fig. 2 into the linear bifurcation model of Fig. 3 for analysis to understand its circuit. Frequency response.

電路圖中各參數方程式與其推導過程如下:The equations of each parameter in the circuit diagram and its derivation process are as follows:

輸入到諧振槽的電壓:The voltage input to the resonant tank:

由傅立葉級數分析Fourier series analysis

(1) (1)

其中 among them , ,

,則 If ,then

(2) (2)

其中 為系統切換頻率。 among them Switch the frequency for the system.

輸入至諧振槽的電壓基本波瞬時值、有效值及平均值:The fundamental wave instantaneous value, effective value and average value of the voltage input to the resonant tank:

(3) (3)

(4) (4)

(5) (5)

輸入至諧振槽的電流基本波瞬時值、有效值及平均值:The fundamental wave instantaneous value, effective value and average value of the current input to the resonant tank:

(6) (6)

(7) (7)

(8) (8)

其中 為諧振網路輸入之電壓與電流相角差。 among them The phase difference between the voltage and current input to the resonant network.

諧振槽輸出電壓:Resonant tank output voltage:

(9) (9)

其中 為諧振網路輸出之電壓與電流相角差。 among them The voltage and current phase angle difference for the resonant network output.

諧振槽輸出電壓的基本波瞬時值、有效值及平均值:The fundamental wave instantaneous value, effective value and average value of the output voltage of the resonant tank:

(10) (10)

(11) (11)

(12) (12)

諧振槽輸出電流的基本波瞬時值、有效值及平均值:The fundamental wave instantaneous value, effective value and average value of the output current of the resonant tank:

(13) (13)

(14) (14)

(15) (15)

其中 為輸出功率, 為輸出負載。 among them For output power, For the output load.

圖4為圖2之LLC諧振槽之等效電路圖,其包括由二次側反射至一次側的等效電阻。假設二次側繞組電壓未包含諧波成分,則可得其交流等效電阻 為: 4 is an equivalent circuit diagram of the LLC resonant tank of FIG. 2, including an equivalent resistance reflected from the secondary side to the primary side. Assuming that the secondary winding voltage does not contain harmonic components, the AC equivalent resistance can be obtained. for:

(16) (16)

(17) (17)

轉移函數 及輸入阻抗 Transfer function Input impedance :

(18) (18)

(19) (19)

代入上述方程式,可求得電路之電壓增益與諧振槽輸入阻抗。Substituting the above equation, the voltage gain of the circuit and the input impedance of the resonant tank can be obtained.

(20) (20)

(21) (twenty one)

其中各參數定義如下:The parameters are defined as follows:

第一諧振頻率: First resonant frequency:

特性阻抗: Characteristic impedance:

諧振電感比: Resonant inductance ratio:

正規化頻率: Normalized frequency:

品質因數: Quality factor:

圖5為LLC諧振電路在不同Q值下的電壓增益與正規化頻率響應圖。由圖中可觀察出LLC諧振電路具有兩個諧振頻率,這兩個諧振頻率如下:Figure 5 is a graph showing the voltage gain and normalized frequency response of the LLC resonant circuit at different Q values. It can be observed from the figure that the LLC resonant circuit has two resonant frequencies, which are as follows:

其中 among them

如圖5所示,當電路操作頻率在區域1或區域2內,開關導通時都具零電壓切換特性;而區域3是由第一諧振頻率和第二諧振頻率所區分開之區域,若操作在此區內,開關截止時具有零電流切換特性。以下將分別介紹操作於區域1、區域2與區域3之電路特性。As shown in FIG. 5, when the circuit operating frequency is in the region 1 or the region 2, the switch has a zero voltage switching characteristic when turned on; and the region 3 is a region separated by the first resonant frequency and the second resonant frequency, if the operation is performed. In this zone, the switch has a zero current switching characteristic when it is turned off. The circuit characteristics of the operation of the area 1, the area 2, and the area 3 will be separately described below.

當電路開關切換頻率大於第一諧振頻率 時,此時轉換器操作於區域1,在此區域因變壓器皆有能量在傳遞使得輸出電壓經變壓器映射回一次側箝制住激磁電感L m,因此L m在此操作區域無法參與諧振,諧振頻率由諧振電感L r與諧振電容C r所決定;而半橋串聯諧振轉換器的操作模式類似串聯諧振轉換器。當切換頻率改變時諧振槽的阻抗也隨之改變,映射回一次側的等效負載與諧振電感L r和諧振電容C r串聯,所以從輸出映射回變壓器一次側之等效負載上的電壓與諧振槽輸入電壓為分壓關係,因此當轉換器操作在區域1且開關切換頻率等於第一諧振頻率時,諧振槽能提供的最大電壓增益為1。在此區間諧振槽的輸入電流落後輸入電壓,輸入阻抗呈電感性。 When the circuit switching frequency is greater than the first resonant frequency At this time, the converter operates in the region 1, in which the energy is transmitted in the transformer, so that the output voltage is mapped back to the primary side to clamp the magnetizing inductance L m through the transformer, so L m cannot participate in the resonance in the operating region, and the resonant frequency The resonant inductor L r is determined by the resonant capacitor C r ; and the half-bridge series resonant converter operates in a mode similar to a series resonant converter. When the switching frequency changes, the impedance of the resonant tank also changes. The equivalent load mapped back to the primary side is connected in series with the resonant inductor L r and the resonant capacitor C r , so the voltage from the output is mapped back to the equivalent load on the primary side of the transformer. The input voltage of the resonant tank is in a divided voltage relationship, so when the converter operates in the region 1 and the switching frequency is equal to the first resonant frequency, the maximum voltage gain that the resonant tank can provide is one. In this interval, the input current of the resonant tank is behind the input voltage, and the input impedance is inductive.

當電路開關切換頻率介於第一諧振頻率和第二諧振頻率 之間時,此時轉換器操作於區域2 在此區間由於功率開關截止前,諧振電感電流等於激磁電感電流使變壓器有解耦之情況,二次側整流二極體也因沒有電流流過而達到零電流截止,而輸出電壓不再對激磁電感L m箝制,使L m參與諧振,諧振頻率將由諧振電容C r、諧振電感L r、激磁電感L m所決定。在此區域電壓增益大於1,且能以小的頻率變動使電壓增益產生大的變化。 When the circuit switching frequency is between the first resonant frequency and the second resonant frequency At this time, the converter operates in the region 2 , in which the resonant inductor current is equal to the magnetizing inductor current to decouple the transformer before the power switch is turned off, and the secondary side rectifying diode also has no current flowing. The zero current cutoff is reached, and the output voltage is no longer clamped to the magnetizing inductance L m , so that L m participates in the resonance, and the resonant frequency will be determined by the resonant capacitor C r , the resonant inductor L r , and the magnetizing inductance L m . In this region, the voltage gain is greater than 1, and the voltage gain can be greatly changed with a small frequency variation.

當開關切換頻率小於第二諧振頻率 時,轉換器操作於區域3,在此區間內,諧振槽的輸入電流領先輸入電壓,輸入阻抗呈電容性。 When the switching frequency is lower than the second resonant frequency The converter operates in zone 3, in which the input current of the resonant tank leads the input voltage and the input impedance is capacitive.

一般而言,半橋式諧振轉換器操作在區域1或區域2時即可達到電路上下橋的切換開關具有零電壓切換的優點,此特性對輸入高電壓低電流的應用架構較有優勢。在此本案將半橋式諧振轉換器工作於區域1的狀況稱為SRC,而工作於區域2則稱為LLC-SRC,接下來將介紹SRC與LLC-SRC各階段的電路動作原理。In general, when the half-bridge resonant converter operates in the area 1 or the area 2, the switching switch of the upper and lower bridges of the circuit has the advantage of zero voltage switching, and this characteristic has an advantage in the application architecture of inputting high voltage and low current. In this case, the condition that the half-bridge resonant converter operates in the region 1 is called SRC, and the operation in the region 2 is called LLC-SRC. Next, the circuit operation principle of each stage of the SRC and the LLC-SRC will be introduced.

電路操作模式分析Circuit operation mode analysis

3.1 SRC電路操作模式分析(區域1)3.1 SRC circuit operation mode analysis (Zone 1)

SRC為LLC諧振轉換器操作於第一區間之狀態,圖6標示圖2之LLC諧振轉換器之主要電流、電壓信號,其中I Lr為諧振電感電流、I Lm為激磁電感電流、V Cr為諧振電容電壓、V Lm為激磁電感電壓。圖7為SRC的動作時序圖,其中,一個切換週期內共可區分為十個階段。由於t 0到t 5電路動作與t 5到t 10類似,因此本案將僅分析t 0到t 5電路動作,以下將針對各個模式做分析與說明: SRC is the state in which the LLC resonant converter operates in the first interval. Figure 6 shows the main current and voltage signals of the LLC resonant converter of Figure 2, where I Lr is the resonant inductor current, I Lm is the magnetizing inductor current, and V Cr is the resonance. The capacitor voltage and V Lm are the magnetizing inductance voltage. FIG. 7 is an operation timing chart of the SRC, in which a total of ten stages can be divided in one switching period. Since the t 0 to t 5 circuit action is similar to t 5 to t 10 , this case will only analyze the t 0 to t 5 circuit actions. The following will analyze and explain each mode:

SRC-模式1 ( ): SRC-Mode 1 ( ):

其中,上橋開關(由S 1驅動)於t 0時導通,下橋開關(由S 2驅動)為截止的狀態,諧振電感電流I Lr因維持續流特性由D B1路徑改往上橋開關本身流往V in,此時能量經由變壓器、二次側整流二極體D 1傳至負載端並對輸出電容充電,激磁電感L m上的電壓因被輸出電壓映射回一次側箝制住L m形成動態短路,因此激磁電感電壓V Lm= nV out且激磁電感電流I Lm線性上升。當諧振電感電流I Lr上升至零時,結束此模式。圖8與9分別為SRC-模式1的導通路徑與等效電路圖。 Wherein, the upper bridge switch (driven by S 1 ) is turned on at t 0 , the lower bridge switch (driven by S 2 ) is turned off, and the resonant inductor current I Lr is changed from the D B1 path to the upper bridge switch due to the continuous flow characteristic of the dimension. itself flow to V in, this time the energy via a transformer, the secondary side rectifier diode D 1 is transmitted to the load terminal and the output capacitor is charged, the voltage across the magnetizing inductance L m is mapped back by the output voltage of a primary side immobilized by L m A dynamic short circuit is formed, so the magnetizing inductance voltage V Lm = nV out and the exciting inductor current I Lm rise linearly. This mode ends when the resonant inductor current I Lr rises to zero. 8 and 9 are conduction paths and equivalent circuit diagrams of SRC-mode 1, respectively.

由圖9之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: The resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained from the equivalent circuit of FIG. 9, and the relationship is derived as follows:

(22) (twenty two)

(23) (twenty three)

將式(22)與(23)取反拉式轉換可得:The inverse pull conversion of equations (22) and (23) can be obtained:

(24) (twenty four)

(25) (25)

其中among them

特性阻抗 諧振頻率。 Characteristic impedance , resonant frequency.

SRC-模式2 ( ): SRC-Mode 2 ( ):

模式2於t 1開始,上橋開關維持在導通的狀態,下橋開關依然維持在截止的狀態,諧振電感電流I Lr開始換向,能量經由諧振槽、變壓器傳至二次側整流二極體D 1再送至負載端,激磁電感L m上的電壓因被輸出電壓映射回一次側箝制住L m形成動態短路,此時激磁電感電壓V Lm= nV out且激磁電感電流I Lm依然維持負的線性上升狀態。當激磁電感電流I Lm上升至零時,則進入下一模式。圖10與11分別為SRC-模式2的導通路徑與等效電路圖。 Mode 2 starts at t 1 , the upper bridge switch remains in the on state, the lower bridge switch remains in the off state, the resonant inductor current I Lr begins to commutate, and the energy is transmitted to the secondary side rectifying diode via the resonant tank and the transformer. D 1 and then to the load terminal, the voltage across the magnetizing inductance L m is the output voltage due to a back side of the mapping L m immobilized by a short circuit to form a dynamic, then the magnetizing inductance voltage V Lm = nV out the magnetizing inductor current I Lm and still maintain negative Linear rise state. When the magnetizing inductor current I Lm rises to zero, it proceeds to the next mode. 10 and 11 are conduction paths and equivalent circuit diagrams of SRC-mode 2, respectively.

由圖11之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: From the equivalent circuit of Fig. 11, the resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained, and the relationship is derived as follows:

(26) (26)

(27) (27)

將式(26)與(27)取反拉式轉換可得:The inverse pull conversion of equations (26) and (27) can be obtained:

(28) (28)

(29) (29)

其中among them

特性阻抗 諧振頻率。 Characteristic impedance , resonant frequency.

SRC-模式3 ( ): SRC-Mode 3 ( ):

模式3於t 2開始,上橋開關依然維持導通,下橋開關依然維持截止的狀態,諧振電流達到最大值後便開始下降,能量經由諧振槽、變壓器傳至二次側整流二極體再送至負載端,激磁電感L m上的電壓因被輸出電壓映射回一次側箝制形成動態短路,此時激磁電感電壓V Lm= nV out且激磁電感電流I Lm依然維持線性上升狀態。當上橋開關於t 3截止時,則進入下一模式。圖12與13分別為SRC-模式3的導通路徑與等效電路圖。 Mode 3 starts at t 2 , the upper bridge switch remains on, the lower bridge switch remains in the off state, and the resonant current begins to fall after reaching the maximum value. The energy is transmitted to the secondary side rectifying diode via the resonant tank and the transformer and then sent to At the load end, the voltage on the magnetizing inductance L m is dynamically short-circuited by being mapped back to the primary side by the output voltage. At this time, the magnetizing inductance voltage V Lm = nV out and the exciting inductor current I Lm maintains a linear rising state. When the upper bridge switch is turned off at t 3 , it enters the next mode. 12 and 13 are conduction paths and equivalent circuit diagrams of SRC-mode 3, respectively.

由圖13之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: The resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained from the equivalent circuit of Fig. 13, and the relationship is derived as follows:

(30) (30)

(31) (31)

將式(30)與(31)取反拉式轉換可得:The inverse pull conversion of equations (30) and (31) can be obtained:

(32) (32)

(33) (33)

其中among them

特性阻抗 諧振頻率。 Characteristic impedance , resonant frequency.

SRC-模式4 ( ) SRC-mode 4 ( )

在模式4中,上橋開關於t 3時截止,下橋開關依然維持截止狀態,諧振電感電流I Lr為維持續流特性,當上、下橋開關都截止的時候,電源V in會對上橋開關的寄生電容C oss1充電,下橋開關的寄生電容C oss2放電。在t 3到t 5這段上、下橋開關皆處於截止狀態的時間稱為盲時區間(Dead time),是用來避免上橋開關尚未完全截止下橋開關就已經導通造成電源V in短路的情況。當上橋開關之寄生電容C oss1充電至V in且下橋開關之寄生電容C oss2放電至與本體二極體D B2的導通電壓相等時則結束模式4。圖14與15分別為SRC-模式4的導通路徑與等效電路圖。 In mode 4, the upper bridge switch is turned off at t 3 , the lower bridge switch remains in the off state, and the resonant inductor current I Lr is a continuous flow characteristic. When both the upper and lower bridge switches are turned off, the power supply V in will be on. a parasitic capacitance C oss1 bridge switches charging the parasitic capacitance C oss2 discharge side switch. Referred to as blind when the time interval t 3 to t 5 period, the low-side switch are in an off state (Dead time), it is used to avoid switching on the bridge has not yet completely cut off low-side switch has been turned on causing the power supply V in a short-circuit Case. Mode 4 is terminated when the parasitic capacitance C oss1 of the upper bridge switch is charged to V in and the parasitic capacitance C oss2 of the lower bridge switch is discharged to be equal to the turn-on voltage of the body diode D B2 . 14 and 15 are conduction paths and equivalent circuit diagrams of SRC-mode 4, respectively.

由圖15之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下 The resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained from the equivalent circuit of Fig. 15, and the relationship is derived as follows

(34) (34)

(35) (35)

將式(34)與(35)取反拉氏轉換可得:The inverse Laplace transform of equations (34) and (35) can be obtained:

(36) (36)

(37) (37)

其中among them

特性阻抗 ,諧振頻率 。總寄生電容, Characteristic impedance ,Resonant frequency . Total parasitic capacitance, .

SRC-模式5 ( t 4< t < t 5 ): SRC-mode 5 ( t 4 < t < t 5 ):

在模式5,上、下橋開關依然處於截止狀態,當上橋開關的寄生電容C oss1充電至V in則不再充電,下橋開關的寄生電容C oss2放電至與本體二極體D B2導通電壓相等時,電流路徑將改由D B2流。此時諧振電感電流I Lr會快速下降,當下橋開關於t 5時導通,則結束模式5並進入下一模式。圖16與17分別為SRC-模式5的導通路徑與等效電路圖。 In mode 5, the upper and lower bridge switches are still in the off state. When the parasitic capacitance C oss1 of the upper bridge switch is charged to V in , it is no longer charged, and the parasitic capacitance C oss2 of the lower bridge switch is discharged to be electrically connected to the body diode D B2 . When the voltages are equal, the current path will be changed to D B2 . At this time, the resonant inductor current I Lr will drop rapidly. When the lower bridge switch is turned on at t 5 , the mode 5 is ended and the next mode is entered. 16 and 17 are conduction paths and equivalent circuit diagrams of SRC-mode 5, respectively.

由圖17之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下 The resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained from the equivalent circuit of Fig. 17, and the relationship is derived as follows

(38) (38)

(39) (39)

將式(38)與(39)取反拉氏轉換可得:The inverse Laplace transform of equations (38) and (39) can be obtained:

(40) (40)

(41) (41)

其中特性阻抗 ,諧振頻率 Characteristic impedance ,Resonant frequency .

3.2 LLC-SRC電路操作模式分析(區域2)3.2 LLC-SRC Circuit Operation Mode Analysis (Zone 2)

LLC-SRC為LLC諧振轉換器操作於區域2之狀態,其模式大致可分兩階段進行分析與討論。第一階段,激磁電感電流I Lm小於諧振電感電流I Lr,諧振元件為諧振電容C r、諧振電感L r;第二階段,激磁電感電流I Lm等於諧振電感電流I Lr,諧振元件為諧振電容C r、諧振電感L r、激磁電感L m。圖18所示為LLC諧振轉換器操作於區域2之時序圖,其一個切換週期可區分為十二個階段,由於t 0到t 6電路動作與t 6到t 12類似,因此本案僅分析t 0到t 6電路動作,以下將針對各個模式做分析與說明: The LLC-SRC is a state in which the LLC resonant converter operates in the region 2, and its mode can be analyzed and discussed in two stages. In the first stage, the magnetizing inductor current I Lm is smaller than the resonant inductor current I Lr , the resonant component is the resonant capacitor C r , and the resonant inductor L r ; in the second phase, the exciting inductor current I Lm is equal to the resonant inductor current I Lr , and the resonant component is a resonant capacitor C r , resonant inductor L r , and magnetizing inductance L m . Figure 18 shows the timing diagram of the LLC resonant converter operating in zone 2. One switching cycle can be divided into twelve phases. Since the t 0 to t 6 circuit action is similar to t 6 to t 12 , this case only analyzes t. 0 to t 6 circuit action, the following will analyze and explain for each mode:

LLC-SRC-模式1 ( ): LLC-SRC-Mode 1 ( ):

在模式1中,上橋開關於t 0導通,下橋開關為截止的狀態,諧振電感電流I Lr因維持續流特性由D B1路徑改由上橋開關本身流往V in,此時因能量經由變壓器、二次側整流二極體D 1傳至負載端並對輸出電容充電,激磁電感L m上的電壓被輸出電壓映射回一次側箝制住L m形成動態短路,因此激磁電感電壓V Lm= nV out且激磁電感電流I Lm線性上升。當諧振電感電流I Lr上升至零時,將結束模式1並進入下一模式。圖19與20分別為LLC-SRC-模式1的導通路徑與等效電路圖。 In mode 1, the upper bridge switch is turned on at t 0 and the lower bridge switch is turned off. The resonant inductor current I Lr is changed from the D B1 path to the upper bridge switch itself to V in due to the continuous flow characteristic. via a transformer, the secondary side rectifier diode D 1 is transmitted to the load terminal and the output capacitor is charged, the voltage across the magnetizing inductance L m is mapped back to the primary side of the output voltage immobilized by L m which forms the dynamic short-circuited, the voltage V Lm magnetizing inductance = nV out and the magnetizing inductor current I Lm rises linearly. When the resonant inductor current I Lr rises to zero, mode 1 will end and proceed to the next mode. 19 and 20 are conduction paths and equivalent circuit diagrams of the LLC-SRC-mode 1, respectively.

由圖20之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: The resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained from the equivalent circuit of FIG. 20, and the relationship is derived as follows:

(42) (42)

(43) (43)

將式(42)與(43)取反拉式轉換可得:The inverse pull conversion of equations (42) and (43) can be obtained:

(44) (44)

(45) (45)

其中among them

特性阻抗 ,諧振頻率。 Characteristic impedance ,Resonant frequency.

LLC-SRC-模式2 ( ): LLC-SRC-Mode 2 ( ):

模式2於t 1開始,上橋開關維持在導通的狀態,下橋開關依然維持在截止的狀態,諧振電感電流I Lr開始換向,能量經由諧振槽、變壓器傳至二次側整流二極體D 1再送至負載端,激磁電感L m上的電壓因被輸出電壓映射回一次側箝制住L m形成動態短路,此時激磁電感電壓V Lm= nV out且激磁電感電流I Lm依然維持線性上升狀態。當諧振電感電流I Lm上升至零時,將結束模式2並進入下一模式。圖21與22分別為LLC-SRC-模式2的導通路徑與等效電路圖。 Mode 2 starts at t 1 , the upper bridge switch remains in the on state, the lower bridge switch remains in the off state, the resonant inductor current I Lr begins to commutate, and the energy is transmitted to the secondary side rectifying diode via the resonant tank and the transformer. D 1 and then to the load terminal, the voltage across the magnetizing inductance L m is the output voltage due to a back side of the mapping L m immobilized by a short circuit to form a dynamic, then the magnetizing inductance voltage V Lm = nV out the magnetizing inductor current I Lm and still maintain linearity rise status. When the resonant inductor current I Lm rises to zero, mode 2 will end and proceed to the next mode. 21 and 22 are conduction paths and equivalent circuit diagrams of the LLC-SRC-mode 2, respectively.

由圖22之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: From the equivalent circuit of Fig. 22, the resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained, and the relationship is derived as follows:

(46) (46)

(47) (47)

將式(46)與(47)取反拉式轉換可得:The inverse pull conversion of equations (46) and (47) can be obtained:

(48) (48)

(49) (49)

其中特性阻抗 ,諧振頻率。 Characteristic impedance ,Resonant frequency.

LLC-SRC-模式3 ( ): LLC-SRC-Mode 3 ( ):

模式3於t 2開始,上橋開關依然維持導通,下橋開關依然維持截止的狀態,諧振電感電流I Lr達到最大值後便開始下降,能量經由諧振槽、變壓器傳至二次側整流二極體再送至負載端,激磁電感L m上的電壓因被輸出電壓映射回一次側箝制形成動態短路,此時激磁電感電壓V Lm= nV out且激磁電感電流I Lm依然維持線性上升狀態。當諧振電感電流I Lr等於激磁電感電流I Lm時,將結束模式3並進入下一模式。圖23與24分別為LLC-SRC-模式3的導通路徑與等效電路圖。 Mode 3 starts at t 2 , the upper bridge switch remains on, the lower bridge switch remains in the off state, and the resonant inductor current I Lr reaches a maximum value and then begins to fall. The energy is transmitted to the secondary side rectified diode via the resonant tank and the transformer. The body is sent to the load end, and the voltage on the magnetizing inductance L m is dynamically short-circuited by the output voltage mapping back to the primary side. At this time, the magnetizing inductance voltage V Lm = nV out and the exciting inductor current I Lm maintains a linear rising state. When the resonant inductor current I Lr is equal to the magnetizing inductor current I Lm , mode 3 will end and proceed to the next mode. 23 and 24 are conduction paths and equivalent circuit diagrams of LLC-SRC-mode 3, respectively.

由圖24之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: From the equivalent circuit of Fig. 24, the resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained, and the relationship is derived as follows:

(50) (50)

(51) (51)

將式(50)與(51)取反拉式轉換可得:The inverse pull conversion of equations (50) and (51) can be obtained:

(52) (52)

(53) (53)

其中特性阻抗 ,諧振頻率。 Characteristic impedance ,Resonant frequency.

LLC-SRC-模式4 ( t 3< t < t 4 ): LLC-SRC-Mode 4 ( t 3 < t < t 4 ):

在模式4,上橋開關維持導通,下橋開關依然維持截止的狀態。由於諧振電感電流I Lr於t 3時與激磁電感電流I Lm相等,因此變壓器一次側電流為零,變壓器形成解耦狀態,將無法傳遞能量至二次側,因此整流二極體截止,也使輸出電壓不會經變壓器映射回一次側箝制激磁電感L m,此時激磁電感L m將參與諧振,輸出能量由輸出濾波電容所提供。當上橋開關截止時,將結束模式4並進入下一模式。圖25與26分別為LLC-SRC-模式4的導通路徑與等效電路圖。 In mode 4, the upper bridge switch remains on and the lower bridge remains in the off state. Since the resonant inductor current I Lr is equal to the magnetizing inductor current I Lm at t 3 , the current on the primary side of the transformer is zero, the transformer is decoupled, and energy cannot be transferred to the secondary side, so the rectifier diode is turned off. The output voltage is not mapped back to the primary side clamped magnetizing inductance L m via the transformer. At this time, the magnetizing inductance L m will participate in the resonance, and the output energy is provided by the output filter capacitor. When the upper bridge switch is turned off, mode 4 will be terminated and the next mode will be entered. 25 and 26 are conduction paths and equivalent circuit diagrams of LLC-SRC-mode 4, respectively.

由圖26之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: From the equivalent circuit of Fig. 26, the resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained, and the relationship is derived as follows:

(54) (54)

(55) (55)

將式(54)與式(55)取反拉氏轉換可得:The inverse Laplace transform of equation (54) and equation (55) can be obtained:

(56) (56)

(57) (57)

其中,特性阻抗 ;諧振頻率 Characteristic impedance ;Resonant frequency .

LLC-SRC-模式5 ( t 4< t < t 5 ): LLC-SRC-Mode 5 ( t 4 < t < t 5 ):

在模式5,上橋開關於t 4時截止,下橋開關依然維持截止的狀態,由於諧振電感電流I Lr仍等於激磁電感電流I Lm,變壓器為解耦狀態,激磁電感參與諧振,此時輸出能量由輸出濾波電容提供。當上橋開關之寄生電容C oss1充電至V in且下橋開關之寄生電容C oss2放電至與本體二極體D B2的導通電壓相等時則結束模式5並進入下一模式。圖27與28分別為LLC-SRC-模式5的導通路徑與等效電路圖。 In mode 5, the upper bridge switch is turned off at t 4 , and the lower bridge switch remains in the off state. Since the resonant inductor current I Lr is still equal to the exciting inductor current I Lm , the transformer is decoupled and the magnetizing inductance participates in resonance. Energy is provided by the output filter capacitor. When the parasitic capacitance C oss1 of the upper bridge switch is charged to V in and the parasitic capacitance C oss2 of the lower bridge switch is discharged to be equal to the turn-on voltage of the body diode D B2 , the mode 5 is ended and the next mode is entered. 27 and 28 are conduction paths and equivalent circuit diagrams of the LLC-SRC-mode 5, respectively.

由圖28之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: From the equivalent circuit of Fig. 28, the resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained, and the relationship is derived as follows:

(58) (58)

(59) (59)

將式(58)與式(59)取反拉氏轉換可得:Inverted Laplace transform of equation (58) and equation (59) can be obtained:

(60) (60)

(61) (61)

其中,特性阻抗 ;諧振頻率 ,總寄生電容 Characteristic impedance ;Resonant frequency , total parasitic capacitance .

(6)  LLC-SRC-模式6 ( t 5< t < t 6 ): (6) LLC-SRC-mode 6 ( t 5 < t < t 6 ):

在模式6中,上、下橋開關皆為截止之狀態。當電源V in對上橋開關的寄生電容C oss1充電至V in則不再充電,且下橋開關的寄生電容C oss2放電至與本體二極體D B2導通電壓相等時,電流路徑改往D B2的路徑流,此時諧振電感電流I Lr依然等於激磁電感電流I Lm,變壓器依然為解耦狀態,輸出能量由輸出電容C o所提供。當下橋開關導通時,將結束模式6並進入下一模式。圖29與30分別為LLC-SRC-模式6的導通路徑與等效電路圖。 In mode 6, both the upper and lower bridge switches are in the off state. When the power supply V in charges the parasitic capacitance C oss1 of the upper bridge switch to V in is no longer charged, and the parasitic capacitance C oss2 of the lower bridge switch is discharged to be equal to the on-voltage of the body diode D B2 , the current path is changed to D The path flow of B2 , at this time, the resonant inductor current I Lr is still equal to the exciting inductor current I Lm , the transformer is still decoupled, and the output energy is provided by the output capacitor C o . When the lower bridge switch is turned on, mode 6 will be terminated and the next mode will be entered. 29 and 30 are conduction paths and equivalent circuit diagrams of LLC-SRC-mode 6, respectively.

由圖30之等效電路可分別求得圖中的諧振電感電流I Lr(s)以及諧振電容電壓V Cr(s),其關係式推導如下: The resonant inductor current I Lr (s) and the resonant capacitor voltage V Cr (s) in the figure can be respectively obtained from the equivalent circuit of FIG. 30, and the relationship is derived as follows:

(62) (62)

(63) (63)

將式(62)與式(63)取反拉氏轉換可得:Inverted Laplace transform of equation (62) and equation (63) can be obtained:

(64) (64)

(65) (65)

其中,特性阻抗 ;諧振頻率 Characteristic impedance ;Resonant frequency .

LLC轉換器同步整流技術LLC Converter Synchronous Rectification Technology

當LLC諧振轉換器操作在零電壓切換區間,其功率開關所產生的功率損失非常地小,在此操作模式下最大的功率損耗主要為輸出整流二極體,這也成為效率變低的主要原因,而半橋串聯諧振轉換器一般使用蕭特基二極體作為二次側整流二極體,但在低電壓大電流的應用下,會因蕭特基二極體的順向導通壓降V f產生很大的導通損失(例:輸出電壓24 V/輸出電流10 A/順向電壓V F=0.85 V/導通電阻R ds (on)=17 mΩ,使用整流二極體的損耗 ,使用MOSFET的損耗為 ),同時此損失會轉移成熱而減少蕭特基二極體的壽命。為了降低導通損失且減少熱的問題,通常會使用同步整流技術來增加轉換器的效率。 When the LLC resonant converter operates in the zero voltage switching interval, the power loss generated by its power switch is very small. In this mode of operation, the maximum power loss is mainly the output rectifying diode, which is also the main reason for the low efficiency. The half-bridge series resonant converter generally uses a Schottky diode as the secondary side rectifying diode, but in the application of low voltage and high current, it will be due to the forward voltage drop of the Schottky diode. f produces a large conduction loss (eg output voltage 24 V / output current 10 A / forward voltage V F = 0.85 V / on-resistance R ds (on) = 17 mΩ, loss using a rectifying diode , the loss of using MOSFET is At the same time, this loss will be transferred into heat and reduce the life of the Schottky diode. In order to reduce conduction losses and reduce heat, synchronous rectification techniques are often used to increase converter efficiency.

4.1同步整流驅動方式探討4.1 Discussion on synchronous rectification drive mode

同步整流驅動方式可分為兩種:Synchronous rectification drive methods can be divided into two types:

(1) 自激式驅動(Self-Driven):自激式的驅動方式是由電路本身自行產生所需的驅動訊號。自激式驅動又分為電壓自激式與電流自激式。電壓自激式驅動大多由變壓器二次側繞組或額外的繞組產生訊號給同步整流開關進而達到驅動開關之目的。雖然電壓自激式有架構簡單、成本低的優點,卻有受架構限制之缺點;電流自激式驅動是將一電流感測器串接於同步整流開關前,並感測流經之電流再由驅動電路產生驅動訊號切換同步整流開關,電流自激式的優點是沒有架構上的限制。(1) Self-Driven: The self-excited drive mode is the drive signal required by the circuit itself. Self-excited drive is divided into voltage self-excitation and current self-excitation. The voltage self-excited drive mostly generates signals from the secondary winding of the transformer or an additional winding to the synchronous rectifier switch to achieve the purpose of driving the switch. Although the self-excited voltage has the advantages of simple structure and low cost, it has the disadvantage of being limited by the architecture; the current self-excited driving is to connect a current sensor in front of the synchronous rectification switch and sense the current flowing through it. The drive circuit generates a drive signal switching synchronous rectification switch. The advantage of the current self-excitation type is that there is no architectural limitation.

(2) 它激式驅動(External-Driven):它激式的驅動方式為感測流經同步整流開關之電流訊號並經由外部驅動電路發送正確的驅動訊號以驅動同步開關。它激式驅動有驅動訊號穩定且不易失真的優點,但須加入額外的驅動電路,因此會增加電路成本和複雜度。另一方面,數位控制能夠給出精準的控制訊號,且有高可靠度與不易受溫度影響而使元件參數漂移等優點。為求驅動訊號穩定且達高可靠度的控制,因此本案採用數位控制技術的驅動方式,直接由控制核心產生控制訊號作為二次側同步整流開關之閘極訊號。另外,為了避免功率級的大電與控制級的小電互相干擾,需將功率級的大電訊號與控制級的小電訊號作電氣隔離。(2) Its external drive (External-Driven): its exciting drive mode is to sense the current signal flowing through the synchronous rectification switch and send the correct drive signal through the external drive circuit to drive the synchronous switch. Its excitation drive has the advantage of stable drive signal and is not easy to be distorted, but additional drive circuit is required, which increases circuit cost and complexity. On the other hand, digital control can give precise control signals, and has the advantages of high reliability and temperature resistance, which causes component parameters to drift. In order to achieve stable driving signal and high reliability control, the driving method of digital control technology is adopted in this case, and the control signal is directly generated by the control core as the gate signal of the secondary side synchronous rectification switch. In addition, in order to avoid the interference between the large power of the power stage and the small power of the control stage, the large electrical signal of the power stage needs to be electrically isolated from the small electrical signal of the control stage.

4.2同步整流控制訊號考量4.2 Synchronous rectification control signal considerations

當具同步整流功能之LLC諧振電路操作在區域2時,若沒在諧振電感電流等於激磁電感電流之前關掉同步整流開關,將會產生誤動作,因為此時沒有電流流進變壓器一次側,變壓器形成解耦,也就沒有能量傳至二次側。由於MOSFET為對稱性元件,其導通時流過的電流流向為雙向性,此時二次側的電流會透過MOSFET從二次側逆流回一次側,使得原本截止的一二次側又相連起來,不只擾亂原本的諧振動作,嚴重時還會損毀MOSFET。反觀原先使用的蕭特基二極體,因其電流流向為單向性,所以能阻擋二次側的電流回灌問題。When the LLC resonant circuit with synchronous rectification function operates in region 2, if the synchronous rectification switch is not turned off before the resonant inductor current is equal to the excitation inductor current, a malfunction will occur because no current flows into the primary side of the transformer, and the transformer is formed. Decoupling, there is no energy transmitted to the secondary side. Since the MOSFET is a symmetrical element, the current flowing through it during conduction is bidirectional. At this time, the current on the secondary side is reversed from the secondary side back to the primary side through the MOSFET, so that the secondary side of the original cut-off is connected, not only Disturbs the original resonant action and, in severe cases, damages the MOSFET. In contrast, the previously used Schottky diodes, because of the unidirectional current flow, can block the secondary current recharge problem.

當操作於區域1時,因變壓器一次側於任何時候皆有電流流入,在整個工作週期都是處於傳送能量的狀態,所以加入同步整流不會有電流回灌的問題。另外MOSFET與整流二極體不同的地方在於當同步整流開關關閉時,變壓器一次側仍然有電流從打點端流入,所以二次側打點端流出的電流便會流過MOSFET的本體二極體接續,因此須注意所使用的MOSFET之本體二極體須與原來要取代的整流二極體方向一致。When operating in zone 1, there is a current flow in the primary side of the transformer at all times, and it is in the state of transmitting energy throughout the working cycle. Therefore, there is no problem of current recirculation when adding synchronous rectification. In addition, the difference between the MOSFET and the rectifying diode is that when the synchronous rectification switch is turned off, the current on the primary side of the transformer still flows from the striking end, so the current flowing from the secondary side of the striking end flows through the body diode of the MOSFET. Therefore, it should be noted that the body diode of the MOSFET used must be in the same direction as the rectifier diode to be replaced.

本案操作區間設計於區域2。因操作於此區會有電流回灌的問題,二次側控制訊號必須考慮盲時區間。圖31為本發明所採用之同步整流開關訊號之示意圖。如圖31所示,控制訊號V gs3與V gs4與控制訊號V gs1與V gs2之間需加入延遲導通時間與提前截止時間。 The operation interval of this case is designed in area 2. There is a problem of current recirculation due to operation in this area, and the secondary side control signal must consider the blind time interval. Figure 31 is a schematic diagram of the synchronous rectification switch signal used in the present invention. As shown in FIG. 31, a delay on-time and an advance-off time are added between the control signals V gs3 and V gs4 and the control signals V gs1 and V gs2 .

硬體電路規格制定與元件設計Hardware circuit specification and component design

以下將對本發明之同步整流LLC諧振轉換器之初級側功率開關、諧振電感、諧振電容、主變壓器圈數設計與鐵心的選用以及次級側同步整流開關、輸出電容之選用等,詳細說明其設計考量。The following is a detailed description of the design of the primary side power switch, resonant inductor, resonant capacitor, main transformer lap design and core selection, and secondary side synchronous rectification switch and output capacitor selection of the synchronous rectified LLC resonant converter of the present invention. Consideration.

5.1電路規格制定5.1 circuit specification

首先定義稍後公式所用到的參數,如下所列:變壓器匝數比: ,諧振頻率: ,串聯諧振電感: ,諧振電容: ,諧振電感比: 。所要研製之LLC諧振轉換器之一實施例之電路規格如下: First define the parameters used in the later formula, as listed below: Transformer turns ratio: ,Resonant frequency: , series resonant inductor: , resonant capacitor: , resonant inductance ratio: . The circuit specifications of one embodiment of the LLC resonant converter to be developed are as follows:

輸入電壓範圍 :380~432 V Input voltage range :380~432 V

輸入額定電壓 :390 V Input rated voltage :390 V

最大輸出功率 :432 W Maximum output power :432 W

輸出電壓範圍 :48 V Output voltage range :48 V

輸出最大電流 :9 A Output maximum current :9 A

第一諧振頻率 :100 kHz First resonant frequency :100 kHz

第二諧振頻率 :30 kHz Second resonant frequency :30 kHz

電路切換頻率 :85 kHz ~ 185 kHz Circuit switching frequency :85 kHz ~ 185 kHz

5.2電路元件參數設計與選用5.2 Circuit component parameter design and selection

5.2.1諧振槽參數設計5.2.1 Resonant tank parameter design

Step 1:決定變壓器圈數比Step 1: Determine the transformer turns ratio

由前述之LLC諧振轉換器頻率響應分析得知,在切換頻率下,電壓轉換比等於交流諧振模組轉移函數的一半,因此可計算出所需的變壓器圈數比,其表示式如下:According to the frequency response analysis of the aforementioned LLC resonant converter, the voltage conversion ratio is equal to half of the transfer function of the AC resonant module at the switching frequency, so the required transformer turns ratio can be calculated, and the expression is as follows:

(66) (66)

(67) (67)

代入式(67)可得 (匝),其中二次側整流二極體的順向壓降太小可忽略不計,本發明在此實施例中採用圈數比 will , Substitute (67) available (匝), wherein the forward voltage drop of the secondary side rectifying diode is too small, and the present invention adopts the turns ratio in this embodiment. .

Step 2:決定諧振槽之電壓增益範圍Step 2: Determine the voltage gain range of the resonant tank

透過下列數學式計算,可獲得需求增益大小,進而得知電路由無載至滿載的電壓增益範圍。Through the following mathematical formulas, the demand gain can be obtained, and then the voltage gain range of the circuit from no load to full load can be known.

(68) (68)

代入式(68)可得 will , , Substitute (68) available

(69) (69)

代入式(69)可得 will , , Substitute (69) is available

Step 3:計算等效負載電阻 Step 3: Calculate the equivalent load resistance :

利用式(17)的推導結果,可計算出等效至變壓器一次側的交流負載電阻,其計算公式如下:Using the derivation result of equation (17), the AC load resistance equivalent to the primary side of the transformer can be calculated, and the calculation formula is as follows:

(70) (70)

代入式(70)可得 will , , Substitute (70) available .

Step 4:電感比( )之設計: Step 4: Inductance ratio ( ) design:

較高的峰值增益可以由增加 值來獲得,但太大的 值將會使變壓器耦合變差和效率下降,以下將計算無載最大操作頻率與最大輸入電壓條件下之電感比。 Higher peak gain can be increased by Value to get, but too big The value will cause transformer coupling degradation and efficiency degradation. The following will calculate the inductor ratio of the no-load maximum operating frequency to the maximum input voltage.

(71) (71)

(72) (72)

其中 為正規化之最大操作頻率。 among them The maximum operating frequency for normalization.

Step 5:確保ZVS下 之計算與選擇: Step 5: Make sure ZVS Calculation and selection:

滿足滿載且最小輸入電壓條件下,能維持ZVS之 計算 Maintains ZVS with full load and minimum input voltage Calculation

(73) (73)

LLC諧振轉換器輸入電壓範圍是由峰值電壓增益所決定,而在峰值增益點以下將進入零電流切換區間,為了確保在零電壓切換下操作,此時在最大峰值增益點之輸入阻抗具有零相位特性,Q值具有一些邊限範圍(5%~10%)可供選擇。本發明在此實施例中以10%邊限作為選擇:The LLC resonant converter input voltage range is determined by the peak voltage gain, and below the peak gain point will enter the zero current switching interval. To ensure operation at zero voltage switching, the input impedance at the maximum peak gain point has zero phase. Characteristic, Q value has some margin range (5% to 10%) to choose from. The invention in this embodiment has a 10% margin as an option:

(74) (74)

無載條件下,確保ZVS的品質因數 計算 Guarantee the quality factor of ZVS under no load conditions Calculation

(75) (75)

因此,為了確保在整個諧振轉換器操作範圍上均可達到ZVS,必須選擇一個低於 的最大品質因數。本發明在此實施例中選擇 Therefore, in order to ensure that ZVS can be achieved over the entire resonant converter operating range, one must be selected below with The maximum quality factor. The invention is selected in this embodiment .

Step6:計算滿足滿載且最小輸入電壓條件下之最小操作頻率 Step6: Calculate the minimum operating frequency under full load and minimum input voltage :

(76) (76)

(77) (77)

本發明在此實施例中採用之最小操作頻率 Minimum operating frequency employed by the present invention in this embodiment .

Step 7:諧振槽設計Step 7: Resonant slot design

由前面所定義諧振轉換器之特性阻抗Z o與諧振電感比 參數值,並分別求得諧振槽內相關元件之理論值,如下所示: The characteristic impedance Z o and the resonant inductance ratio of the resonant converter defined above The parameter values and the theoretical values of the relevant components in the resonant tank are obtained as follows:

(78) (78)

(79) (79)

發明在此實施例中選用諧振電容C r= 100 nF、諧振阻抗 。若選擇較大的諧振電容值可使在諧振電容上的電壓應力較小,但卻使得諧振槽的阻抗降低,將導致較大的短路電流和較高的切換頻率,如此會限制輸出電流之變化。因此,本發明在此實施例中選用介質損耗角(Dielectric Loss Angle)最低,可適用於高電壓脈波電路工作的聚丙烯薄膜電容(Polypropylene)。接著求出諧振電感及激磁電感的值為 In this embodiment, the resonant capacitor C r = 100 nF and the resonant impedance are selected. . If a larger resonant capacitor value is selected, the voltage stress on the resonant capacitor is smaller, but the impedance of the resonant tank is lowered, which will result in a larger short-circuit current and a higher switching frequency, which will limit the change of the output current. . Therefore, the present invention selects the lowest dielectric loss angle (Dielectric Loss Angle) in this embodiment, and is applicable to a polypropylene film capacitor (Polypropylene) in which a high voltage pulse wave circuit operates. Then find the values of the resonant inductor and the magnetizing inductance

(80) (80)

(81) (81)

發明在此實施例中採用之諧振電感為 ,激磁電感 The resonant inductor used in this embodiment is , magnetizing inductance .

5.2.2初級側功率開關選擇5.2.2 Primary side power switch selection

LLC諧振轉換器初級側功率開關以金氧半場效電晶體(MOSFET)為主,其具有較快的切換速度。除了考慮耐壓須大於輸入直流電壓與耐流須大於初級側電流之外,再需考慮的地方為功率開關的輸入電容 、寄生電容 及導通電阻 。一般來說,功率開關上的導通電阻愈小導通損失則愈小,但相對的會有較大的寄生電容 或輸入電容 。若選擇較大寄生電容之功率開關,會使零電壓切換的特性不易達成。綜合以上觀點且考量整體的損失後,整理出功率開關的選擇需考慮以下參數值: The primary side power switch of the LLC resonant converter is dominated by a gold oxide half field effect transistor (MOSFET), which has a faster switching speed. In addition to considering that the withstand voltage must be greater than the input DC voltage and the current resistance must be greater than the primary side current, the only consideration is the input capacitance of the power switch. Parasitic capacitance And on resistance . In general, the smaller the on-resistance on the power switch, the smaller the conduction loss, but the larger the parasitic capacitance. Or input capacitance . If a power switch with a large parasitic capacitance is selected, the characteristics of zero voltage switching are not easily achieved. After combining the above points and considering the overall loss, the following parameter values should be considered in order to sort out the power switch:

開關的額定耐壓應力即為輸入直流電壓。The rated withstand voltage of the switch is the input DC voltage.

開關的額定耐流應力與輸入電流的大小有關。The rated current resistance of the switch is related to the magnitude of the input current.

開關元件的導通電阻。The on-resistance of the switching element.

開開元件的寄生電容( )。 Open the parasitic capacitance of the component ( , ).

本發明在此實施例中,初級側功率開關選擇Infineon公司所生產型號IPP65R110CFD之MOSFET,其耐壓為650V,耐流為99.6 A,導通電阻 為0.099 Ω 寄生電容 為160 pF。 In this embodiment, the primary side power switch selects the MOSFET of the model IPP65R110CFD produced by Infineon, which has a withstand voltage of 650V, a current with a current resistance of 99.6 A, and an on-resistance. Is 0.099 Ω , parasitic capacitance It is 160 pF.

5.2.3二次側功率開關選擇5.2.3 Secondary side power switch selection

同步整流之LLC半橋式諧振轉換器在二次側使用兩顆功率開關MOSFET,此功率開關的選用也須考慮其耐壓與耐流等問題。而在耐流部分因輸出電流皆會流經MOSFET,所以MOSFET必須承受滿載之最大電流 The synchronous rectified LLC half-bridge resonant converter uses two power switching MOSFETs on the secondary side. The selection of this power switch must also consider its withstand voltage and current resistance. In the current-resistant part, the output current will flow through the MOSFET, so the MOSFET must withstand the maximum current at full load. for

(82) (82)

在耐壓部分,MOSFET上須承受最大耐壓 In the withstand voltage part, the MOSFET must withstand the maximum withstand voltage for

(83) (83)

由式(82)、(83)可推得本發明在此實施例中之二次側MOSFET耐壓與耐流分別為From equations (82) and (83), it can be inferred that the secondary MOSFET withstand voltage and current resistance of the present invention in this embodiment are respectively

本發明在此實施例中所選用的二次側MOSFET選用型號AOT2918L,其耐壓為100 V,耐流為90 A, 為5.6 ,其耐壓與耐流皆滿足本發明在此實施例中之二次側MOSFET之規格。 The secondary side MOSFET selected by the present invention in this embodiment is selected from the model AOT2918L, which has a withstand voltage of 100 V and a current with a current resistance of 90 A. For 5.6 The withstand voltage and current resistance both satisfy the specifications of the secondary side MOSFET of the present invention in this embodiment.

5.3數位控制器設計5.3 digital controller design

本發明在此實施例中採用Microchip公司所推出的dsPIC33FJ16GS502微處理器作為數位控制核心,其係將由回授電壓取樣之類比訊號送進微處理器,先經由類比數位轉換器(Analog Digital Control,ADC)將類比資料轉為數位資料後,再由數位濾波器進行濾波,接著將濾波結果送至數位比例-積分-微分(Proportional、Integral、Differential,PID)補償器運算,再依據補償後之結果由PWM模組輸出適當的PWM訊號,進而驅動功率開關並完成一閉迴路控制,也藉此方式達到具同步整流之LLC諧振轉換器數位控制。In this embodiment, the dsPIC33FJ16GS502 microprocessor introduced by Microchip is used as a digital control core, which sends analog signals by feedback voltage sampling to the microprocessor, first through an analog digital converter (Analog Digital Control, ADC). After converting the analog data into digital data, it is filtered by a digital filter, and then the filtered result is sent to a digital proportional-integral-derivative (Proportional, Integral, Differential, PID) compensator operation, and then the compensation result is The PWM module outputs an appropriate PWM signal to drive the power switch and complete a closed loop control, thereby achieving digital control of the LLC resonant converter with synchronous rectification.

5.3.1器韌體設計5.3.1 firmware design

本發明在此實施例中所採用之程式主要分為主程式與ADC中斷副程式兩部分,如圖32(a)與圖32(b)所示。圖32(a)所示之主程式一開始會先對所需的全域變數(Global Variable)與區域變數(Local Variable)作宣告,並對所需使用之變數名稱、暫存器、輸出入埠、模組(ADC、TIMER、PWM)致能及中斷向量進行初始化設定,接著進入無窮迴圈等待中斷旗標發生。The program used in this embodiment of the present invention is mainly divided into two parts, a main program and an ADC interrupt subroutine, as shown in FIG. 32(a) and FIG. 32(b). The main program shown in Fig. 32(a) first declares the required Global Variable and Local Variable, and uses the variable name, register, and output for the required variables. The module (ADC, TIMER, PWM) enable and interrupt vector are initialized, and then enter the infinite loop to wait for the interrupt flag to occur.

ADC中斷副程式流程圖如圖32(b)所示。ADC中斷副程式大致上分為取樣濾波以及增量型PID計算補償兩段。當中斷觸發時將會進入ADC中斷副程式,執行ADC轉換、FIR濾波以及PID回授補償判斷濾波後之輸出值是否小於最低頻率或是大於最高頻率,若是則分別設定在最低頻率或最高頻率以達成變頻控制之目的,最後程式將會清除ADC中斷旗標,並返回主程式進入無窮迴圈等待下一ADC中斷發生。The ADC interrupt subroutine flow chart is shown in Figure 32(b). The ADC interrupt subroutine is roughly divided into two sections: sampling filtering and incremental PID calculation compensation. When the interrupt is triggered, it will enter the ADC interrupt subroutine, perform ADC conversion, FIR filtering, and PID feedback compensation to determine whether the output value is less than the lowest frequency or greater than the highest frequency. If yes, set the minimum frequency or the highest frequency respectively. For the purpose of inverter control, the final program will clear the ADC interrupt flag and return to the main program to enter the infinite loop to wait for the next ADC interrupt to occur.

5.3.2數位PID控制器5.3.2 Digital PID Controller

PID控制器包含比例(P)、積分(I)、微分(D)三部分,其輸出可表示為The PID controller consists of three parts: proportional (P), integral (I), and differential (D). The output can be expressed as

(84) (84)

其中,u(t):控制器之輸出,e(t):輸入之誤差量,K P、K I、K D:比例增益、積分增益和微分增益。數位控制系統是一種取樣控制,其只能根據取樣點與輸入命令之誤差量計算輸出控制量,因此需採用離散化的方法針對數位取樣值進行計算。可將式(84)表示為離散形式,如式(85)所示。 Where u(t): the output of the controller, e(t): the amount of error in the input, K P , K I , K D : proportional gain, integral gain, and differential gain. The digital control system is a kind of sampling control, which can only calculate the output control amount according to the error amount of the sampling point and the input command. Therefore, the discretization method is needed to calculate the digital sampling value. The formula (84) can be represented as a discrete form as shown in the formula (85).

(85) (85)

其中,e(n):系統目前誤差量,e(n-1):系統前一次誤差量,T:取樣週期。Among them, e(n): the current error amount of the system, e(n-1): the previous error amount of the system, T: the sampling period.

若以微處理器實現式(85)之數位PID控制時,因其含有積分項,考量微處理器記憶寬度為16位元,加上在運算時可能出現溢位使結果錯誤,為了降低微處理器的運算量且提升運算效能,故本案採用增量型PID控制器。增量型PID的表示式可經由式(85)推導出。由式(85)可知第n-1次取樣時間的取樣值。If the microprocessor implements the digital PID control of equation (85), because it contains integral terms, the memory memory width of the microprocessor is 16 bits, and the overflow may occur during the operation to make the result wrong, in order to reduce the micro processing. The calculation amount of the device and the improvement of the performance, so the case uses an incremental PID controller. The expression of the incremental PID can be derived via equation (85). The sample value of the n-1th sampling time is known from the equation (85).

(86) (86)

控制增量 之表示式如下: Control increment The expression is as follows:

(87) (87)

將式(85)與式(86)代入式(87)相減整理可得Subtracting equation (85) from equation (86) into equation (87)

(88) (88)

首先假設 以及 ,可將式(87)改寫為式(88)。 First hypothesis , as well as , Equation (87) can be rewritten as Equation (88).

(88) (88)

增量型PID程式流程如圖33所示,其係將輸出命令值與取樣回來的值相減得到一誤差量e(n),再將前一次的誤差量e(n-1)及前兩次的誤差量e(n-2)分別代入式(88)做運算,以得三個ERROR參數ER_KP_V_0, ER_V_0,ER_KD_V_0,並依序乘上K p、K I、K D後相加,得到一輸出變動量 ,PID輸出結果PID out等於 加前一次的週期量,再與週期上下限作比較,若輸出結果小於下限Period min或大於上限Period max,則輸出結果分別等於下限或上限值,最後將其結果輸出至PWM產生器。 The incremental PID program flow is shown in Figure 33, which subtracts the output command value from the sampled value to obtain an error amount e(n), and then the previous error amount e(n-1) and the first two. The error amount e(n-2) of the second is substituted into the equation (88) to obtain three ERROR parameters ER_KP_V_0, ER_V_0, ER_KD_V_0, and sequentially multiply K p , K I , K D and add them to obtain one. Output variation , PID output result PID out is equal to Plus the amount of the previous time period, and then compared with the lower limit on the period, if the output result is smaller than or greater than the upper limit Period min Period max, the output are equal to the lower limit or the upper limit value, and finally outputs the result to the PWM generator.

實驗結果Experimental result

實驗結果分為兩部分,第一部分呈現本發明所提之數位控制具同步整流LLC諧振轉換器之一實測波形結果,第二部分以二次側同步開關訊號比一次側開關訊號延遲導通與提前截止的實現法進行效率趨勢比較。最後呈現實際量測所得之效率數據。The experimental results are divided into two parts. The first part presents the measured waveform result of the digitally controlled synchronous rectification LLC resonant converter proposed by the present invention, and the second part is delayed and turned on and off by the secondary side synchronous switching signal than the primary side switching signal. The implementation method compares efficiency trends. Finally, the actual measured efficiency data is presented.

圖34為本發明在此實施例所量到之開關控制訊號波形圖。圖中V gs1與V gs2分別為一次側開關之驅動訊號,而V gs3與V gs4則是二次側同步整流開關之驅動訊號。圖35為本發明在此實施例所量到之一次側開關之驅動訊號波形圖。由圖35中之量測數據中可知一次側訊號設置一300ns盲時區間以防止開關元件同時導通造成電源短路或電路元件的損壞。圖36為本發明在此實施例所量到之功率開關於輕載(1A)和滿載(9A)時的零電壓切換波形。 Figure 34 is a waveform diagram of the switch control signal measured by the embodiment of the present invention. In the figure, V gs1 and V gs2 are driving signals of the primary side switch, respectively, and V gs3 and V gs4 are driving signals of the secondary side synchronous rectifying switch. Fig. 35 is a waveform diagram showing driving signals of the primary side switch measured in the embodiment of the present invention. It can be seen from the measurement data in FIG. 35 that the primary side signal is set to a 300 ns blind time interval to prevent the switching elements from being simultaneously turned on to cause a short circuit of the power supply or damage of the circuit components. Figure 36 is a diagram showing the zero voltage switching waveform of the power switch measured in this embodiment at light load (1A) and full load (9A).

圖37(a)~37(c)為將本發明此實施例之LLC諧振轉換器設定為定電壓模式,以輸入電壓固定於380V及輸出電壓固定於48V,分別於輕載(1A)、中載(5A)及重載(9A)所量到之閘極電壓V GS、功率元件兩端之跨壓V DS、變壓器一次側電壓V P、諧振電流i Lr,開關切換頻率、諧振槽電流及變壓器一次側電壓之波形圖,其中,在輕載時,為了維持穩定的輸出電壓,其切換頻率最高(其值為125.5kH Z);而由圖37(b)與圖37(c)中之諧振電流波形可推知,LLC諧振轉換器已進入區域2的操作範圍內。 37(a) to 37(c) show that the LLC resonant converter of this embodiment of the present invention is set to a constant voltage mode, in which the input voltage is fixed at 380 V and the output voltage is fixed at 48 V, respectively, in light load (1A), Gate voltage V GS measured by (5A) and heavy load (9A), voltage across the power component V DS , transformer primary voltage V P , resonant current i Lr , switching frequency, resonant tank current and The waveform of the primary side voltage of the transformer, in which, at light load, the switching frequency is the highest (the value is 125.5kH Z ) in order to maintain a stable output voltage; and in Figure 37(b) and Figure 37(c) The resonant current waveform can be inferred that the LLC resonant converter has entered the operating range of zone 2.

接著固定一次側開關訊號及其盲時區間並調控二次側開關訊號之盲時區間觀察對電路效率的變化,並將二次側開關訊號與一次側開關訊號相比以延遲導通及提前截止的方式實現電路動作,並以不同輸入電壓與盲時區間進行實驗比較。圖38(a)~38(c) 分別為在輸入電壓380V、390V、400V之情況下,固定一次側開關訊號與其盲時區間並調整二次側開關訊號之盲時區間之效率對負載曲線圖。Then, the primary side switching signal and its blind time interval are fixed and the blind time interval of the secondary side switching signal is adjusted to observe the change of the circuit efficiency, and the secondary side switching signal is compared with the primary side switching signal to delay conduction and early cutoff. The method realizes the circuit action and compares the experiment with different input voltage and blind time interval. Figure 38(a)~38(c) are the efficiency versus load curves for the fixed-side switching signal and its blind time interval and adjusting the blind-time interval of the secondary-side switching signal at the input voltages of 380V, 390V, and 400V. .

由圖38(a)~38(c)觀察其結果發現不論輸入電壓為何,二次側開關訊號之盲時區間為50 ns時在不同負載條件下皆有較高之效率,另外,也可觀察到在效率趨勢上,當盲時區間越小,效率越高。From Fig. 38(a)~38(c), it is found that regardless of the input voltage, the blind time interval of the secondary side switching signal is 50 ns, which has higher efficiency under different load conditions. In terms of efficiency trends, the smaller the blind time interval, the higher the efficiency.

結論in conclusion

就電源轉換效率而言,同步整流開關的驅動訊號須儘可能增加其導通作用時間,以減少本體二極體的導通時間、降低同步整流開關的功率損耗。由實驗之效率曲線圖可看出,當二次側同步整流開關的盲時區間愈小則電源轉換效率愈高。In terms of power conversion efficiency, the driving signal of the synchronous rectification switch must increase its conduction time as much as possible to reduce the on-time of the body diode and reduce the power loss of the synchronous rectification switch. It can be seen from the experimental efficiency graph that the smaller the blind time interval of the secondary side synchronous rectification switch, the higher the power conversion efficiency.

本案所揭示者,乃較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。The disclosure of the present invention is a preferred embodiment. Any change or modification of the present invention originating from the technical idea of the present invention and being easily inferred by those skilled in the art will not deviate from the scope of patent rights of the present invention.

綜上所陳,本案無論就目的、手段與功效,在在顯示其迥異於習知之技術特徵,且其首先發明合於實用,亦在在符合發明之專利要件,懇請 貴審查委員明察,並祈早日賜予專利,俾嘉惠社會,實感德便。In summary, this case, regardless of its purpose, means and efficacy, is showing its technical characteristics that are different from the conventional ones, and its first invention is practical and practical, and it is also in compliance with the patent requirements of the invention. I will be granted a patent at an early date.

100‧‧‧第一半橋開關電路
110‧‧‧電容-電感串聯電路
120‧‧‧變壓器
130‧‧‧第二半橋開關電路
140‧‧‧輸出電容
150‧‧‧負載電阻
160‧‧‧回授電路
170‧‧‧控制單元
161‧‧‧分壓電路
162‧‧‧光耦合電路
171‧‧‧類比至數位轉換單元
172‧‧‧濾波運算單元
173‧‧‧比例-積分-微分運算單元
174‧‧‧脈衝寬度調變運算單元
175‧‧‧驅動單元
100‧‧‧First half bridge switching circuit
110‧‧‧Capacitor-inductor series circuit
120‧‧‧Transformers
130‧‧‧Second half bridge switching circuit
140‧‧‧ output capacitor
150‧‧‧Load resistor
160‧‧‧Return circuit
170‧‧‧Control unit
161‧‧‧voltage circuit
162‧‧‧Optical coupling circuit
171‧‧‧ analog to digital conversion unit
172‧‧‧Filtering unit
173‧‧‧Proportional-Integral-Derivative Unit
174‧‧‧ pulse width modulation unit
175‧‧‧ drive unit

圖1繪示本發明之二次側同步整流器盲時調控之高效率LLC共振式轉換器之一實施例。     圖2繪示在二次側採用二極體之LLC諧振轉換器之架構。     圖3為將圖2之非線性電路轉換成線性雙埠模型之電路圖。     圖4為圖2之LLC諧振槽之等效電路圖。     圖5為圖2之LLC諧振電路在不同 值下的電壓增益與正規化頻率響應圖。     圖6標示圖2之LLC諧振轉換器之主要電流、電壓信號。     圖7繪示SRC的動作時序圖。     圖8與9分別繪示SRC-模式1的導通路徑與等效電路圖。     圖10與11分別繪示SRC-模式2的導通路徑與等效電路圖。     圖12與13分別繪示SRC-模式3的導通路徑與等效電路圖。     圖14與15分別繪示SRC-模式4的導通路徑與等效電路圖。     圖16與17分別繪示SRC-模式5的導通路徑與等效電路圖。     圖18繪示LLC諧振轉換器操作於區域2之時序圖。     圖19與20分別繪示LLC-SRC-模式1的導通路徑與等效電路圖。     圖21與22分別繪示LLC-SRC-模式2的導通路徑與等效電路圖。     圖23與24分別繪示LLC-SRC-模式3的導通路徑與等效電路圖。     圖25與26分別繪示LLC-SRC-模式4的導通路徑與等效電路圖。     圖27與28分別繪示LLC-SRC-模式5的導通路徑與等效電路圖。     圖29與30分別繪示LLC-SRC-模式6的導通路徑與等效電路圖。     圖31為本發明所採用之同步整流開關訊號之示意圖。     圖32(a)與圖32(b) 繪示本發明在一實施例所採用之主程式與ADC中斷副程式。     圖33繪示一增量型PID程式流程圖。     圖34為本發明在一實施例所量到之開關控制訊號波形圖。     圖35為本發明在一實施例所量到之一次側開關之驅動訊號波形圖。     圖36繪示本發明在一實施例所量到之功率開關於輕載(1A)和滿載(9A)時的零電壓切換波形。     圖37(a)~37(c)為將本發明一實施例之LLC諧振轉換器設定為定電壓模式,以輸入電壓固定於380V及輸出電壓固定於48V,分別於輕載(1A)、中載(5A)及重載(9A)所量到之閘極電壓V GS、功率元件兩端之跨壓V DS、變壓器一次側電壓V P、諧振電流i Lr,開關切換頻率、諧振槽電流及變壓器一次側電壓之波形圖。     圖38(a)~38(c)分別為本發明一實施例在輸入電壓380V、390V、400V之情況下,固定一次側開關訊號與其盲時區間並調整二次側開關訊號之盲時區間之效率對負載曲線圖。 1 illustrates an embodiment of a high efficiency LLC resonant converter for blind time regulation of a secondary side synchronous rectifier of the present invention. FIG. 2 illustrates the architecture of an LLC resonant converter employing a diode on the secondary side. 3 is a circuit diagram of converting the nonlinear circuit of FIG. 2 into a linear double-turn model. 4 is an equivalent circuit diagram of the LLC resonant tank of FIG. 2. Figure 5 is the LLC resonant circuit of Figure 2 in different The voltage gain under the value and the normalized frequency response plot. Figure 6 shows the main current and voltage signals of the LLC resonant converter of Figure 2. FIG. 7 is a timing chart showing the operation of the SRC. 8 and 9 respectively show the conduction path and equivalent circuit diagram of the SRC-mode 1. 10 and 11 respectively show the conduction path and equivalent circuit diagram of the SRC-mode 2. 12 and 13 respectively show the conduction path and equivalent circuit diagram of the SRC-mode 3. 14 and 15 respectively show the conduction path and equivalent circuit diagram of SRC-mode 4. 16 and 17 respectively show the conduction path and equivalent circuit diagram of the SRC-mode 5. FIG. 18 illustrates a timing diagram of the LLC resonant converter operating in region 2. 19 and 20 respectively show the conduction path and equivalent circuit diagram of the LLC-SRC-mode 1. 21 and 22 respectively show the conduction path and equivalent circuit diagram of the LLC-SRC-mode 2. 23 and 24 respectively show the conduction path and equivalent circuit diagram of the LLC-SRC-mode 3. 25 and 26 respectively show the conduction path and equivalent circuit diagram of the LLC-SRC-mode 4. 27 and 28 respectively show the conduction path and equivalent circuit diagram of the LLC-SRC-mode 5. 29 and 30 respectively show the conduction path and equivalent circuit diagram of the LLC-SRC-mode 6. Figure 31 is a schematic diagram of the synchronous rectification switch signal used in the present invention. 32(a) and 32(b) illustrate a main program and an ADC interrupt subroutine used in an embodiment of the present invention. Figure 33 is a flow chart of an incremental PID program. Figure 34 is a waveform diagram of the switch control signal measured in an embodiment of the present invention. Figure 35 is a waveform diagram of driving signals of the primary side switch measured in an embodiment of the present invention. Figure 36 is a diagram showing the zero voltage switching waveform of the power switch measured in one embodiment of the present invention at light load (1A) and full load (9A). 37(a) to 37(c) show the LLC resonant converter according to an embodiment of the present invention in a constant voltage mode, in which the input voltage is fixed at 380 V and the output voltage is fixed at 48 V, respectively, in light load (1A), Gate voltage V GS measured by (5A) and heavy load (9A), voltage across the power component V DS , transformer primary voltage V P , resonant current i Lr , switching frequency, resonant tank current and Waveform of the primary side voltage of the transformer. 38(a) to 38(c) respectively illustrate a blind time interval in which the primary side switching signal and its blind time interval are fixed and the secondary side switching signal is adjusted at an input voltage of 380V, 390V, and 400V according to an embodiment of the present invention. Efficiency vs. load graph.

100‧‧‧第一半橋開關電路 100‧‧‧First half bridge switching circuit

110‧‧‧電容-電感串聯電路 110‧‧‧Capacitor-inductor series circuit

120‧‧‧變壓器 120‧‧‧Transformers

130‧‧‧第二半橋開關電路 130‧‧‧Second half bridge switching circuit

140‧‧‧輸出電容 140‧‧‧ output capacitor

150‧‧‧負載電阻 150‧‧‧Load resistor

160‧‧‧回授電路 160‧‧‧Return circuit

170‧‧‧控制單元 170‧‧‧Control unit

161‧‧‧分壓電路 161‧‧‧voltage circuit

162‧‧‧光耦合電路 162‧‧‧Optical coupling circuit

171‧‧‧類比至數位轉換單元 171‧‧‧ analog to digital conversion unit

172‧‧‧濾波運算單元 172‧‧‧Filtering unit

173‧‧‧比例-積分-微分運算單元 173‧‧‧Proportional-Integral-Derivative Unit

174‧‧‧脈衝寬度調變運算單元 174‧‧‧ pulse width modulation unit

175‧‧‧驅動單元 175‧‧‧ drive unit

Claims (5)

一種二次側同步整流器盲時調控之高效率LLC共振式轉換器,其具有:一第一半橋開關電路,具有二輸入端以與一輸入電壓之正、負端耦接、二控制端以分別與一第一驅動信號及一第二驅動信號耦接、以及一輸出端以在該第一驅動信號呈現一作用電位時與該正端耦接及該第二驅動信號呈現一作用電位時與該負端耦接;一電容-電感串聯電路,其一端係與該第一半橋開關電路之所述輸出端耦接;一變壓器,具有一主線圈及一次級線圈,該主線圈之一端係與該電容-電感串聯電路之另一端耦接,該主線圈之另一端係與該輸入電壓之所述負端耦接,該次級線圈具有一第一輸出端、一第二輸出端、及一中心抽頭接點;一第二半橋開關電路,具有二輸入端以與該第一輸出端及該第二輸出端耦接、二控制端以分別與一第三驅動信號及一第四驅動信號耦接、以及一輸出端以在該第三驅動信號呈現一作用電位時與該第一輸出端耦接及該第四驅動信號呈現一作用電位時與該第二輸出端耦接;一輸出電容,耦接於該第二半橋開關電路之所述輸出端與該中心抽頭接點之間;一負載電阻,耦接於該第二半橋開關電路之所述輸出端與該中心抽頭接點之間;一回授電路,用以依該負載電阻之一跨壓產生一回授信號;以及一控制單元,用以依該回授信號執行一驅動信號產生程序以產生該第一驅動信號、該第二驅動信號、該第三驅動信號、以及該第四驅動信號,其中,該第 一驅動信號和該第二驅動信號之工作頻率係介於一第一諧振頻率和一第二諧振頻率之間,其中該第一諧振頻率係一諧振電感和一諧振電容之共振頻率,而該第二諧振頻率係一激磁電感、該諧振電感及該諧振電容之共振頻率,俾以一零電壓切換模式驅動該第一半橋開關電路且該第一驅動信號和該第二驅動信號之間有一固定的盲時區間,該第三驅動信號相對於該第一驅動信號有一延遲導通時間及一提前截止時間,該第四驅動信號相對於該第二驅動信號有該延遲導通時間及該提前截止時間,且該驅動信號產生程序包括一比例-積分-微分運算以調整該延遲導通時間及該提前截止時間,俾以降低該第二半橋開關電路的功率損耗。 A high-efficiency LLC resonant converter for blind-time regulation of a secondary side synchronous rectifier, comprising: a first half-bridge switching circuit having two inputs for coupling with positive and negative ends of an input voltage, and two control terminals for Each of the first driving signal and the second driving signal is coupled to the first driving signal and the second driving signal, and an output terminal is coupled to the positive terminal when the first driving signal exhibits an active potential, and the second driving signal exhibits an active potential The negative terminal is coupled; a capacitor-inductor series circuit having one end coupled to the output end of the first half bridge switch circuit; a transformer having a main coil and a primary coil, one end of the main coil The other end of the main circuit is coupled to the negative end of the input voltage, and the second coil has a first output end, a second output end, and a center tap contact; a second half bridge switch circuit having two input ends coupled to the first output end and the second output end, and two control ends respectively for a third drive signal and a fourth drive Signal coupling, and one input The second output end is coupled to the second output end when the third driving signal is coupled to the first output end and the fourth driving signal is coupled to the second output end; an output capacitor coupled to the first Between the output end of the two-half bridge switch circuit and the center tap contact; a load resistor coupled between the output end of the second half-bridge switch circuit and the center tap contact; a circuit for generating a feedback signal according to one of the load resistors; and a control unit for performing a driving signal generation program to generate the first driving signal and the second driving signal according to the feedback signal The third driving signal and the fourth driving signal, wherein the The operating frequency of a driving signal and the second driving signal is between a first resonant frequency and a second resonant frequency, wherein the first resonant frequency is a resonant frequency of a resonant inductor and a resonant capacitor, and the first The second resonant frequency is a resonant inductor, the resonant inductor and a resonant frequency of the resonant capacitor, and the first half-bridge switching circuit is driven in a zero voltage switching mode and a fixed connection between the first driving signal and the second driving signal The third driving signal has a delayed on-time and an advanced off-time with respect to the first driving signal, and the fourth driving signal has the delayed on-time and the advanced-off time with respect to the second driving signal. And the driving signal generating program includes a proportional-integral-differential operation to adjust the delayed on-time and the advance-off time to reduce the power loss of the second half-bridge switching circuit. 如申請專利範圍第1項所述之二次側同步整流器盲時調控之高效率LLC共振式轉換器,其中該回授電路包含一分壓電路及一光耦合電路。 The high-efficiency LLC resonant converter for blind-time regulation of a secondary side synchronous rectifier according to claim 1, wherein the feedback circuit comprises a voltage dividing circuit and an optical coupling circuit. 如申請專利範圍第1項所述之二次側同步整流器盲時調控之高效率LLC共振式轉換器,其中該驅動信號產生程序包含一類比至數位轉換運算。 A high-efficiency LLC resonant converter for blind-time regulation of a secondary-side synchronous rectifier according to claim 1, wherein the drive signal generating program includes an analog-to-digital conversion operation. 如申請專利範圍第3項所述之二次側同步整流器盲時調控之高效率LLC共振式轉換器,其中該驅動信號產生程序進一步包含一濾波運算。 A high-efficiency LLC resonant converter for blind-time regulation of a secondary side synchronous rectifier according to claim 3, wherein the drive signal generating program further comprises a filtering operation. 如申請專利範圍第1項所述之二次側同步整流器盲時調控之高效率LLC共振式轉換器,其中該控制單元包含一脈波寬度調變模組以提供該第一驅動信號、該第二驅動信號、該第三驅動信號、以及該第四驅動信號。 The high efficiency LLC resonant converter of the secondary side synchronous rectifier blind time control according to claim 1, wherein the control unit comprises a pulse width modulation module to provide the first driving signal, the first a second drive signal, the third drive signal, and the fourth drive signal.
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TWI747535B (en) * 2020-09-30 2021-11-21 台達電子工業股份有限公司 Llc resonance converter, control unit, and method of controlling the same
TWI767432B (en) * 2020-12-01 2022-06-11 產晶積體電路股份有限公司 Zero-voltage switching power control system
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CN113691140A (en) * 2021-09-09 2021-11-23 安徽大学 Bidirectional synchronous rectification control device and method for LLC converter
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