TWI723421B - Power supply device - Google Patents

Power supply device Download PDF

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TWI723421B
TWI723421B TW108120230A TW108120230A TWI723421B TW I723421 B TWI723421 B TW I723421B TW 108120230 A TW108120230 A TW 108120230A TW 108120230 A TW108120230 A TW 108120230A TW I723421 B TWI723421 B TW I723421B
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coupled
potential
terminal
node
transistor
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TW202046060A (en
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詹子增
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宏碁股份有限公司
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Abstract

A power supply device includes a switch circuit, a resonant circuit, a transformer, an output rectifier, and a controller. The switch circuit includes a plurality of low-pass filters. The switch circuit generates a switch voltage according to an input voltage, a first clock voltage, a second clock voltage, a first control voltage, and a second control voltage. The resonant circuit generates a resonant voltage according to the switch voltage. The transformer generates a transformation voltage according to the resonant voltage. The output rectifier generates an output voltage according to the transformation voltage. The controller detects a sensing voltage relative to the output rectifier. The controller determines the first control voltage and the second control voltage according to the sensing voltage, so as to enable a portion of the low-pass filters and disable the other portion of the low-pass filters.

Description

電源供應器Power Supplier

本發明係關於一種電源供應器,特別係關於一種可抑制雜訊之電源供應器。The present invention relates to a power supply, and more particularly to a power supply capable of suppressing noise.

傳統電源供應器之切換電路之切換時脈頻率通常介於80kHz至140kHz之間。當進行電磁干擾測試時,傳統電源供應器容易產生二倍頻之切換雜訊,其可能落入介於150kHz至30MHz之目標測試頻率範圍內並導致測試結果不佳。有鑑於此,勢必要提出一種全新之解決方案,以克服先前技術所面臨之問題。The switching clock frequency of the switching circuit of a conventional power supply is usually between 80kHz and 140kHz. When performing electromagnetic interference tests, traditional power supplies are prone to generate double-frequency switching noise, which may fall within the target test frequency range of 150kHz to 30MHz and cause poor test results. In view of this, it is necessary to propose a new solution to overcome the problems faced by the prior art.

在較佳實施例中,本發明提供一種電源供應器,包括:一切換電路,包括複數個低通濾波器,其中該切換電路係根據一輸入電位、一第一時脈電位、一第二時脈電位、一第一控制電位,以及一第二控制電位來產生一切換電位;一諧振電路,根據該切換電位來產生一諧振電位;一變壓器,根據該諧振電位來產生一變壓電位;一輸出整流器,根據該變壓電位來產生一輸出電位;以及一控制器,偵測關於該輸出整流器之一感測電位,其中該控制器係根據該感測電位來決定該第一控制電位和該第二控制電位,以致能該等低通濾波器之一部份且禁能該等低通濾波器之其餘部份。In a preferred embodiment, the present invention provides a power supply including: a switching circuit including a plurality of low-pass filters, wherein the switching circuit is based on an input potential, a first clock potential, and a second time. Pulse potential, a first control potential, and a second control potential to generate a switching potential; a resonant circuit generates a resonance potential based on the switching potential; a transformer generates a variable potential based on the resonance potential; An output rectifier generates an output potential according to the variable voltage potential; and a controller detects a sensed potential of the output rectifier, wherein the controller determines the first control potential and the first control potential according to the sensed potential The second control potential enables a part of the low-pass filters and disables the rest of the low-pass filters.

為讓本發明之目的、特徵和優點能更明顯易懂,下文特舉出本發明之具體實施例,並配合所附圖式,作詳細說明如下。In order to make the purpose, features and advantages of the present invention more comprehensible, specific embodiments of the present invention are listed below, with the accompanying drawings, and detailed descriptions are as follows.

在說明書及申請專利範圍當中使用了某些詞彙來指稱特定的元件。本領域技術人員應可理解,硬體製造商可能會用不同的名詞來稱呼同一個元件。本說明書及申請專利範圍並不以名稱的差異來作為區分元件的方式,而是以元件在功能上的差異來作為區分的準則。在通篇說明書及申請專利範圍當中所提及的「包含」及「包括」一詞為開放式的用語,故應解釋成「包含但不僅限定於」。「大致」一詞則是指在可接受的誤差範圍內,本領域技術人員能夠在一定誤差範圍內解決所述技術問題,達到所述基本之技術效果。此外,「耦接」一詞在本說明書中包含任何直接及間接的電性連接手段。因此,若文中描述一第一裝置耦接至一第二裝置,則代表該第一裝置可直接電性連接至該第二裝置,或經由其它裝置或連接手段而間接地電性連接至該第二裝置。In the specification and the scope of patent application, certain words are used to refer to specific elements. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. This specification and the scope of patent application do not use differences in names as a way to distinguish elements, but use differences in functions of elements as a criterion for distinguishing. The terms "include" and "include" mentioned in the entire specification and the scope of the patent application are open-ended terms and should be interpreted as "including but not limited to". The term "approximately" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. In addition, the term "coupling" includes any direct and indirect electrical connection means in this specification. Therefore, if it is described in the text that a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. Two devices.

第1圖係顯示根據本發明一實施例所述之電源供應器100之示意圖。例如,電源供應器100可應用於桌上型電腦、筆記型電腦,或一體成形電腦。如第1圖所示,電源供應器100包括:一切換電路110、一諧振電路130、一變壓器140、一輸出整流器150,以及一控制器(Controller)160,其中切換電路110包括複數個低通濾波器120-1、120-2、…、120-N,而N可為大於1之任意正整數。必須注意的是,雖然未顯示於第1圖中,但電源供應器100更可包括其他元件,例如:一穩壓器或(且)一負回授電路。FIG. 1 is a schematic diagram of a power supply 100 according to an embodiment of the invention. For example, the power supply 100 can be applied to a desktop computer, a notebook computer, or an integrated computer. As shown in Figure 1, the power supply 100 includes: a switching circuit 110, a resonance circuit 130, a transformer 140, an output rectifier 150, and a controller 160, wherein the switching circuit 110 includes a plurality of low-pass The filters 120-1, 120-2, ..., 120-N, and N can be any positive integer greater than 1. It should be noted that although not shown in Figure 1, the power supply 100 may further include other components, such as a voltage regulator or (and) a negative feedback circuit.

切換電路110係根據一輸入電位VIN、一第一時脈電位VK1、一第二時脈電位VK2、一第一控制電位VC1,以及一第二控制電位VC2來產生一切換電位VW。輸入電位VIN可來自一外部電源,其中輸入電位VIN可為具有任意頻率和任意振幅之一交流電位。例如,此交流電位之頻率可約為50Hz或60Hz,而此交流電位之方均根值可約為110V或220V,但亦不僅限於此。第一時脈電位VK1和第二時脈電位VK2各自之操作頻率可介於80kHz至140kHz之間。第一時脈電位VK1和第二時脈電位VK2可具有互補之邏輯位準。亦即,若第一時脈電位VK1為低邏輯位準(邏輯「0」),則第二時脈電位VK2必為高邏輯位準(邏輯「1」),而若第一時脈電位VK1為高邏輯位準,則第二時脈電位VK2必為低邏輯位準。諧振電路130係根據切換電位VW來產生一諧振電位VR。變壓器140係根據諧振電位VR來產生一變壓電位VT。輸出整流器150係根據變壓電位VT來產生一輸出電位VOUT。輸出電位VOUT可為具有任意位準之一直流電位。例如,輸出電位VOUT之位準可大致為恆定之19V,但亦不僅限於此。控制器160可以是一脈衝寬度調變積體電路。在一些實施例中,控制器160包括一偵測電路、一比較電路,以及一處理電路(未顯示)。控制器160可偵測關於輸出整流器150之一感測電位VE,其中控制器160係根據感測電位VE來決定第一控制電位VC1和第二控制電位VC2,以致能該等低通濾波器120-1、120-2、…、120-N之一部份且禁能該等低通濾波器120-1、120-2、…、120-N之其餘部份。因應於不同輸出電流,電源供應器100可操作於一輕載模式或一重載模式,其中第一時脈電位VK1和第二時脈電位VK2可各自具有一輕載操作頻率或一重載操作頻率,而輕載操作頻率可以高於重載操作頻率。例如,輕載操作頻率可約等於133kHz,而重載操作頻率可等於90kHz,但亦不僅限於此。藉由適當地控制該等低通濾波器120-1、120-2、…、120-N,切換電路110可自動濾除不必要之雜訊頻率並抑制掉倍頻切換雜訊,從而可改善電源供應器100之電磁干擾之測試結果。The switching circuit 110 generates a switching potential VW according to an input potential VIN, a first clock potential VK1, a second clock potential VK2, a first control potential VC1, and a second control potential VC2. The input potential VIN can come from an external power source, where the input potential VIN can be an AC potential with any frequency and any amplitude. For example, the frequency of the AC potential can be about 50Hz or 60Hz, and the root mean square value of the AC potential can be about 110V or 220V, but it is not limited to this. The operating frequency of each of the first clock potential VK1 and the second clock potential VK2 may be between 80 kHz and 140 kHz. The first clock potential VK1 and the second clock potential VK2 may have complementary logic levels. That is, if the first clock potential VK1 is a low logic level (logic "0"), the second clock potential VK2 must be a high logic level (logic "1"), and if the first clock potential VK1 If it is a high logic level, the second clock potential VK2 must be a low logic level. The resonance circuit 130 generates a resonance potential VR according to the switching potential VW. The transformer 140 generates a variable voltage VT according to the resonance potential VR. The output rectifier 150 generates an output potential VOUT according to the variable voltage VT. The output potential VOUT can be a DC potential having any level. For example, the level of the output potential VOUT can be approximately a constant 19V, but it is not limited to this. The controller 160 may be a pulse width modulation integrated circuit. In some embodiments, the controller 160 includes a detection circuit, a comparison circuit, and a processing circuit (not shown). The controller 160 can detect a sensed potential VE related to the output rectifier 150. The controller 160 determines the first control potential VC1 and the second control potential VC2 according to the sensed potential VE to enable the low-pass filters 120 -1, 120-2, ..., a part of 120-N and disable the rest of the low-pass filters 120-1, 120-2, ..., 120-N. In response to different output currents, the power supply 100 can be operated in a light load mode or a heavy load mode, wherein the first clock potential VK1 and the second clock potential VK2 can each have a light load operating frequency or a heavy load operation Frequency, and the light load operating frequency can be higher than the heavy load operating frequency. For example, the light load operating frequency may be approximately equal to 133 kHz, and the heavy load operating frequency may be equal to 90 kHz, but it is not limited to this. By appropriately controlling the low-pass filters 120-1, 120-2, ..., 120-N, the switching circuit 110 can automatically filter out unnecessary noise frequencies and suppress the doubling frequency switching noise, thereby improving The electromagnetic interference test result of the power supply 100.

以下實施例將介紹電源供應器100之詳細結構及操作方式。必須理解的是,這些圖式和敘述僅為舉例,而非用於限制本發明之範圍。The following embodiments will introduce the detailed structure and operation of the power supply 100. It must be understood that these drawings and descriptions are only examples, and are not used to limit the scope of the present invention.

第2圖係顯示根據本發明一實施例所述之電源供應器200之示意圖。在第2圖之實施例中,電源供應器200具有一輸入節點NIN和一輸出節點NOUT,並包括一切換電路210、一諧振電路230、一變壓器240、一輸出整流器250,以及一控制器260,其中切換電路210包括一第一低通濾波器、一第二低通濾波器、一第三低通濾波器,以及一第四低通濾波器(亦即,前述正整數N可恰等於4)。電源供應器200之輸入節點NIN可由一外部電源處接收一輸入電位VIN,而電源供應器200之輸出節點NOUT可用於輸出一輸出電位VOUT至一電子裝置(例如:一筆記型電腦)。FIG. 2 is a schematic diagram of the power supply 200 according to an embodiment of the invention. In the embodiment of Figure 2, the power supply 200 has an input node NIN and an output node NOUT, and includes a switching circuit 210, a resonance circuit 230, a transformer 240, an output rectifier 250, and a controller 260 , Wherein the switching circuit 210 includes a first low-pass filter, a second low-pass filter, a third low-pass filter, and a fourth low-pass filter (that is, the aforementioned positive integer N may be exactly 4 ). The input node NIN of the power supply 200 can receive an input potential VIN from an external power source, and the output node NOUT of the power supply 200 can be used to output an output potential VOUT to an electronic device (such as a laptop).

切換電路210包括一第一電晶體M1、一第二電晶體M2、一第三電晶體M3、一第四電晶體M4、一第一電阻器R1、一第二電阻器R2、一第一電容器C1、一第二電容器C2、一第三電容器C3,以及一第四電容器C4。例如,第一電晶體M1、第二電晶體M2、第三電晶體M3,以及第四電晶體M4之每一者可各自為一N型金氧半場效電晶體。第一電晶體M1之控制端係耦接至一第一節點N1,第一電晶體M1之第一端係耦接至一第二節點N2以輸出一切換電位VW,而第一電晶體M1之第二端係耦接至輸入節點NIN。第二電晶體M2之控制端係耦接至一第三節點N3,第二電晶體M2之第一端係耦接至一接地電位VSS(例如:0V),而第二電晶體M2之第二端係耦接至第二節點N2。第一電阻器R1具有一第一端和一第二端,其中第一電阻器R1之第一端係耦接至控制器260以接收一第一時脈電位VK1,而第一電阻器R1之第二端係耦接至第一節點N1。第二電阻器R2之第一端係耦接至控制器260以接收一第二時脈電位VK2,而第二電阻器R2之第二端係耦接至第三節點N3。因為第一時脈電位VK1和第二時脈電位VK2具有互補之邏輯位準,故第一電晶體M1和第二電晶體M2亦具有互補之操作模式。例如,若第一電晶體M1被致能,則第二電晶體M2可被禁能,而若第一電晶體M1被禁能,則第二電晶體M2可被致能。The switching circuit 210 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a first resistor R1, a second resistor R2, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4. For example, each of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 can each be an N-type MOSFET. The control terminal of the first transistor M1 is coupled to a first node N1, the first terminal of the first transistor M1 is coupled to a second node N2 to output a switching potential VW, and the first transistor M1 The second terminal is coupled to the input node NIN. The control terminal of the second transistor M2 is coupled to a third node N3, the first terminal of the second transistor M2 is coupled to a ground potential VSS (for example: 0V), and the second terminal of the second transistor M2 The terminal system is coupled to the second node N2. The first resistor R1 has a first end and a second end. The first end of the first resistor R1 is coupled to the controller 260 to receive a first clock potential VK1, and the first resistor R1 has a The second terminal is coupled to the first node N1. The first end of the second resistor R2 is coupled to the controller 260 to receive a second clock potential VK2, and the second end of the second resistor R2 is coupled to the third node N3. Because the first clock potential VK1 and the second clock potential VK2 have complementary logic levels, the first transistor M1 and the second transistor M2 also have complementary operation modes. For example, if the first transistor M1 is enabled, the second transistor M2 can be disabled, and if the first transistor M1 is disabled, the second transistor M2 can be enabled.

第一電容器C1之第一端係耦接至第一節點N1,而第一電容器C1之第二端係耦接至一第四節點N4。第二電容器C2之第一端係耦接至第三節點N3,而第二電容器C2之第二端係耦接至第四節點N4。第三電晶體M3之控制端係耦接控制器260以接收一第一控制電位VC1,第三電晶體M3之第一端係耦接至接地電位VSS,而第三電晶體M3之第二端係耦接至第四節點N4。第三電容器C3之第一端係耦接至第一節點N1,而第三電容器C3之第二端係耦接至一第五節點N5。第四電容器C4之第一端係耦接至第三節點N3,而第四電容器C4之第二端係耦接至第五節點N5。第四電晶體M4之控制端係耦接控制器260以接收一第二控制電位VC2,第四電晶體M4之第一端係耦接至接地電位VSS,而第四電晶體M4之第二端係耦接至第五節點N5。The first terminal of the first capacitor C1 is coupled to the first node N1, and the second terminal of the first capacitor C1 is coupled to a fourth node N4. The first end of the second capacitor C2 is coupled to the third node N3, and the second end of the second capacitor C2 is coupled to the fourth node N4. The control terminal of the third transistor M3 is coupled to the controller 260 to receive a first control potential VC1, the first terminal of the third transistor M3 is coupled to the ground potential VSS, and the second terminal of the third transistor M3 It is coupled to the fourth node N4. The first end of the third capacitor C3 is coupled to the first node N1, and the second end of the third capacitor C3 is coupled to a fifth node N5. The first end of the fourth capacitor C4 is coupled to the third node N3, and the second end of the fourth capacitor C4 is coupled to the fifth node N5. The control terminal of the fourth transistor M4 is coupled to the controller 260 to receive a second control potential VC2, the first terminal of the fourth transistor M4 is coupled to the ground potential VSS, and the second terminal of the fourth transistor M4 It is coupled to the fifth node N5.

諧振電路230包括一第五電容器C5、一第一電感器(Inductor)L1,以及一第二電感器L2,其中第二電感器L2可由變壓器240之一激磁電感值(Magnetizing Inductance)所貢獻,它可以不是一個獨立電路元件。第五電容器C5之第一端係耦接至第二節點N2以接收切換電位VW,而第五電容器C5之第二端係耦接至一第六節點N6。第一電感器L1之第一端係耦接至第六節點N6,而第一電感器L1之第二端係耦接至一第七節點N7以輸出一諧振電位VR。第二電感器L2之第一端係耦接至第七節點N7,而第二電感器L2之第二端係耦接至接地電位VSS。The resonant circuit 230 includes a fifth capacitor C5, a first inductor (Inductor) L1, and a second inductor L2. The second inductor L2 can be contributed by a magnetizing inductance of the transformer 240, which It may not be an independent circuit element. The first terminal of the fifth capacitor C5 is coupled to the second node N2 to receive the switching potential VW, and the second terminal of the fifth capacitor C5 is coupled to a sixth node N6. The first end of the first inductor L1 is coupled to the sixth node N6, and the second end of the first inductor L1 is coupled to a seventh node N7 to output a resonance potential VR. The first end of the second inductor L2 is coupled to the seventh node N7, and the second end of the second inductor L2 is coupled to the ground potential VSS.

變壓器240包括一主線圈241和一副線圈242,其中主線圈241可位於變壓器240之一側,而副線圈242則可位於變壓器240之相對另一側。主線圈241之第一端係耦接至第七節點N7以接收諧振電位VR,而主線圈241之第二端係耦接至接地電位VSS。副線圈242之第一端係耦接至一第八節點N8以輸出一變壓電位VT,而副線圈242之第二端係耦接至一第九節點N9。The transformer 240 includes a main coil 241 and a secondary coil 242. The primary coil 241 can be located on one side of the transformer 240 and the secondary coil 242 can be located on the opposite side of the transformer 240. The first end of the main coil 241 is coupled to the seventh node N7 to receive the resonance potential VR, and the second end of the main coil 241 is coupled to the ground potential VSS. The first end of the auxiliary coil 242 is coupled to an eighth node N8 to output a variable voltage VT, and the second end of the auxiliary coil 242 is coupled to a ninth node N9.

輸出整流器250包括一第一二極體(Diode)D1、一第二二極體D2、一第三二極體D3、一第四二極體D4、一第三電阻器R3,以及一第六電容器C6。第一二極體D1之陽極係耦接至第八節點N8以接收變壓電位VT,而第一二極體D1之陰極係耦接至輸出節點NOUT。第二二極體D2之陽極係耦接至第九節點N9,而第二二極體D2之陰極係耦接至輸出節點NOUT。第三二極體D3之陽極係耦接至一第十節點N10,而第三二極體D3之陰極係耦接至第八節點N8。第四二極體D4之陽極係耦接至第十節點N10,而第四二極體D4之陰極係耦接至第九節點N9。第三電阻器R3之第一端係耦接至第十節點N10以輸出一感測電位VE至控制器260,而第三電阻器R3之第二端係耦接至接地電位VSS。第六電容器C6之第一端係耦接至輸出節點NOUT,而第六電容器C6之第二端係耦接至接地電位VSS。The output rectifier 250 includes a first diode (Diode) D1, a second diode D2, a third diode D3, a fourth diode D4, a third resistor R3, and a sixth diode. Capacitor C6. The anode of the first diode D1 is coupled to the eighth node N8 to receive the variable voltage VT, and the cathode of the first diode D1 is coupled to the output node NOUT. The anode of the second diode D2 is coupled to the ninth node N9, and the cathode of the second diode D2 is coupled to the output node NOUT. The anode of the third diode D3 is coupled to a tenth node N10, and the cathode of the third diode D3 is coupled to the eighth node N8. The anode of the fourth diode D4 is coupled to the tenth node N10, and the cathode of the fourth diode D4 is coupled to the ninth node N9. The first end of the third resistor R3 is coupled to the tenth node N10 to output a sensing potential VE to the controller 260, and the second end of the third resistor R3 is coupled to the ground potential VSS. The first end of the sixth capacitor C6 is coupled to the output node NOUT, and the second end of the sixth capacitor C6 is coupled to the ground potential VSS.

電源供應器200之操作原理可如下列所述。電源供應器200可操作於一輕載模式或一重載模式。在輕載模式中,第一時脈電位VK1和第二時脈電位VK2可各自具有一輕載操作頻率FL,而在重載模式中,第一時脈電位VK1和第二時脈電位VK2可各自具有一重載操作頻率FH,其中輕載操作頻率FL可以高於重載操作頻率FH。例如,輕載操作頻率FL可約等於133kHz,而重載操作頻率FH可約等於90kHz,但亦不僅限於此。第一電阻器R1和第一電容器C1形成切換電路210之第一低通濾波器。第二電阻器R2和第二電容器C2形成切換電路210之第二低通濾波器。第一電阻器R1和第三電容器C3形成切換電路210之第三低通濾波器。第二電阻器R2和第四電容器C4形成切換電路210之第四低通濾波器。例如,前述濾波器可根據下列方程式(1)、(2)進行設定。The operating principle of the power supply 200 can be as follows. The power supply 200 can operate in a light load mode or a heavy load mode. In the light load mode, the first clock potential VK1 and the second clock potential VK2 can each have a light load operating frequency FL, while in the heavy load mode, the first clock potential VK1 and the second clock potential VK2 can be Each has a heavy-duty operating frequency FH, where the light-duty operating frequency FL can be higher than the heavy-duty operating frequency FH. For example, the light load operating frequency FL may be approximately equal to 133 kHz, and the heavy load operating frequency FH may be approximately equal to 90 kHz, but it is not limited to this. The first resistor R1 and the first capacitor C1 form a first low-pass filter of the switching circuit 210. The second resistor R2 and the second capacitor C2 form a second low-pass filter of the switching circuit 210. The first resistor R1 and the third capacitor C3 form the third low-pass filter of the switching circuit 210. The second resistor R2 and the fourth capacitor C4 form a fourth low-pass filter of the switching circuit 210. For example, the aforementioned filter can be set according to the following equations (1) and (2).

Figure 02_image001
………………………..(1)
Figure 02_image001
………………………..(1)

Figure 02_image003
………………………..(2) 其中「F1」代表第一低通濾波器和第二低通濾波器之每一者之低通截止頻率F1,「F2」代表第三低通濾波器和第四低通濾波器之每一者之低通截止頻率F2,「R1」代表第一電阻器R1之電阻值,「R2」代表第二電阻器R2之電阻值,「C1」代表第一電容器C1之電容值,「C2」代表第二電容器C2之電容值,「C3」代表第三電容器C3之電容值,「C4」代表第四電容器C4之電容值,「FH」代表電源供應器200之重載操作頻率FH,而「FL」代表電源供應器200之輕載操作頻率FL。
Figure 02_image003
……………………….. (2) where "F1" represents the low-pass cutoff frequency F1 of each of the first low-pass filter and the second low-pass filter, and "F2" represents the third lowest The low-pass cutoff frequency F2 of each of the pass filter and the fourth low-pass filter, "R1" represents the resistance value of the first resistor R1, "R2" represents the resistance value of the second resistor R2, "C1" Represents the capacitance value of the first capacitor C1, "C2" represents the capacitance value of the second capacitor C2, "C3" represents the capacitance value of the third capacitor C3, "C4" represents the capacitance value of the fourth capacitor C4, and "FH" represents the power supply The high-load operating frequency FH of the power supply 200, and "FL" represents the light-load operating frequency FL of the power supply 200.

由上可知,第一低通濾波器和第二低通濾波器之每一者之低通截止頻率F1可以大致等於電源供應器200之重載操作頻率FH,而第三低通濾波器和第四低通濾波器之每一者之低通截止頻率F2可以大致等於電源供應器200之輕載操作頻率FL。It can be seen from the above that the low-pass cut-off frequency F1 of each of the first low-pass filter and the second low-pass filter can be approximately equal to the heavy-duty operating frequency FH of the power supply 200, and the third low-pass filter and the first low-pass filter The low-pass cutoff frequency F2 of each of the four low-pass filters may be approximately equal to the light-load operating frequency FL of the power supply 200.

控制器260係用於偵測關於輸出整流器250之感測電位VE,其中控制器260係根據感測電位VE來決定第一控制電位VC1和第二控制電位VC2,以致能前述低通濾波器之一部份且禁能前述低通濾波器之其餘部份。控制器260可將感測電位VE與一臨界電位作比較。例如,當電源供應器200操作於輕載模式時,輸出整流器250之感測電位VE可等於一較低電位(因為輸出整流器250之輸出電流較小),而當電源供應器200操作於重載模式時,輸出整流器250之感測電位VE可等於一較高電位(因為輸出整流器250之輸出電流較大)。此時,前述之臨界電位可大致等於較低電位和較高電位兩者之平均值。在一些實施例中,若判斷感測電位VE低於臨界電位,則控制器260即輸出低邏輯位準之第一控制電位VC1和高邏輯位準之第二控制電位VC2以禁能第三電晶體M3且致能第四電晶體M4,此時,僅有第三低通濾波器和第四低通濾波器被致能,而第一低通濾波器和第二低通濾波器則被禁能,故第三低通濾波器和第四低通濾波器之低通截止頻率F2可套用至電源供應器200;反之,若判斷感測電位VE高於或等於臨界電位,則控制器260即輸出高邏輯位準之第一控制電位VC1和低邏輯位準之第二控制電位VC2以致能第三電晶體M3且禁能第四電晶體M4,此時,僅有第一低通濾波器和第二低通濾波器被致能,而第三低通濾波器和第四低通濾波器則被禁能,故第一低通濾波器和第二低通濾波器之低通截止頻率F1可套用至電源供應器200。The controller 260 is used to detect the sensed potential VE of the output rectifier 250, wherein the controller 260 determines the first control potential VC1 and the second control potential VC2 according to the sensed potential VE, so as to enable the aforementioned low-pass filter Part and disable the rest of the aforementioned low-pass filter. The controller 260 can compare the sensing potential VE with a threshold potential. For example, when the power supply 200 is operating in the light load mode, the sensed potential VE of the output rectifier 250 may be equal to a lower potential (because the output current of the output rectifier 250 is relatively small), and when the power supply 200 is operated in a heavy load In the mode, the sensed potential VE of the output rectifier 250 can be equal to a higher potential (because the output current of the output rectifier 250 is larger). At this time, the aforementioned critical potential may be approximately equal to the average value of both the lower potential and the higher potential. In some embodiments, if it is determined that the sensing potential VE is lower than the critical potential, the controller 260 outputs the first control potential VC1 at a low logic level and the second control potential VC2 at a high logic level to disable the third power. Crystal M3 and the fourth transistor M4 are enabled. At this time, only the third low-pass filter and the fourth low-pass filter are enabled, while the first low-pass filter and the second low-pass filter are disabled. Yes, so the low-pass cutoff frequency F2 of the third low-pass filter and the fourth low-pass filter can be applied to the power supply 200; conversely, if it is determined that the sensed potential VE is higher than or equal to the critical potential, the controller 260 is Output the first control potential VC1 of the high logic level and the second control potential VC2 of the low logic level to enable the third transistor M3 and disable the fourth transistor M4. At this time, only the first low-pass filter and The second low-pass filter is enabled, and the third low-pass filter and the fourth low-pass filter are disabled. Therefore, the low-pass cutoff frequency F1 of the first low-pass filter and the second low-pass filter can be Apply to the power supply 200.

第3圖係顯示根據本發明一實施例所述之電源供應器200之輸出增益之頻率響應圖,其中橫軸代表操作頻率(MHz),而縱軸代表輸出增益(dB)。若操作頻率趨近於0,則電源供應器200可具有一低頻最大增益GL。根據第3圖之量測結果,當電源供應器200操作於重載模式時(如一第一曲線CC1所示),只有第一低通濾波器和第二低通濾波器被致能以濾除高於重載操作頻率FH(亦即,低通截止頻率F1)之輸入雜訊,而當電源供應器200操作於輕載模式時(如一第二曲線CC2所示),只有第三低通濾波器和第四低通濾波器被致能以濾除高於輕載操作頻率FL(亦即,低通截止頻率F2)之輸入雜訊。在此設計下,無論是輕載模式或是重載模式,第一時脈電位VK1和第二時脈電位VK2之倍頻切換雜訊皆無法通過切換電路210,故電源供應器200之電磁干擾之測試結果可獲得大幅改善。Figure 3 shows a frequency response diagram of the output gain of the power supply 200 according to an embodiment of the present invention, where the horizontal axis represents the operating frequency (MHz), and the vertical axis represents the output gain (dB). If the operating frequency approaches 0, the power supply 200 can have a low frequency maximum gain GL. According to the measurement results in Figure 3, when the power supply 200 is operating in the heavy load mode (as shown by a first curve CC1), only the first low-pass filter and the second low-pass filter are enabled to filter out Input noise higher than the heavy-load operating frequency FH (ie, low-pass cut-off frequency F1), and when the power supply 200 is operating in light-load mode (as shown by a second curve CC2), only the third low-pass filter The filter and the fourth low-pass filter are enabled to filter out input noise higher than the light-load operating frequency FL (ie, the low-pass cut-off frequency F2). Under this design, no matter in the light load mode or the heavy load mode, the double-frequency switching noise of the first clock potential VK1 and the second clock potential VK2 cannot pass through the switching circuit 210, so the electromagnetic interference of the power supply 200 The test results can be greatly improved.

在一些實施例中,電源供應器200之元件參數可如下列所述。第一電阻器R1之電阻值可介於0.9kΩ至1.1kΩ之間,較佳為1kΩ。第二電阻器R2之電阻值可介於0.9kΩ至1.1kΩ之間,較佳為1kΩ。第三電阻器R3之電阻值可介於0.18Ω至0.22Ω之間,較佳為0.2Ω。第一電容器C1之電容值可介於1.42nF至2.12nF之間,較佳為1.77nF。第二電容器C2之電容值可介於1.42nF至2.12nF之間,較佳為1.77nF。第三電容器C3之電容值可介於0.96nF至1.44nF之間,較佳為1.2nF。第四電容器C4之電容值可介於0.96nF至1.44nF之間,較佳為1.2nF。第五電容器C5之電容值可介於176pF至264pF之間,較佳為220pF。第六電容器C6之電容值可介於1200μF至1800μF之間,較佳為1500μF。第一電感器L1之電感值可介於34.47μH至42.13μH之間,較佳為38.3μH。第二電感器L2之電感值可介於5.88mH至7.18mH之間,較佳為6.53mH。主線圈241對副線圈242之匝數比值可介於10至30之間,較佳為20。當電源供應器200操作於輕載模式時,輸出整流器250之感測電位VE可約等於0.04V,而電源供應器200之輕載操作頻率FL可約等於133kHz。當電源供應器200操作於重載模式時,輸出整流器250之感測電位VE可約等於3.4V,而電源供應器200之重載操作頻率FH可約等於90kHz。與感測電位VE相比較之臨界電位可大致等於1.7V。以上參數範圍係根據多次實驗結果而得出,其有助於最佳化電源供應器200之轉換效率和雜訊抑制功效。In some embodiments, the component parameters of the power supply 200 may be as described below. The resistance value of the first resistor R1 may be between 0.9kΩ and 1.1kΩ, preferably 1kΩ. The resistance value of the second resistor R2 may be between 0.9kΩ and 1.1kΩ, preferably 1kΩ. The resistance value of the third resistor R3 can be between 0.18Ω and 0.22Ω, preferably 0.2Ω. The capacitance value of the first capacitor C1 can be between 1.42nF and 2.12nF, preferably 1.77nF. The capacitance value of the second capacitor C2 can be between 1.42nF and 2.12nF, preferably 1.77nF. The capacitance value of the third capacitor C3 can be between 0.96 nF and 1.44 nF, preferably 1.2 nF. The capacitance value of the fourth capacitor C4 can be between 0.96 nF and 1.44 nF, preferably 1.2 nF. The capacitance value of the fifth capacitor C5 may be between 176 pF and 264 pF, preferably 220 pF. The capacitance value of the sixth capacitor C6 can be between 1200 μF and 1800 μF, preferably 1500 μF. The inductance value of the first inductor L1 can be between 34.47 μH and 42.13 μH, preferably 38.3 μH. The inductance value of the second inductor L2 can be between 5.88 mH and 7.18 mH, preferably 6.53 mH. The ratio of the number of turns of the primary coil 241 to the secondary coil 242 can be between 10 and 30, preferably 20. When the power supply 200 is operating in the light-load mode, the sensed potential VE of the output rectifier 250 may be approximately equal to 0.04V, and the light-load operating frequency FL of the power supply 200 may be approximately equal to 133kHz. When the power supply 200 is operating in the heavy load mode, the sensed potential VE of the output rectifier 250 may be approximately equal to 3.4V, and the heavy load operating frequency FH of the power supply 200 may be approximately equal to 90 kHz. The critical potential compared with the sensing potential VE may be approximately equal to 1.7V. The above parameter range is obtained based on the results of many experiments, which helps to optimize the conversion efficiency and noise suppression effect of the power supply 200.

本發明提出一種新穎之電源供應器,其包括使用複數個低通濾波器之切換電路。根據實際量測結果,前述低通濾波器可有效消除電源供應器之倍頻切換雜訊,以符合國際電工委員會之規範。大致而言,本發明之電源供應器可明顯改善電磁干擾之測試結果,故其很適合應用於各種各式之電子裝置當中。The present invention proposes a novel power supply, which includes a switching circuit using a plurality of low-pass filters. According to the actual measurement results, the aforementioned low-pass filter can effectively eliminate the frequency multiplication switching noise of the power supply, so as to comply with the specifications of the International Electrotechnical Commission. Generally speaking, the power supply of the present invention can significantly improve the test results of electromagnetic interference, so it is very suitable for application in various types of electronic devices.

值得注意的是,以上所述之電位、電流、電阻值、電感值、電容值,以及其餘元件參數均非為本發明之限制條件。設計者可以根據不同需要調整這些設定值。本發明之電源供應器並不僅限於第1-3圖所圖示之狀態。本發明可以僅包括第1-3圖之任何一或複數個實施例之任何一或複數項特徵。換言之,並非所有圖示之特徵均須同時實施於本發明之電源供應器當中。雖然本發明之實施例係使用金氧半場效電晶體(Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET)為例,但本發明並不僅限於此,本技術領域人士可改用其他種類之電晶體,例如:接面場效電晶體(Junction Gate Field Effect Transistor,JFET),或是鰭式場效電晶體(Fin Field Effect Transistor,FinFET)等等,而不致於影響本發明之效果。It is worth noting that the above-mentioned potential, current, resistance value, inductance value, capacitance value, and other component parameters are not the limiting conditions of the present invention. The designer can adjust these settings according to different needs. The power supply of the present invention is not limited to the state shown in Figures 1-3. The present invention may only include any one or more of the features of any one or more of the embodiments shown in FIGS. 1-3. In other words, not all the features shown in the figures need to be implemented in the power supply of the present invention at the same time. Although the embodiment of the present invention uses Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) as an example, the present invention is not limited to this, and those skilled in the art can use other types of transistors instead. For example: Junction Gate Field Effect Transistor (JFET), or Fin Field Effect Transistor (Fin Field Effect Transistor, FinFET), etc., without affecting the effect of the present invention.

在本說明書以及申請專利範圍中的序數,例如「第一」、「第二」、「第三」等等,彼此之間並沒有順序上的先後關係,其僅用於標示區分兩個具有相同名字之不同元件。The ordinal numbers in this specification and the scope of the patent application, such as "first", "second", "third", etc., do not have a sequential relationship with each other, and they are only used to distinguish two having the same Different components of the name.

本發明雖以較佳實施例揭露如上,然其並非用以限定本發明的範圍,任何熟習此項技藝者,在不脫離本發明之精神和範圍內,當可做些許的更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention is disclosed as above in the preferred embodiment, it is not intended to limit the scope of the present invention. Anyone who is familiar with the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The scope of protection of the present invention shall be subject to those defined by the attached patent scope.

100、200~電源供應器; 110、210~切換電路; 120-1、120-2、…、120-N~低通濾波器; 130、230~諧振電路; 140、240~變壓器; 150、250~輸出整流器; 160、260~控制器; 241~主線圈; 242~副線圈; C1~第一電容器; C2~第二電容器; C3~第三電容器; C4~第四電容器; C5~第五電容器; C6~第六電容器; CC1~第一曲線; CC2~第二曲線; D1~第一二極體; D2~第二二極體; D3~第三二極體; D4~第四二極體; F1、F2~低通截止頻率; FH~重載操作頻率; FL~輕載操作頻率; GL~低頻最大增益; L1~第一電感器; L2~第二電感器; M1~第一電晶體; M2~第二電晶體; M3~第三電晶體; M4~第四電晶體; N1~第一節點; N2~第二節點; N3~第三節點; N4~第四節點; N5~第五節點; N6~第六節點; N7~第七節點; N8~第八節點; N9~第九節點; N10~第十節點; NIN~輸入節點; NOUT~輸出節點; R1~第一電阻器; R2~第二電阻器; R3~第三電阻器; VC1~第一控制電位; VC2~第二控制電位; VE~感測電位; VIN~輸入電位; VK1~第一時脈電位; VK2~第二時脈電位; VOUT~輸出電位; VR~諧振電位; VSS~接地電位; VT~變壓電位; VW~切換電位。100,200~power supply; 110,210~switching circuit; 120-1,120-2,...,120-N~low pass filter; 130,230~resonant circuit; 140,240~transformer; 150,250 ~Output rectifier; 160,260~controller; 241~main coil; 242~secondary coil; C1~first capacitor; C2~second capacitor; C3~third capacitor; C4~fourth capacitor; C5~fifth capacitor ; C6 ~ sixth capacitor; CC1 ~ first curve; CC2 ~ second curve; D1 ~ first diode; D2 ~ second diode; D3 ~ third diode; D4 ~ fourth diode ; F1, F2~low-pass cutoff frequency; FH~heavy load operating frequency; FL~light load operating frequency; GL~low frequency maximum gain; L1~first inductor; L2~second inductor; M1~first transistor ; M2 ~ second transistor; M3 ~ third transistor; M4 ~ fourth transistor; N1 ~ first node; N2 ~ second node; N3 ~ third node; N4 ~ fourth node; N5 ~ fifth Node; N6~6th node; N7~7th node; N8~8th node; N9~9th node; N10~10th node; NIN~input node; NOUT~output node; R1~first resistor; R2 ~ Second resistor; R3 ~ third resistor; VC1 ~ first control potential; VC2 ~ second control potential; VE ~ sensing potential; VIN ~ input potential; VK1 ~ first clock potential; VK2 ~ second Clock potential; VOUT~output potential; VR~resonant potential; VSS~ground potential; VT~variable electric potential; VW~switching potential.

第1圖係顯示根據本發明一實施例所述之電源供應器之示意圖。 第2圖係顯示根據本發明一實施例所述之電源供應器之示意圖。 第3圖係顯示根據本發明一實施例所述之電源供應器之輸出增益之頻率響應圖。Fig. 1 is a schematic diagram of a power supply according to an embodiment of the invention. FIG. 2 is a schematic diagram of the power supply according to an embodiment of the invention. Figure 3 is a diagram showing the frequency response of the output gain of the power supply according to an embodiment of the present invention.

100~電源供應器; 110~切換電路; 120-1、120-2、…、120-N~低通濾波器; 130~諧振電路; 140~變壓器; 150~輸出整流器; 160~控制器; VC1~第一控制電位; VC2~第二控制電位; VE~感測電位; VIN~輸入電位; VK1~第一時脈電位; VK2~第二時脈電位; VOUT~輸出電位; VR~諧振電位; VT~變壓電位; VW~切換電位。100~power supply; 110~switching circuit; 120-1, 120-2,...,120-N~low pass filter; 130~resonant circuit; 140~transformer; 150~output rectifier; 160~controller; VC1 ~first control potential; VC2~second control potential; VE~sensing potential; VIN~input potential; VK1~first clock potential; VK2~second clock potential; VOUT~output potential; VR~resonance potential; VT~Variable electric potential; VW~Switching potential.

Claims (8)

一種電源供應器,包括:一切換電路,包括複數個低通濾波器,其中該切換電路係根據一輸入電位、一第一時脈電位、一第二時脈電位、一第一控制電位,以及一第二控制電位來產生一切換電位;一諧振電路,根據該切換電位來產生一諧振電位;一變壓器,根據該諧振電位來產生一變壓電位;一輸出整流器,根據該變壓電位來產生一輸出電位;以及一控制器,偵測關於該輸出整流器之一感測電位,其中該控制器係根據該感測電位來決定該第一控制電位和該第二控制電位,以致能該等低通濾波器之一部份且禁能該等低通濾波器之其餘部份;其中該切換電路包括:一第一電晶體,具有一控制端、一第一端,以及一第二端,其中該第一電晶體之該控制端係耦接至一第一節點,該第一電晶體之該第一端係耦接至一第二節點以輸出該切換電位,而該第一電晶體之該第二端係耦接至一輸入節點以接收該輸入電位;一第二電晶體,具有一控制端、一第一端,以及一第二端,其中該第二電晶體之該控制端係耦接至一第三節點,該第二電晶體之該第一端係耦接至一接地電位,而該第二電晶體之該第二端係耦接至該第二節點;一第一電阻器,具有一第一端和一第二端,其中該第一電阻器之該第一端係耦接至該控制器以接收該第一時脈電位,而該第一電 阻器之該第二端係耦接至該第一節點;以及一第二電阻器,具有一第一端和一第二端,其中該第二電阻器之該第一端係耦接至該控制器以接收該第二時脈電位,而該第二電阻器之該第二端係耦接至該第三節點。 A power supply includes: a switching circuit including a plurality of low-pass filters, wherein the switching circuit is based on an input potential, a first clock potential, a second clock potential, a first control potential, and A second control potential generates a switching potential; a resonant circuit generates a resonant potential based on the switching potential; a transformer generates a variable voltage potential based on the resonant potential; an output rectifier generates a variable voltage based on the variable potential An output potential; and a controller for detecting a sensing potential of the output rectifier, wherein the controller determines the first control potential and the second control potential according to the sensing potential so as to enable the low Part of the pass filter and disable the rest of the low-pass filters; wherein the switching circuit includes: a first transistor having a control terminal, a first terminal, and a second terminal, wherein The control terminal of the first transistor is coupled to a first node, the first terminal of the first transistor is coupled to a second node to output the switching potential, and the first transistor of the The second terminal is coupled to an input node to receive the input potential; a second transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is coupled Connected to a third node, the first end of the second transistor is coupled to a ground potential, and the second end of the second transistor is coupled to the second node; a first resistor , Having a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the controller to receive the first clock potential, and the first electrical The second end of the resistor is coupled to the first node; and a second resistor having a first end and a second end, wherein the first end of the second resistor is coupled to the The controller receives the second clock potential, and the second terminal of the second resistor is coupled to the third node. 如申請專利範圍第1項所述之電源供應器,其中該切換電路更包括:一第一電容器,具有一第一端和一第二端,其中該第一電容器之該第一端係耦接至該第一節點,而該第一電容器之該第二端係耦接至一第四節點;一第二電容器,具有一第一端和一第二端,其中該第二電容器之該第一端係耦接至該第三節點,而該第二電容器之該第二端係耦接至該第四節點;以及一第三電晶體,具有一控制端、一第一端,以及一第二端,其中該第三電晶體之該控制端係耦接該控制器以接收該第一控制電位,該第三電晶體之該第一端係耦接至該接地電位,而該第三電晶體之該第二端係耦接至該第四節點。 The power supply described in claim 1, wherein the switching circuit further includes: a first capacitor having a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled To the first node, and the second terminal of the first capacitor is coupled to a fourth node; a second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor Terminal is coupled to the third node, and the second terminal of the second capacitor is coupled to the fourth node; and a third transistor having a control terminal, a first terminal, and a second Terminal, wherein the control terminal of the third transistor is coupled to the controller to receive the first control potential, the first terminal of the third transistor is coupled to the ground potential, and the third transistor The second end is coupled to the fourth node. 如申請專利範圍第2項所述之電源供應器,其中該切換電路更包括:一第三電容器,具有一第一端和一第二端,其中該第三電容器之該第一端係耦接至該第一節點,而該第三電容器之該第二端係耦接至一第五節點;一第四電容器,具有一第一端和一第二端,其中該第四電容器 之該第一端係耦接至該第三節點,而該第四電容器之該第二端係耦接至該第五節點;以及一第四電晶體,具有一控制端、一第一端,以及一第二端,其中該第四電晶體之該控制端係耦接該控制器以接收該第二控制電位,該第四電晶體之該第一端係耦接至該接地電位,而該第四電晶體之該第二端係耦接至該第五節點。 The power supply described in claim 2 wherein the switching circuit further includes: a third capacitor having a first terminal and a second terminal, wherein the first terminal of the third capacitor is coupled To the first node, and the second end of the third capacitor is coupled to a fifth node; a fourth capacitor having a first end and a second end, wherein the fourth capacitor The first terminal is coupled to the third node, and the second terminal of the fourth capacitor is coupled to the fifth node; and a fourth transistor has a control terminal and a first terminal, And a second terminal, wherein the control terminal of the fourth transistor is coupled to the controller to receive the second control potential, the first terminal of the fourth transistor is coupled to the ground potential, and the The second terminal of the fourth transistor is coupled to the fifth node. 如申請專利範圍第3項所述之電源供應器,其中若該感測電位低於一臨界電位,則該控制器即禁能該第三電晶體且致能該第四電晶體,而若該感測電位高於或等於該臨界電位,則該控制器即致能該第三電晶體且禁能該第四電晶體。 For example, in the power supply described in item 3 of the scope of patent application, if the sensing potential is lower than a critical potential, the controller disables the third transistor and enables the fourth transistor, and if the sensing potential is lower than a threshold potential, the controller disables the third transistor and enables the fourth transistor. If the sensing potential is higher than or equal to the threshold potential, the controller enables the third transistor and disables the fourth transistor. 如申請專利範圍第3項所述之電源供應器,其中該電源供應器具有一輕載操作頻率和一重載操作頻率,該第一電阻器和該第一電容器形成一第一低通濾波器,該第二電阻器和該第二電容器形成一第二低通濾波器,該第一電阻器和該第三電容器形成一第三低通濾波器,該第二電阻器和該第四電容器形成一第四低通濾波器,該第一低通濾波器和該第二低通濾波器之每一者之低通截止頻率係大致等於該重載操作頻率,而該第三低通濾波器和該第四低通濾波器之每一者之低通截止頻率係大致等於該輕載操作頻率。 The power supply according to item 3 of the scope of patent application, wherein the power supply has a light-load operating frequency and a heavy-load operating frequency, the first resistor and the first capacitor form a first low-pass filter, The second resistor and the second capacitor form a second low-pass filter, the first resistor and the third capacitor form a third low-pass filter, and the second resistor and the fourth capacitor form a The fourth low-pass filter, the low-pass cutoff frequency of each of the first low-pass filter and the second low-pass filter is approximately equal to the heavy-duty operating frequency, and the third low-pass filter and the The low-pass cutoff frequency of each of the fourth low-pass filters is approximately equal to the light-load operating frequency. 如申請專利範圍第3項所述之電源供應器,其中該諧振電路包括:一第五電容器,具有一第一端和一第二端,其中該第五電容器之該第一端係耦接至該第二節點以接收該切換電位,而該第五電容 器之該第二端係耦接至一第六節點;一第一電感器,具有一第一端和一第二端,其中該第一電感器之該第一端係耦接至該第六節點,而該第一電感器之該第二端係耦接至一第七節點以輸出該諧振電位;以及一第二電感器,具有一第一端和一第二端,其中該第二電感器之該第一端係耦接至該第七節點,而該第二電感器之該第二端係耦接至該接地電位。 The power supply of claim 3, wherein the resonance circuit includes: a fifth capacitor having a first end and a second end, wherein the first end of the fifth capacitor is coupled to The second node receives the switching potential, and the fifth capacitor The second end of the inductor is coupled to a sixth node; a first inductor has a first end and a second end, wherein the first end of the first inductor is coupled to the sixth node Node, and the second terminal of the first inductor is coupled to a seventh node to output the resonance potential; and a second inductor having a first terminal and a second terminal, wherein the second inductor The first terminal of the device is coupled to the seventh node, and the second terminal of the second inductor is coupled to the ground potential. 如申請專利範圍第6項所述之電源供應器,其中該變壓器包括:一主線圈,具有一第一端和一第二端,其中該主線圈之該第一端係耦接至該第七節點以接收該諧振電位,而該主線圈之該第二端係耦接至該接地電位;以及一副線圈,具有一第一端和一第二端,其中該副線圈之該第一端係耦接至一第八節點以輸出該變壓電位,而該副線圈之該第二端係耦接至一第九節點。 The power supply according to claim 6, wherein the transformer includes: a main coil having a first end and a second end, wherein the first end of the main coil is coupled to the seventh Node to receive the resonance potential, and the second end of the main coil is coupled to the ground potential; and a secondary coil having a first end and a second end, wherein the first end of the secondary coil is It is coupled to an eighth node to output the variable voltage potential, and the second end of the auxiliary coil is coupled to a ninth node. 如申請專利範圍第7項所述之電源供應器,其中該輸出整流器包括:一第一二極體,具有一陽極和一陰極,其中該第一二極體之該陽極係耦接至該第八節點以接收該變壓電位,而該第一二極體之該陰極係耦接至一輸出節點以輸出該輸出電位;一第二二極體,具有一陽極和一陰極,其中該第二二極體之該陽極係耦接至該第九節點,而該第二二極體之該陰極係耦接至該輸 出節點;一第三二極體,具有一陽極和一陰極,其中該第三二極體之該陽極係耦接至一第十節點,而該第三二極體之該陰極係耦接至該第八節點;一第四二極體,具有一陽極和一陰極,其中該第四二極體之該陽極係耦接至該第十節點,而該第四二極體之該陰極係耦接至該第九節點;一第三電阻器,具有一第一端和一第二端,其中該第三電阻器之該第一端係耦接至該第十節點以輸出該感測電位至該控制器,而該第三電阻器之該第二端係耦接至該接地電位;以及一第六電容器,具有一第一端和一第二端,其中該第六電容器之該第一端係耦接至該輸出節點,而該第六電容器之該第二端係耦接至該接地電位。 The power supply according to claim 7, wherein the output rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to the first diode Eight nodes are used to receive the variable voltage potential, and the cathode of the first diode is coupled to an output node to output the output potential; a second diode has an anode and a cathode, wherein the second diode The anode of the diode is coupled to the ninth node, and the cathode of the second diode is coupled to the output Out node; a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to a tenth node, and the cathode of the third diode is coupled to The eighth node; a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the tenth node, and the cathode of the fourth diode is coupled Connected to the ninth node; a third resistor having a first end and a second end, wherein the first end of the third resistor is coupled to the tenth node to output the sensing potential to The controller, and the second terminal of the third resistor is coupled to the ground potential; and a sixth capacitor having a first terminal and a second terminal, wherein the first terminal of the sixth capacitor Is coupled to the output node, and the second end of the sixth capacitor is coupled to the ground potential.
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US8742674B2 (en) * 2006-01-20 2014-06-03 Point Somee Limited Liability Company Adaptive current regulation for solid state lighting
US20140159602A1 (en) * 2012-12-07 2014-06-12 Toshiba Lighting And Technology Corporation Power supply circuit and luminaire
TWI568166B (en) * 2015-11-26 2017-01-21 A High Efficiency LLC Resonant Converter with Secondary Side Synchronous Rectifier Blind Control
TWI638506B (en) * 2014-03-17 2018-10-11 美商半導體組件工業公司 Method of operating a controller for an llc resonant converter, semiconductor product including control circuitry for a resonant converter and resonant converter

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8742674B2 (en) * 2006-01-20 2014-06-03 Point Somee Limited Liability Company Adaptive current regulation for solid state lighting
US20140159602A1 (en) * 2012-12-07 2014-06-12 Toshiba Lighting And Technology Corporation Power supply circuit and luminaire
TWI638506B (en) * 2014-03-17 2018-10-11 美商半導體組件工業公司 Method of operating a controller for an llc resonant converter, semiconductor product including control circuitry for a resonant converter and resonant converter
TWI568166B (en) * 2015-11-26 2017-01-21 A High Efficiency LLC Resonant Converter with Secondary Side Synchronous Rectifier Blind Control

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