TWI567833B - Method of manufacturing wafers - Google Patents

Method of manufacturing wafers Download PDF

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Publication number
TWI567833B
TWI567833B TW103120720A TW103120720A TWI567833B TW I567833 B TWI567833 B TW I567833B TW 103120720 A TW103120720 A TW 103120720A TW 103120720 A TW103120720 A TW 103120720A TW I567833 B TWI567833 B TW I567833B
Authority
TW
Taiwan
Prior art keywords
wafer
bonded
base
film
thickness
Prior art date
Application number
TW103120720A
Other languages
English (en)
Chinese (zh)
Other versions
TW201511141A (zh
Inventor
小林德弘
阿賀浩司
Original Assignee
信越半導體股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 信越半導體股份有限公司 filed Critical 信越半導體股份有限公司
Publication of TW201511141A publication Critical patent/TW201511141A/zh
Application granted granted Critical
Publication of TWI567833B publication Critical patent/TWI567833B/zh

Links

Classifications

    • H10P90/1916
    • H10P74/203
    • H10P90/16
    • H10P95/112
    • H10P95/90
    • H10W10/181

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Element Separation (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
TW103120720A 2013-06-26 2014-06-16 Method of manufacturing wafers TWI567833B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013133868A JP5888286B2 (ja) 2013-06-26 2013-06-26 貼り合わせウェーハの製造方法

Publications (2)

Publication Number Publication Date
TW201511141A TW201511141A (zh) 2015-03-16
TWI567833B true TWI567833B (zh) 2017-01-21

Family

ID=52141364

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103120720A TWI567833B (zh) 2013-06-26 2014-06-16 Method of manufacturing wafers

Country Status (8)

Country Link
US (1) US9859149B2 (enExample)
EP (1) EP3016133B1 (enExample)
JP (1) JP5888286B2 (enExample)
KR (1) KR102095383B1 (enExample)
CN (1) CN105283943B (enExample)
SG (1) SG11201510639QA (enExample)
TW (1) TWI567833B (enExample)
WO (1) WO2014207988A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6136786B2 (ja) * 2013-09-05 2017-05-31 信越半導体株式会社 貼り合わせウェーハの製造方法
JP6822146B2 (ja) 2015-01-16 2021-01-27 住友電気工業株式会社 半導体基板の製造方法及び複合半導体基板の製造方法
US20180033609A1 (en) * 2016-07-28 2018-02-01 QMAT, Inc. Removal of non-cleaved/non-transferred material from donor substrate
JP6686962B2 (ja) * 2017-04-25 2020-04-22 信越半導体株式会社 貼り合わせウェーハの製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060118935A1 (en) * 2003-04-02 2006-06-08 Eiji Kamiyama Laminated semiconductor substrate process for producing the same
US20080124929A1 (en) * 2005-11-28 2008-05-29 Hidehiko Okuda Process for Regenerating Layer Transferred Wafer and Layer Transferred Wafer Regenerated by the Process

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4963505A (en) * 1987-10-27 1990-10-16 Nippondenso Co., Ltd. Semiconductor device and method of manufacturing same
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP3943782B2 (ja) 1999-11-29 2007-07-11 信越半導体株式会社 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ
DE602005025237D1 (de) 2004-10-11 2011-01-20 Meadwestvaco Corp Schiebekarte für kindersichere verpackung
ATE420461T1 (de) 2004-11-09 2009-01-15 Soitec Silicon On Insulator Verfahren zum herstellen von zusammengesetzten wafern
JP5314838B2 (ja) * 2006-07-14 2013-10-16 信越半導体株式会社 剥離ウェーハを再利用する方法
JP5799740B2 (ja) * 2011-10-17 2015-10-28 信越半導体株式会社 剥離ウェーハの再生加工方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060118935A1 (en) * 2003-04-02 2006-06-08 Eiji Kamiyama Laminated semiconductor substrate process for producing the same
US20080124929A1 (en) * 2005-11-28 2008-05-29 Hidehiko Okuda Process for Regenerating Layer Transferred Wafer and Layer Transferred Wafer Regenerated by the Process

Also Published As

Publication number Publication date
US9859149B2 (en) 2018-01-02
JP2015012009A (ja) 2015-01-19
KR102095383B1 (ko) 2020-03-31
EP3016133B1 (en) 2020-01-15
JP5888286B2 (ja) 2016-03-16
EP3016133A1 (en) 2016-05-04
SG11201510639QA (en) 2016-01-28
KR20160023712A (ko) 2016-03-03
CN105283943A (zh) 2016-01-27
WO2014207988A1 (ja) 2014-12-31
CN105283943B (zh) 2018-05-08
US20160118294A1 (en) 2016-04-28
TW201511141A (zh) 2015-03-16
EP3016133A4 (en) 2017-03-01

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