TWI535199B - 運算放大器 - Google Patents
運算放大器 Download PDFInfo
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- TWI535199B TWI535199B TW103117201A TW103117201A TWI535199B TW I535199 B TWI535199 B TW I535199B TW 103117201 A TW103117201 A TW 103117201A TW 103117201 A TW103117201 A TW 103117201A TW I535199 B TWI535199 B TW I535199B
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
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- H—ELECTRICITY
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
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- H03F3/3001—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor with field-effect transistors
- H03F3/3022—CMOS common source output SEPP amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/366—Multiple MOSFETs are coupled in parallel
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45154—Indexing scheme relating to differential amplifiers the bias at the input of the amplifying transistors being controlled
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45702—Indexing scheme relating to differential amplifiers the LC comprising two resistors
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Description
本發明係指一種運算放大器,尤指一種使用空乏型金氧半場效應電晶體(metal-oxide-semiconductor field effect transistor,MOSFET)做為輸入對,而可僅使用一組輸入對達到軌對軌(Rail to Rail)輸出電壓而節省電路面積的運算放大器。
運算放大器是一種具有廣泛應用的電路基本構築區塊。電路設計者常可使用運算放大器來實現許多種不同的運作功能。例如,在液晶顯示器之驅動電路中,運算放大器可作為一輸出緩衝器,其依據前級數位至類比轉換器所輸出之類比訊號,對負載(即液晶)進行充放電,以驅動液晶顯示器上相對應的畫素單元。
一般來說,在傳統驅動晶片中所運用的運算放大器通常為二級結構的放大器,其包含有一第一級放大電路(輸入級)以及一第二級輸出電路(輸出級)。傳統運算放大器中之第一級放大電路係用來提高該運算放大器的增益(Gain),而第二級輸出電路則用來推動運算放大器所連接的電容性或是電阻性負載。然而,傳統運算放大器具有迴路穩定度(Loop Stability)不足的問題,因此習知運算放大器會藉由一米勒補償(Miller Compensation)電容進行頻率補償,以達到穩定迴路的效果。
此外,由於P型輸入對及N型輸入對僅能分別適用於特定操作電
壓範圍,因此習知運算放大器為達到軌對軌(Rail to Rail)輸出電壓,通常係以P型輸入對結合N型輸入對結合做為輸入級。舉例來說,請參考第1A圖及第1B圖,第1A圖為習知一運算放大器10之部分示意圖,而第1B圖為第1A圖中運算放大器10之操作電壓示意圖。如第1A圖所示,運算放大器10包含有一輸入對100、102、主動負載104、106以及偏壓源108、110,其中,P型輸入對100包含有P型增強型(enhancement)金氧半場效應電晶體MP1、MP2,N型輸入對102包含有N型增強型金氧半場效應電晶體MN1、MN2,而輸入對100、102接收輸入電壓In+、In-使運算放大器10據以產生輸出電壓。
在此情況下,如第1A圖及及第1B圖所示,若電晶體MP2欲導通進行操作,則一系統電壓VDD減去偏壓源108之一導通電壓VDsat及電晶體MP2之一門檻電壓(threshold voltage)之相反值(即P型增強型電晶體中門檻電壓為閘源極電壓差且為負值,一源閘極電壓差VSG需大於門檻電壓之相反值以進行導通)需大於輸入電壓In+,電晶體MP1亦具有相同操作條件,因此P型輸入對100僅能於一範圍CMP導通進行操作;相似地,若電晶體MN2欲導通進行操作,則輸入電壓In+減去電晶體MN2之一門檻電壓(即一門檻電壓為正值,一閘源極電壓差VGS需大於門檻電壓以進行導通)及偏壓源110之一導通電壓VDsat需大於一接地準位GND(即0V),電晶體MN1亦具有相同操作條件,因此N型輸入對102僅能於一範圍CMN導通進行操作。如此一來,由於運算放大器10同時具有P型輸入對100及N型輸入對102於範圍CMP、CMN導通進行操作,因此運算放大器10可操作於一全範圍VCM而具有軌對軌輸出電壓。
然而,習知運算放大器10需同時具有P型輸入對100及N型輸入對102,需要較大的電路面積。因此,習知技術實有改進之必要。
因此,本發明之主要目的即在於提供一種使用空乏型金氧半場效應電晶體做為輸入對,而可僅使用一組輸入對達到軌對軌輸出電壓而節省電路面積的運算放大器。
本發明揭露一種運算放大器。該運算放大器包含有一第一金氧半場效應電晶體,包含有一第一汲極、一第一閘極以及一第一源極;一第二金氧半場效應電晶體,包含有一第二汲極、一第二閘極以及一第二源極,該第二源極耦接於該第一金氧半場效應電晶體之該第一源極;以及一偏壓源,耦接於該第一金氧半場效應電晶體之該第一源極及該第二金氧半場效應電晶體之該第二源極與一第一特定準位之間;其中,該第一金氧半場效應電晶體及該第二金氧半場效應電晶體為空乏型。
10、20、30、406、408、506、508‧‧‧運算放大器
100、102、202、302‧‧‧輸入對
104、106、204、304‧‧‧主動負載
108、110、206、306‧‧‧偏壓源
208、308‧‧‧輸出級
40、50‧‧‧液晶顯示器驅動器
400、402、500、502‧‧‧數位類比轉換器
404、504‧‧‧切換電路
MP1~MP4、MN1~MN4‧‧‧電晶體
VDD‧‧‧系統電壓
VDsat‧‧‧導通電壓
VSG‧‧‧源閘極電壓差
VGS‧‧‧閘源極電壓差
In+、In-、Vin‧‧‧輸入電壓
CMP、CMN、VCM‧‧‧範圍
GND‧‧‧接地準位
Vout‧‧‧輸出電壓
第1A圖為習知一運算放大器之部分示意圖。
第1B圖為第1A圖中運算放大器之操作電壓示意圖
第2A圖為本發明實施例一運算放大器之部分示意圖。
第2B圖為第2A圖所示運算放大器之詳細示意圖。
第3A圖為本發明實施例另一運算放大器之部分示意圖。
第3B圖為第3A圖所示運算放大器之詳細示意圖。
第4圖為本發明實施例一液晶顯示器驅動器之示意圖。
第5圖為本發明實施例另一液晶顯示器驅動器之示意圖。
請參考第2A圖,第2A圖為本發明實施例一運算放大器20之部
分示意圖。如第2A圖所示,運算放大器20包含有一輸入對202、主動負載204以及偏壓源206,其中,N型輸入對202包含有N型金氧半場效應電晶體MN3、MN4。簡單來說,金氧半場效應電晶體MN3、MN4分別於閘極接收輸入電壓In-、In+,且金氧半場效應電晶體MN4之一源極耦接於金氧半場效應電晶體MN3之一源極。主動負載204耦接金氧半場效應電晶體MN3、MN4之汲極。偏壓源206耦接於金氧半場效應電晶體MN3、MN4之源極與一第一特定準位(即接地準位GND)之間,其中,金氧半場效應電晶體MN3、MN4為空乏型(depletion type)。
在此情況下,若電晶體MN4欲導通進行操作,則輸入電壓In+減去電晶體MN4之一門檻電壓及偏壓源206之一導通電壓VDsat需大於一接地準位GND(即0V),但由於金氧半場效應電晶體MN4為空乏型而門檻電壓為負值,因此即使輸入電壓In+為0仍可導通(如門檻電壓為-0.7V而導通電壓VDsat為0.3V,電晶體MN4可於(In+)-(-0.7)-0.3>0的情況下導通),電晶體MN3亦具有相同操作條件,使得運算放大器20可操作於全範圍VCM而具有軌對軌(Rail to Rail)輸出電壓。如此一來,運算放大器20可透過使用空乏型金氧半場效應電晶體MN3、MN4做為輸入對202,而可僅使用一組輸入對202達到軌對軌輸出電壓而節省電路面積。
值得注意的是,上述實施例之主要精神在於透過使用空乏型金氧半場效應電晶體做為輸入對,而可僅使用一組輸入對達到軌對軌輸出電壓而節省電路面積,本領域具通常知識者當可據以進行修飾或變化,而不限於此。舉例來說,運算放大器20之詳細電路不限於特定結構。請參考第2B圖,第2B圖為第2A圖所示運算放大器20之詳細示意圖。如第2B圖所示,運算放大器20另包含一輸出級208,耦接於主動負載204,以產生一輸出電壓Vout,其中,偏壓源206係以一偏壓電晶體實施。在此結構下,金氧半場效應電晶
體MN3、MN4於閘極所接收輸入電壓In-、In+可分別為輸出電壓Vout及一輸入電壓Vin,以透過負回授方式將輸出電壓Vout鎖定於輸入電壓Vin,而主動負載204則以折疊(folded)結構做為轉導,透過提供電流於N型輸入對202產生電壓訊號使得輸出級208產生輸出電壓Vout。須注意,主動負載204、偏壓源206以及輸出級208並不限於第2B圖所示之結構,而可以其它結構仍具有其作用。
此外,金氧半場效應電晶體MN3、MN4之一基極(Body)可耦接於一第二特定準位,該第二特定準位等於該第一特定準位(如第2B圖所示金氧半場效應電晶體MN3、MN4之基極耦接於接地準位GND)或介於該第一特定準位與金氧半場效應電晶體MN3、MN4之源極之一準位之間(如金氧半場效應電晶體MN3、MN4之基極可耦接於大於0但小於金氧半場效應電晶體MN3、MN4之源極之準位的電位)。在此情況下,由於金氧半場效應電晶體MN3、MN4之源極與基極之電壓差大於0,因此當金氧半場效應電晶體MN3、MN4之閘極電壓(即輸出電壓Vout及輸入電壓Vin)提高時,金氧半場效應電晶體MN3、MN4之門檻電壓會由負值逐漸接近0或甚至轉為正值,而有助於輸出具有高電壓之輸出電壓Vout。
除此之外,上述實施例以N型金氧半場效應電晶體MN3、MN4做為輸入對202,但在其它實施例中,亦可以P型金氧半場效應電晶體實施。舉例來說,請參考第3A圖及第3B圖,第3A圖為本發明實施例一運算放大器30之部分示意圖。如第3A圖所示,運算放大器30包含有一輸入對302、主動負載304以及偏壓源306,其中,P型輸入對302包含有P型金氧半場效應電晶體MP3、MP4。簡單來說,金氧半場效應電晶體MP3、MP4分別於閘極接收輸入電壓In-、In+,且金氧半場效應電晶體MP4之一源極耦接於金氧半場效應電晶體MP3之一源極。主動負載304耦接金氧半場效應電晶體
MP3、MP4之汲極。偏壓源306耦接於金氧半場效應電晶體MP3、MP4之源極與一第一特定準位(即系統電壓VDD)之間,其中,金氧半場效應電晶體MP3、MP4為空乏型。
在此情況下,若電晶體MP4欲導通進行操作,則系統電壓VDD減去偏壓源306之一導通電壓VDsat及電晶體MP4之一門檻電壓之相反值需大於輸入電壓In+,但由於金氧半場效應電晶體MP4為空乏型且門檻電壓為正值(即P型空乏型電晶體中門檻電壓為閘源極電壓差且為正值,源閘極電壓差VSG需大於門檻電壓之相反值以進行導通),因此即使輸入電壓In+接近系統電壓VDD仍可導通(如門檻電壓為0.7V而導通電壓VDsat為0.3V,電晶體MP4可於VDD-0.3-(-0.7)>(In+)的情況下導通),電晶體MP3亦具有相同操作條件,使得運算放大器30可操作於全範圍VCM而具有軌對軌輸出電壓。如此一來,運算放大器30可透過使用空乏型金氧半場效應電晶體MP3、MP4做為輸入對302,而可僅使用一組輸入對302達到軌對軌輸出電壓而節省電路面積。
另一方面,請參考第3B圖,第3B圖為第3A圖所示運算放大器30之詳細示意圖。如第3B圖所示,運算放大器30另包含一輸出級308,耦接於主動負載304,以產生一輸出電壓Vout,其中,偏壓源306係以一偏壓電晶體實施。在此結構下,金氧半場效應電晶體MP3、MP4於閘極所接收輸入電壓In-、In+可分別為輸出電壓Vout及一輸入電壓Vin,以透過負回授方式將輸出電壓Vout鎖定於輸入電壓Vin,而主動負載304則以折疊結構做為轉導,透過提供電流於P型輸入對302產生電壓訊號使得輸出級308產生輸出電壓Vout。須注意,主動負載304、偏壓源306以及輸出級308並不限於第3B圖所示之結構,而可以其它結構仍具有其作用。
此外,金氧半場效應電晶體MP3、MP4之一基極可耦接於一第二特定準位,該第二特定準位等於該第一特定準位(如第3B圖所示金氧半場效應電晶體MP3、MP4之基極耦接於系統電壓VDD)或介於該第一特定準位與金氧半場效應電晶體MP3、MP4之源極之一準位之間(如金氧半場效應電晶體MP3、MP4之基極可耦接於小於系統電壓VDD但大於金氧半場效應電晶體MP3、MP4之源極之準位的電位)。在此情況下,由於金氧半場效應電晶體MP3、MP4之基極與源極之電壓差大於0,因此當金氧半場效應電晶體MP3、MP4之閘極電壓(即輸出電壓Vout及輸入電壓Vin)降低時,金氧半場效應電晶體MP3、MP4之門檻電壓會由正值逐漸接近0或甚至轉為負值,而有助於輸出具有低電壓之輸出電壓Vout。
再者,本案運算放大器20、30可用於輸出軌對軌輸出電壓Vout,因此可用於一液晶顯示器驅動器(Liquid Crystal Display,LCD)中做為輸出緩衝器。舉例來說,請參考第4圖及第5圖,第4圖為本發明實施例一液晶顯示器驅動器40之示意圖,第5圖為本發明實施例另一液晶顯示器驅動器50之示意圖。如第4圖所示,液晶顯示器驅動器40包含有數位類比轉換器(digital to analog converter,DAC)400、402、一切換電路404以及運算放大器406、408。簡單來說,數位類比轉換器400、402接收數位訊號以分別輸出正電壓及負電壓,再由切換電路404切換數位類比轉換器400、402與運算放大器406、408之連結,以交替輸出正電壓及負電壓運算放大器406、408(即運算放大器406、408先分別接收正負電壓及負電壓,而於極性反轉後,切換電路404改變連接組態使得運算放大器406、408分別接收負電壓及正電壓),使得運算放大器406、408可根據所接收之輸入電壓穩定產生輸出電壓予奇數資料線及偶數資料線,以對液晶進行驅動。須注意,運算放大器406、408可分別以運算放大器20、30中一者實現以輸出軌對軌輸出電壓,因此可節省電路面積。
另一方面,如第5圖所示,液晶顯示器驅動器50包含有數位類比轉換器500、502、一切換電路504以及運算放大器506、508。簡單來說,數位類比轉換器500、502接收數位訊號以分別輸出正電壓及負電壓,運算放大器506、508根據所接收之輸入電壓穩定產生輸出電壓,再由切換電路504切換運算放大器506、508與奇數資料線及偶數資料線之連結,以交替輸出正輸出電壓及負輸出電壓對液晶進行驅動(即運算放大器506、508先分別輸出正輸出電壓及負輸出電壓至奇數資料線及偶數資料線,而於極性反轉後,切換電路504改變連接組態使得運算放大器506、508分別輸出正輸出電壓及負輸出電壓至偶數資料線及奇數資料線)。須注意,運算放大器506、508可分別以運算放大器20、30中一者實現以輸出軌對軌輸出電壓,因此可節省電路面積。此外,運算放大器20、30亦可用於其它電路中,而不限於液晶顯示器驅動器。
在習知技術中,運算放大器10需同時具有P型輸入對100及N型輸入對102,需要較大的電路面積。相較之下,本發明實施例可透過使用空乏型金氧半場效應電晶體做為輸入對,而可僅使用一組輸入對達到軌對軌輸出電壓而節省電路面積。
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。
20‧‧‧運算放大器
202‧‧‧輸入對
204‧‧‧主動負載
206‧‧‧偏壓源
MP3~MP4、MN3~MN4‧‧‧電晶體
VDD‧‧‧系統電壓
In+、In-‧‧‧輸入電壓
GND‧‧‧接地準位
Claims (5)
- 一種運算放大器,包含有:一第一金氧半場效應電晶體(metal-oxide-semiconductor field effect transistor,MOSFET),包含有一第一汲極、一第一閘極以及一第一源極;一第二金氧半場效應電晶體,包含有一第二汲極、一第二閘極以及一第二源極,該第二源極耦接於該第一金氧半場效應電晶體之該第一源極;以及一偏壓源,耦接於該第一金氧半場效應電晶體之該第一源極及該第二金氧半場效應電晶體之該第二源極與一第一特定準位之間;其中,該第一金氧半場效應電晶體及該第二金氧半場效應電晶體為空乏型(depletion type);其中該第一金氧半場效應電晶體之一第一基極(Body)及該第二金氧半場效應電晶體之一第二基極耦接於一第二特定準位,該第二特定準位介於該第一特定準位與該第一金氧半場效應電晶體之該第一源極及該第二金氧半場效應電晶體之該第二源極之一準位之間。
- 如請求項1所述之運算放大器,其中該第一金氧半場效應電晶體及該第二金氧半場效應電晶體為N型金氧半場效應電晶體,該第一特定準位為一接地準位。
- 如請求項1所述之運算放大器,其中該第一金氧半場效應電晶體及該第二金氧半場效應電晶體為P型金氧半場效應電晶體,該第一特定準位為一系統電壓。
- 如請求項1所述之運算放大器,其另包含: 一主動負載,耦接於該第一金氧半場效應電晶體之該第一汲極及該第二金氧半場效應電晶體之該第二汲極;以及一輸出級,耦接於該主動負載,用來產生一輸出電壓。
- 如請求項1所述之運算放大器,其中該運算放大器用於一液晶顯示器驅動器(Liquid Crystal Display,LCD)中。
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US5764101A (en) * | 1995-08-23 | 1998-06-09 | National Semiconductor Corporation | Rail-to-rail input common mode range differential amplifier that operates with very low rail-to-rail voltages |
US5734296A (en) * | 1996-03-19 | 1998-03-31 | Motorola, Inc. | Low voltage operational amplifier input stage and method |
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US6140877A (en) | 1998-12-11 | 2000-10-31 | Micron Technology, Inc. | Low power supply CMOS differential amplifier topology |
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US6380806B1 (en) * | 2000-09-01 | 2002-04-30 | Advanced Micro Devices, Inc. | Differential telescopic operational amplifier having switched capacitor common mode feedback circuit portion |
US6509795B1 (en) * | 2001-09-26 | 2003-01-21 | Texas Instruments Incorporated | CMOS input stage with wide common-mode range |
US7221218B2 (en) * | 2004-03-05 | 2007-05-22 | Wionics Research | MOSFET amplifier having feedback controlled transconductance |
US8470164B2 (en) * | 2008-06-25 | 2013-06-25 | Life Technologies Corporation | Methods and apparatus for measuring analytes using large scale FET arrays |
US9310825B2 (en) * | 2009-10-23 | 2016-04-12 | Rochester Institute Of Technology | Stable voltage reference circuits with compensation for non-negligible input current and methods thereof |
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