TWI469216B - 半導體裝置之製造方法及基板處理裝置 - Google Patents

半導體裝置之製造方法及基板處理裝置 Download PDF

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Publication number
TWI469216B
TWI469216B TW97122291A TW97122291A TWI469216B TW I469216 B TWI469216 B TW I469216B TW 97122291 A TW97122291 A TW 97122291A TW 97122291 A TW97122291 A TW 97122291A TW I469216 B TWI469216 B TW I469216B
Authority
TW
Taiwan
Prior art keywords
film
processing chamber
substrate
metal oxide
oxide film
Prior art date
Application number
TW97122291A
Other languages
English (en)
Chinese (zh)
Other versions
TW200913062A (en
Inventor
Arito Ogawa
Kunihiko Iwamoto
Hiroyuki Ota
Original Assignee
Hitachi Int Electric Inc
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Int Electric Inc, Rohm Co Ltd filed Critical Hitachi Int Electric Inc
Publication of TW200913062A publication Critical patent/TW200913062A/zh
Application granted granted Critical
Publication of TWI469216B publication Critical patent/TWI469216B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4966Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
    • H01L29/4975Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 being a silicide layer, e.g. TiSi2

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Composite Materials (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)
TW97122291A 2007-06-15 2008-06-13 半導體裝置之製造方法及基板處理裝置 TWI469216B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007159176 2007-06-15
JP2008137831A JP5286565B2 (ja) 2007-06-15 2008-05-27 半導体装置の製造方法、基板処理方法および基板処理装置

Publications (2)

Publication Number Publication Date
TW200913062A TW200913062A (en) 2009-03-16
TWI469216B true TWI469216B (zh) 2015-01-11

Family

ID=40360897

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97122291A TWI469216B (zh) 2007-06-15 2008-06-13 半導體裝置之製造方法及基板處理裝置

Country Status (3)

Country Link
JP (1) JP5286565B2 (ja)
KR (1) KR101178856B1 (ja)
TW (1) TWI469216B (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5247619B2 (ja) * 2009-07-28 2013-07-24 キヤノンアネルバ株式会社 誘電体膜、誘電体膜を用いた半導体装置の製造方法及び半導体製造装置
WO2012165263A1 (ja) * 2011-06-03 2012-12-06 東京エレクトロン株式会社 ゲート絶縁膜の形成方法およびゲート絶縁膜の形成装置
JP6544555B2 (ja) 2015-01-15 2019-07-17 国立研究開発法人物質・材料研究機構 抵抗変化型素子の製造方法
US9595593B2 (en) 2015-06-29 2017-03-14 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure with interfacial layer and method for manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020146895A1 (en) * 1999-10-25 2002-10-10 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US6632729B1 (en) * 2002-06-07 2003-10-14 Advanced Micro Devices, Inc. Laser thermal annealing of high-k gate oxide layers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3062116B2 (ja) * 1996-07-12 2000-07-10 東京エレクトロン株式会社 成膜・改質集合装置
US6753556B2 (en) 1999-10-06 2004-06-22 International Business Machines Corporation Silicate gate dielectric
JP2003332566A (ja) * 2002-05-14 2003-11-21 Fujitsu Ltd 半導体装置およびその製造方法
JP2004158481A (ja) 2002-11-01 2004-06-03 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP4507232B2 (ja) * 2003-03-24 2010-07-21 ローム株式会社 半導体装置の製造方法
WO2006009025A1 (ja) * 2004-07-20 2006-01-26 Nec Corporation 半導体装置及び半導体装置の製造方法
JP5039396B2 (ja) * 2007-02-19 2012-10-03 ローム株式会社 半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020146895A1 (en) * 1999-10-25 2002-10-10 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US6632729B1 (en) * 2002-06-07 2003-10-14 Advanced Micro Devices, Inc. Laser thermal annealing of high-k gate oxide layers

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Thin Solid Films, 第515冊, 2007年4月,^&rn^ *

Also Published As

Publication number Publication date
TW200913062A (en) 2009-03-16
JP2009021560A (ja) 2009-01-29
KR20080110524A (ko) 2008-12-18
JP5286565B2 (ja) 2013-09-11
KR101178856B1 (ko) 2012-08-31

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