TWI415291B - 晶片型led封裝以及具有該封裝的發光裝置 - Google Patents
晶片型led封裝以及具有該封裝的發光裝置 Download PDFInfo
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- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 11
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- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/56—Materials, e.g. epoxy or silicone resin
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/507—Wavelength conversion elements the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
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- Injection Moulding Of Plastics Or The Like (AREA)
Description
本發明是有關於發光二極體(LED)以及具有該封裝的發光裝置,特別是有關於晶片型LED封裝以及具有該封裝的發光裝置。
基本上,晶片型LED封裝包括有安裝於印刷電路板(PCB)上的LED晶片以及覆蓋該LED晶片的成型部。該成型部含有螢光體(phosphor),用以轉換該LED晶片發射的光的波長。例如,該LED晶片可以為能夠發出紫外線或藍光的氮化镓型化合物半導体(gallium nitride-based compound semiconductor),而該螢光體將該紫外線或藍光轉換為另一種顏色。因而,藉由組合該LED晶片與該螢光體,可以實現各種顏色的光,尤其是白光。
由於該種晶片型LED封裝結構簡單,其製程得以簡化,且可以大量製造輕薄短小的產品。因此,該晶片型LED封裝被廣泛應用於各種需要小光源的產品,比如,用於移動通訊終端的液晶顯示器(liquid crystal display,LCD)的背光源。
含有螢光體的成型部的製造通常是將含有螢光體的液體環氧樹脂藉由打點(dotting)或鑄造製程形成於印刷電路板上。然而,由於無機螢光體相較於液體環氧樹脂具有相對較大的比重,因此該螢光體沉澱於液體環氧樹脂內。因該螢光體在成型部內分散不均,該LED封裝亦無法提供
均勻的亮度。
同時,韓國專利第10-0348377號揭示了一種製造晶片型LED封裝的方法,該封裝包括一成型部,螢光體均勻分散於其內。圖1為該韓國專利揭示的晶片型LED封裝製造方法的截面視圖。
請參考圖1,LED晶片3安裝於PCB 6上,該PCB 6具有導電電極7,其印製於PCB 6上。LED晶片3藉由使用導電膠(conductive adhesive)4以安裝於並電性連結至任何一導電電極7,且藉由接合線(bonding wire)5以電性連結至其他的導電電極7。
同時,含有螢光體2的成型部1覆蓋該LED晶片3。成型部1是藉由先製造螢光體2以及固體樹脂粉末混合片狀材料,然後再利用該片狀材料進行轉移成型(transfer molding)製程而形成。在轉移成型中,成型部是以高於普通硬化溫度的溫度下在短時間內硬化樹脂而形成。因此,可以防止螢光體2因比重差異而沉澱於成型部1中,使得螢光體2均勻分散於模造(molding)體1內。因此,晶片型LED封裝能夠具有均勻的亮度。
然而,成型部1為防止外部環境如外力的影響,其硬度相對較高。在覆蓋LED晶片的成型部1具有相對高硬度的情況下,成型部1可能因LED晶片工作中產生的外力而變形。該成型部1的變形將會造成發光亮度的變化,其亦會造成該成型部1從PCB 6脫離,從而縮短LED封裝的壽命。
而且,為滿足實現色彩的發展以及提高LCD亮度的需求,作為背光源的晶片型LED封裝需要具有高輸出功率。為此,使用的晶片型LED封裝上安裝的功率晶片需要具有非常大的工作電流例如是大約350毫安(相比之下,習知LED晶片的工作電流在大約20毫安)。然而,工作電流的上昇亦導致LED晶片產生的熱量增加,因此,成型部更加變形。另外,由於採用低導熱性的環氧玻璃製造的PCB無法迅速散去LED晶片產生的熱量,此將增大成型部的熱變形。
本發明的一個目的是提供一種晶片型LED封裝,其可防止裝置因成型部的熱變形而失效,以及提供一種具有該封裝的發光裝置。
本發明的另一目的是提供一種晶片型LED封裝,其具有均勻的亮度特性,以及提供一種具有該封裝的發光裝置。
本發明的又一目的是提供一種晶片型LED封裝,其中,可安裝高工作電流的功率晶片,以及一種具有該封裝的發光裝置。
下列各實施例的說明是參考附加的圖式,用以例示本發明可用以實施之特定實施例。這些實施例僅是用於描述用途,因而,本發明不應限定於在此描述的特定形式,而可具有其他的實施方式。在圖中,元件的寬度、長度、厚
度可能為便於繪示而採用擴大的畫法。在全文中相同的標號表示相同的元件。
圖2為本發明晶片型LED封裝20一實施例的截面視圖。
參考圖2,晶片型LED封裝20包括導熱性基板21,其上形成有導電電極23a及23b。導電性基板21可為金屬芯印刷電路板(metal core printed circuit board,MCPCB)或者陶瓷基板。陶瓷可為例如氧化鋁(Al2
O3
)、碳化矽(SiC)、或氮化鋁(AlN)。導電電極23a及23b形成於基板21的上表面,且可根據使用情況以任何方式延伸。例如,如圖2所示,導電電極23a及23b可延伸至基板21的下表面,以便各電極能夠進行表面安裝。
LED晶片25安裝於導熱性基板21上。LED晶片25藉由導電膠(圖未示)而與導電電極23a接合,並藉由接合線電性連結至導電電極23b。在此,LED晶片25為上、下表面皆具有一個電極之單連結晶片(1-bond die)。在其他實施例中,LED晶片25亦可為上表面具有兩個電極之雙連結晶片(2-bond die)。如此,這些電極藉由接合線以電性連結至導電電極23a及23b。另外,LED晶片25可為具凸塊(bumps)的覆晶(flip chip)。如此,該LED晶片可使用凸塊以藉由覆晶來接合至導電電極23a及23b。
下成型部27覆蓋LED晶片25。下成型部27可藉由矽樹脂打點製程而形成。本實施例中,矽樹脂較佳為不含有螢光體。下成型部具有相對低的硬度,因此可吸收LED
晶片25發熱造成的熱壓力。因此,可防止下成型部27與LED晶片25或基板21的脫離情況發生。
同時,上成型部29覆蓋下成型部27。上成型部的硬度較下成型部27的硬度大,藉以保護LED晶片25不受外部環境例如外力的影響。上成型部29可包含螢光體,用來轉換LED晶片25發出的光的波長。LED晶片25以及螢光體結合在一起,以實現各種顏色的光,例如白色光。
上成型部29可藉由使用樹脂粉末的轉移成型製程而形成。即,首先形成樹脂粉末片狀材料,然後使用該片狀材料進行轉移成型,藉以形成上成型部29。此時,可使用樹脂粉末及螢光體的混合物進行轉移成型而形成上成型部29。因此,本實施例提供一種具有均勻亮度的晶片型LED封裝,其中,上成型部29具有均勻散佈的螢光體。
雖然本實施例中單一LED晶片25安裝於單一基板21上,惟本發明不應限定於此。多個LED晶片25可以陣列形式安裝於單一基板21上。在此,下成型部27以及上成型部29可各自覆蓋這些LED晶片25。
圖3為本發明晶片型LED封裝30另一實施例的截面視圖。
參考圖3,晶片型LED封裝30與圖2所示的晶片型LED封裝20實質上相同。因此,以下描述僅說明其區別。
在該實施例中,中間成型部31夾設於上成型部33及下成型部27之間。即,中間成型部31覆蓋下成型部27,而上成型部33覆蓋中間成型部31。該中間成型部31可藉
由使用樹脂粉末的轉移成型製程而形成,而上成型部33可以與圖2所示的上成型部29相同的方式形成。
中間成型部31可具有與上成型部33大致相同的形狀,但較佳者,其不含有螢光體。上成型部33在中間成型部31上具有實質上均勻的厚度。這樣,由LED晶片25所產生並穿過上成型部33的光的光路的長度變得實質上相同,而與其在上成型部33的位置無關。因此,在上成型部33含有螢光體的情況下,因該螢光體,光的波長可被更加均勻地轉換,以更加提昇晶片型LED封裝30的亮度均勻度。
圖4為本發明具有晶片型LED封裝的發光裝置40的截面視圖。
發光裝置40具有上述圖2或3所示的晶片型LED封裝20或30。下面將針對發光裝置40具有圖3的晶片型LED封裝30來描述。
晶片型LED封裝30安裝於散熱片35上。晶片型LED封裝30的導熱性基板21安裝於散熱片35上。此時,導熱性基板21可藉由導熱膠(圖未示)接合至散熱片35上。
散熱片35可由高導熱性的材料例如金屬製成。在散熱片35為高導熱性材料如金屬製成的情況下,至少晶片型LED封裝30的其中之一導電電極23a及23b與散熱片35之間絕緣。為此,如圖4所示,導電電極23a及23b可形成於基板21上。
同時,如圖所示,散熱片35可具有凹陷(recess),
導熱性基板21可接合於該凹陷。該凹陷有利於晶片型LED封裝30的對準,且有利於晶片型LED封裝30的固定。
同時,可設置導電端子(圖未示),用於將導電電極23a及23b連結至外部電源,且導電端子及導電電極23a及23b可以任何方式相互電性連結,例如,藉由接合線(圖未示)或焊接方式。
雖然在市場上已大致有LED晶片安裝在散熱器上的功率型LED封裝,但提供具有均勻散佈的螢光體的成型部是比較困難的,因為這種LED封裝難於藉由轉移成型來形成上述之成型部。然而,在本實施例中晶片型LED封裝3O是安裝於散熱片35上,因此能夠提供藉由轉移成型技術成型的具有均勻散佈的螢光體的成型部。因此,可使發光裝置的亮度均勻度得到改善。
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
20‧‧‧晶片型LED封裝
21‧‧‧導熱性基板
23a‧‧‧導電電極
23b‧‧‧導電電極
25‧‧‧LED晶片
27‧‧‧下成型部
29‧‧‧上成型部
30‧‧‧晶片型LED封裝
31‧‧‧中間成型部
33‧‧‧上成型部
35‧‧‧散熱片
40‧‧‧發光裝置
圖1為習知晶片型LED封裝的截面視圖。
圖2為本發明晶片型LED封裝一實施例的截面視圖。
圖3為本發明晶片型LED封裝另一實施例的截面視圖。
圖4為本發明具有晶片型LED封裝的發光裝置的截面視圖。
20‧‧‧晶片型LED封裝
21‧‧‧導熱性基板
23a‧‧‧導電電極
23b‧‧‧導電電極
25‧‧‧LED晶片
27‧‧‧下成型部
29‧‧‧上成型部
Claims (5)
- 一種晶片型發光二極體(LED)封裝,包括:導熱性基板,其上形成有導電電極;LED晶片,安裝於該導熱性基板上;下成型部,覆蓋該LED晶片;中間成型部,覆蓋該下成型部;以及上成型部,覆蓋該中間成型部,該上成型部的硬度高於該下成型部的硬度,且藉由使用樹脂粉末的轉移成型製程而形成;其中該中間成型部,其夾設於該下成型部及該上成型部之間且形狀與該上成型部相同,其中該下成型部藉由矽樹脂打點製程而形成,其中該中間成型部藉由使用樹脂粉末的轉移成型製程而形成,且其中該上成型部藉由使用樹脂粉及螢光體的混合物的轉移成型製程而形成,以使該螢光體均勻分散於該上成型部中。
- 如申請專利範圍第1項所述之晶片型發光二極體(LED)封裝,其中該導熱性基板為金屬芯印刷電路板(MCPCB)或陶瓷基板。
- 如申請專利範圍第1項所述之晶片型發光二極體(LED)封裝,其中該下成型部及該中間成型部並不包含螢光體。
- 一種發光裝置,包括: 散熱片;以及如申請專利範圍第1至第3項中任一項所述之晶片型LED封裝,該晶片型LED封裝安裝於該散熱片上。
- 如申請專利範圍第4項所述之發光裝置,其中該散熱片具有凹陷,該晶片型LED封裝的導熱性基板安裝於該凹陷內。
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TW096116264A TWI415291B (zh) | 2006-05-08 | 2007-05-08 | 晶片型led封裝以及具有該封裝的發光裝置 |
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US (1) | US7999276B2 (zh) |
KR (1) | KR100731678B1 (zh) |
TW (2) | TW201208108A (zh) |
WO (1) | WO2007129847A1 (zh) |
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TW201208108A (en) | 2012-02-16 |
KR100731678B1 (ko) | 2007-06-22 |
WO2007129847A1 (en) | 2007-11-15 |
US7999276B2 (en) | 2011-08-16 |
US20090200567A1 (en) | 2009-08-13 |
TW200746482A (en) | 2007-12-16 |
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