TWI394236B - 具有黏著性間隔結構之可固定積體電路封裝內封裝系統 - Google Patents

具有黏著性間隔結構之可固定積體電路封裝內封裝系統 Download PDF

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Publication number
TWI394236B
TWI394236B TW096148370A TW96148370A TWI394236B TW I394236 B TWI394236 B TW I394236B TW 096148370 A TW096148370 A TW 096148370A TW 96148370 A TW96148370 A TW 96148370A TW I394236 B TWI394236 B TW I394236B
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TW
Taiwan
Prior art keywords
package
integrated circuit
adhesive
encapsulant
spacer
Prior art date
Application number
TW096148370A
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English (en)
Chinese (zh)
Other versions
TW200834829A (en
Inventor
河宗佑
李成敏
裵助現
Original Assignee
星科金朋有限公司
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Publication of TW200834829A publication Critical patent/TW200834829A/zh
Application granted granted Critical
Publication of TWI394236B publication Critical patent/TWI394236B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/533—Cross-sectional shape
    • H10W72/534—Cross-sectional shape being rectangular
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW096148370A 2006-12-28 2007-12-18 具有黏著性間隔結構之可固定積體電路封裝內封裝系統 TWI394236B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/617,413 US7687897B2 (en) 2006-12-28 2006-12-28 Mountable integrated circuit package-in-package system with adhesive spacing structures

Publications (2)

Publication Number Publication Date
TW200834829A TW200834829A (en) 2008-08-16
TWI394236B true TWI394236B (zh) 2013-04-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW096148370A TWI394236B (zh) 2006-12-28 2007-12-18 具有黏著性間隔結構之可固定積體電路封裝內封裝系統

Country Status (4)

Country Link
US (1) US7687897B2 (https=)
JP (2) JP5067662B2 (https=)
KR (1) KR101476385B1 (https=)
TW (1) TWI394236B (https=)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7569918B2 (en) * 2006-05-01 2009-08-04 Texas Instruments Incorporated Semiconductor package-on-package system including integrated passive components
US7687897B2 (en) * 2006-12-28 2010-03-30 Stats Chippac Ltd. Mountable integrated circuit package-in-package system with adhesive spacing structures
US9466545B1 (en) 2007-02-21 2016-10-11 Amkor Technology, Inc. Semiconductor package in package
US7868471B2 (en) * 2007-09-13 2011-01-11 Stats Chippac Ltd. Integrated circuit package-in-package system with leads
US8110905B2 (en) * 2007-12-17 2012-02-07 Stats Chippac Ltd. Integrated circuit packaging system with leadframe interposer and method of manufacture thereof
US7741154B2 (en) * 2008-03-26 2010-06-22 Stats Chippac Ltd. Integrated circuit package system with stacking module
US7968373B2 (en) * 2008-05-02 2011-06-28 Stats Chippac Ltd. Integrated circuit package on package system
US7977779B2 (en) * 2008-06-10 2011-07-12 Stats Chippac Ltd. Mountable integrated circuit package-in-package system
US8283209B2 (en) 2008-06-10 2012-10-09 Stats Chippac, Ltd. Semiconductor device and method of forming PiP with inner known good die interconnected with conductive bumps
US8406004B2 (en) 2008-12-09 2013-03-26 Stats Chippac Ltd. Integrated circuit packaging system and method of manufacture thereof
US8390110B2 (en) * 2009-10-20 2013-03-05 Stats Chippac Ltd. Integrated circuit packaging system with cavity and method of manufacture thereof
US9147670B2 (en) 2012-02-24 2015-09-29 Taiwan Semiconductor Manufacturing Company, Ltd. Functional spacer for SIP and methods for forming the same
JP5921297B2 (ja) * 2012-04-09 2016-05-24 キヤノン株式会社 積層型半導体装置、プリント回路板及び積層型半導体装置の製造方法
CN102738094B (zh) * 2012-05-25 2015-04-29 日月光半导体制造股份有限公司 用于堆叠的半导体封装构造及其制造方法
US20140284040A1 (en) * 2013-03-22 2014-09-25 International Business Machines Corporation Heat spreading layer with high thermal conductivity
CN104752491A (zh) 2013-12-30 2015-07-01 晟碟半导体（上海）有限公司 用于半导体装置的间隔体层和半导体装置
US10418343B2 (en) 2017-12-05 2019-09-17 Infineon Technologies Ag Package-in-package structure for semiconductor devices and methods of manufacture

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050133916A1 (en) * 2003-12-17 2005-06-23 Stats Chippac, Inc Multiple chip package module having inverted package stacked over die
TWI236744B (en) * 2004-06-25 2005-07-21 Advanced Semiconductor Eng Method for manufacturing stacked multi-chip package

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6111306A (en) 1993-12-06 2000-08-29 Fujitsu Limited Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same
US5656550A (en) 1994-08-24 1997-08-12 Fujitsu Limited Method of producing a semicondutor device having a lead portion with outer connecting terminal
TW373308B (en) 1995-02-24 1999-11-01 Agere Systems Inc Thin packaging of multi-chip modules with enhanced thermal/power management
US6005778A (en) 1995-06-15 1999-12-21 Honeywell Inc. Chip stacking and capacitor mounting arrangement including spacers
US5663593A (en) 1995-10-17 1997-09-02 National Semiconductor Corporation Ball grid array package with lead frame
JP3297387B2 (ja) 1998-11-20 2002-07-02 沖電気工業株式会社 半導体装置の製造方法
JP3722209B2 (ja) 2000-09-05 2005-11-30 セイコーエプソン株式会社 半導体装置
US6967395B1 (en) 2001-03-20 2005-11-22 Amkor Technology, Inc. Mounting for a package containing a chip
US6946323B1 (en) 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
JP2003273317A (ja) * 2002-03-19 2003-09-26 Nec Electronics Corp 半導体装置及びその製造方法
US7423336B2 (en) * 2002-04-08 2008-09-09 Micron Technology, Inc. Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices
WO2004001838A1 (en) 2002-06-19 2003-12-31 Chuen Khiang Wang Packaging of a microchip device-i
US6785137B2 (en) 2002-07-26 2004-08-31 Stmicroelectronics, Inc. Method and system for removing heat from an active area of an integrated circuit device
US6965160B2 (en) 2002-08-15 2005-11-15 Micron Technology, Inc. Semiconductor dice packages employing at least one redistribution layer
US6972481B2 (en) 2002-09-17 2005-12-06 Chippac, Inc. Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages
US7045887B2 (en) 2002-10-08 2006-05-16 Chippac, Inc. Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package
US6861288B2 (en) * 2003-01-23 2005-03-01 St Assembly Test Services, Ltd. Stacked semiconductor packages and method for the fabrication thereof
US6936929B1 (en) 2003-03-17 2005-08-30 National Semiconductor Corporation Multichip packages with exposed dice
US20040194882A1 (en) * 2003-04-07 2004-10-07 Ying-Hao Hung Method for disassembling a stacked-chip package
JP4197140B2 (ja) * 2003-06-19 2008-12-17 パナソニック株式会社 半導体装置
US7071421B2 (en) 2003-08-29 2006-07-04 Micron Technology, Inc. Stacked microfeature devices and associated methods
US6936922B1 (en) 2003-09-26 2005-08-30 Amkor Technology, Inc. Semiconductor package structure reducing warpage and manufacturing method thereof
JP2005209882A (ja) * 2004-01-22 2005-08-04 Renesas Technology Corp 半導体パッケージ及び半導体装置
US7629695B2 (en) * 2004-05-20 2009-12-08 Kabushiki Kaisha Toshiba Stacked electronic component and manufacturing method thereof
US7253511B2 (en) * 2004-07-13 2007-08-07 Chippac, Inc. Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
JP2006049569A (ja) * 2004-08-04 2006-02-16 Sharp Corp スタック型半導体装置パッケージおよびその製造方法
TWI250592B (en) * 2004-11-16 2006-03-01 Siliconware Precision Industries Co Ltd Multi-chip semiconductor package and fabrication method thereof
US7205656B2 (en) 2005-02-22 2007-04-17 Micron Technology, Inc. Stacked device package for peripheral and center device pad layout device
US7372141B2 (en) * 2005-03-31 2008-05-13 Stats Chippac Ltd. Semiconductor stacked package assembly having exposed substrate surfaces on upper and lower sides
US7435619B2 (en) * 2006-02-14 2008-10-14 Stats Chippac Ltd. Method of fabricating a 3-D package stacking system
US20080237824A1 (en) * 2006-02-17 2008-10-02 Amkor Technology, Inc. Stacked electronic component package having single-sided film spacer
US7288835B2 (en) * 2006-03-17 2007-10-30 Stats Chippac Ltd. Integrated circuit package-in-package system
US7420269B2 (en) * 2006-04-18 2008-09-02 Stats Chippac Ltd. Stacked integrated circuit package-in-package system
TWI298198B (en) * 2006-05-30 2008-06-21 Advanced Semiconductor Eng Stackable semiconductor package
TWI319618B (en) * 2006-12-18 2010-01-11 Advanced Semiconductor Eng Three dimensional package and method of making the same
US7687897B2 (en) * 2006-12-28 2010-03-30 Stats Chippac Ltd. Mountable integrated circuit package-in-package system with adhesive spacing structures

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050133916A1 (en) * 2003-12-17 2005-06-23 Stats Chippac, Inc Multiple chip package module having inverted package stacked over die
TWI236744B (en) * 2004-06-25 2005-07-21 Advanced Semiconductor Eng Method for manufacturing stacked multi-chip package

Also Published As

Publication number Publication date
US20080157319A1 (en) 2008-07-03
KR20080063097A (ko) 2008-07-03
KR101476385B1 (ko) 2014-12-26
US7687897B2 (en) 2010-03-30
JP2012169664A (ja) 2012-09-06
JP5067662B2 (ja) 2012-11-07
TW200834829A (en) 2008-08-16
JP2008166803A (ja) 2008-07-17
JP5757448B2 (ja) 2015-07-29

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