TWI374536B - Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components - Google Patents
Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components Download PDFInfo
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- TWI374536B TWI374536B TW097108734A TW97108734A TWI374536B TW I374536 B TWI374536 B TW I374536B TW 097108734 A TW097108734 A TW 097108734A TW 97108734 A TW97108734 A TW 97108734A TW I374536 B TWI374536 B TW I374536B
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
- Y10T29/53183—Multilead component
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Applications Claiming Priority (1)
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|---|---|---|---|
| SG200701790-8A SG146460A1 (en) | 2007-03-12 | 2007-03-12 | Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200901435A TW200901435A (en) | 2009-01-01 |
| TWI374536B true TWI374536B (en) | 2012-10-11 |
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| SG (1) | SG146460A1 (enExample) |
| TW (1) | TWI374536B (enExample) |
| WO (1) | WO2008112643A2 (enExample) |
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- 2008-03-10 KR KR1020097021296A patent/KR101407773B1/ko active Active
- 2008-03-12 TW TW097108734A patent/TWI374536B/zh active
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2010
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Also Published As
| Publication number | Publication date |
|---|---|
| KR101407773B1 (ko) | 2014-07-02 |
| US20100279466A1 (en) | 2010-11-04 |
| KR20090122283A (ko) | 2009-11-26 |
| CN101632175B (zh) | 2012-02-22 |
| US8138021B2 (en) | 2012-03-20 |
| CN101632175A (zh) | 2010-01-20 |
| WO2008112643A2 (en) | 2008-09-18 |
| TW200901435A (en) | 2009-01-01 |
| EP2130224A2 (en) | 2009-12-09 |
| WO2008112643A3 (en) | 2008-12-18 |
| US20080224298A1 (en) | 2008-09-18 |
| JP5467458B2 (ja) | 2014-04-09 |
| SG146460A1 (en) | 2008-10-30 |
| US7759785B2 (en) | 2010-07-20 |
| EP2130224B1 (en) | 2019-08-14 |
| JP2010521818A (ja) | 2010-06-24 |
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