SG146460A1 - Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components - Google Patents

Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components

Info

Publication number
SG146460A1
SG146460A1 SG200701790-8A SG2007017908A SG146460A1 SG 146460 A1 SG146460 A1 SG 146460A1 SG 2007017908 A SG2007017908 A SG 2007017908A SG 146460 A1 SG146460 A1 SG 146460A1
Authority
SG
Singapore
Prior art keywords
methods
semiconductor devices
packaging
manufacturing
board
Prior art date
Application number
SG200701790-8A
Other languages
English (en)
Inventor
David J Corisis
J Michael Brooks
Lee Choon Kuan
Chong Chin Hui
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to SG200701790-8A priority Critical patent/SG146460A1/en
Priority to US11/742,297 priority patent/US7759785B2/en
Priority to JP2009553715A priority patent/JP5467458B2/ja
Priority to CN2008800076963A priority patent/CN101632175B/zh
Priority to EP08731831.7A priority patent/EP2130224B1/en
Priority to PCT/US2008/056424 priority patent/WO2008112643A2/en
Priority to KR1020097021296A priority patent/KR101407773B1/ko
Priority to TW097108734A priority patent/TWI374536B/zh
Publication of SG146460A1 publication Critical patent/SG146460A1/en
Priority to US12/838,642 priority patent/US8138021B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
    • H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1023—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
    • H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01027—Cobalt [Co]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/53—Means to assemble or disassemble
    • Y10T29/5313—Means to assemble electrical device
    • Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
    • Y10T29/53183—Multilead component

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
SG200701790-8A 2007-03-12 2007-03-12 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components SG146460A1 (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
SG200701790-8A SG146460A1 (en) 2007-03-12 2007-03-12 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
US11/742,297 US7759785B2 (en) 2007-03-12 2007-04-30 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
JP2009553715A JP5467458B2 (ja) 2007-03-12 2008-03-10 半導体デバイス及び部品のパッケージ化装置、半導体デバイス及び部品のパッケージ化方法
CN2008800076963A CN101632175B (zh) 2007-03-12 2008-03-10 用于封装半导体装置的设备和制造半导体组件的方法
EP08731831.7A EP2130224B1 (en) 2007-03-12 2008-03-10 Apparatus for packaging semiconductor devices
PCT/US2008/056424 WO2008112643A2 (en) 2007-03-12 2008-03-10 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
KR1020097021296A KR101407773B1 (ko) 2007-03-12 2008-03-10 반도체 장치를 패키징하는 장치, 패지징된 반도체 구성 부품, 반도체 장치를 패키징하는 장치의 제조 방법 및 반도체 구성 부품을 제조하는 방법
TW097108734A TWI374536B (en) 2007-03-12 2008-03-12 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
US12/838,642 US8138021B2 (en) 2007-03-12 2010-07-19 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG200701790-8A SG146460A1 (en) 2007-03-12 2007-03-12 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components

Publications (1)

Publication Number Publication Date
SG146460A1 true SG146460A1 (en) 2008-10-30

Family

ID=39760341

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200701790-8A SG146460A1 (en) 2007-03-12 2007-03-12 Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components

Country Status (8)

Country Link
US (2) US7759785B2 (enExample)
EP (1) EP2130224B1 (enExample)
JP (1) JP5467458B2 (enExample)
KR (1) KR101407773B1 (enExample)
CN (1) CN101632175B (enExample)
SG (1) SG146460A1 (enExample)
TW (1) TWI374536B (enExample)
WO (1) WO2008112643A2 (enExample)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG146460A1 (en) * 2007-03-12 2008-10-30 Micron Technology Inc Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
TW200908260A (en) * 2007-08-08 2009-02-16 Phoenix Prec Technology Corp Packaging substrate and application thereof
US20090194871A1 (en) * 2007-12-27 2009-08-06 Utac - United Test And Assembly Test Center, Ltd. Semiconductor package and method of attaching semiconductor dies to substrates
SG142321A1 (en) 2008-04-24 2009-11-26 Micron Technology Inc Pre-encapsulated cavity interposer
JP5543094B2 (ja) * 2008-10-10 2014-07-09 ピーエスフォー ルクスコ エスエイアールエル 低ノイズ半導体パッケージ
US7923290B2 (en) * 2009-03-27 2011-04-12 Stats Chippac Ltd. Integrated circuit packaging system having dual sided connection and method of manufacture thereof
JP5215244B2 (ja) * 2009-06-18 2013-06-19 新光電気工業株式会社 半導体装置
US8310835B2 (en) * 2009-07-14 2012-11-13 Apple Inc. Systems and methods for providing vias through a modular component
TWI508239B (zh) * 2009-08-20 2015-11-11 精材科技股份有限公司 晶片封裝體及其形成方法
KR101221869B1 (ko) * 2009-08-31 2013-01-15 한국전자통신연구원 반도체 패키지 및 그 제조 방법
CN102237324A (zh) * 2010-04-29 2011-11-09 国碁电子(中山)有限公司 集成电路封装结构及方法
TWI416679B (zh) 2010-12-06 2013-11-21 財團法人工業技術研究院 半導體結構及其製造方法
US8558369B2 (en) * 2011-03-25 2013-10-15 Stats Chippac Ltd. Integrated circuit packaging system with interconnects and method of manufacture thereof
US9281260B2 (en) 2012-03-08 2016-03-08 Infineon Technologies Ag Semiconductor packages and methods of forming the same
US9236316B2 (en) * 2012-03-22 2016-01-12 Mitsubishi Electric Corporation Semiconductor device and method for manufacturing the same
US8860202B2 (en) * 2012-08-29 2014-10-14 Macronix International Co., Ltd. Chip stack structure and manufacturing method thereof
US9378982B2 (en) * 2013-01-31 2016-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package
JP5846187B2 (ja) * 2013-12-05 2016-01-20 株式会社村田製作所 部品内蔵モジュール
US20150221570A1 (en) * 2014-02-04 2015-08-06 Amkor Technology, Inc. Thin sandwich embedded package
US9443744B2 (en) * 2014-07-14 2016-09-13 Micron Technology, Inc. Stacked semiconductor die assemblies with high efficiency thermal paths and associated methods
US9230900B1 (en) * 2014-12-18 2016-01-05 Intel Corporation Ground via clustering for crosstalk mitigation
US9515017B2 (en) 2014-12-18 2016-12-06 Intel Corporation Ground via clustering for crosstalk mitigation
US9397078B1 (en) * 2015-03-02 2016-07-19 Micron Technology, Inc. Semiconductor device assembly with underfill containment cavity
CN105390477B (zh) * 2015-12-11 2018-08-17 苏州捷研芯纳米科技有限公司 一种多芯片3d二次封装半导体器件及其封装方法
WO2017111903A1 (en) * 2015-12-21 2017-06-29 Intel Corporation Integrating system in package (sip) with input/output (io) board for platform miniaturization
CN106098676A (zh) * 2016-08-15 2016-11-09 黄卫东 多通道堆叠封装结构及封装方法
US10229859B2 (en) * 2016-08-17 2019-03-12 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same
CN110050332A (zh) 2016-12-31 2019-07-23 英特尔公司 电子器件封装
US10319684B2 (en) * 2017-04-11 2019-06-11 STATS ChipPAC Pte. Ltd. Dummy conductive structures for EMI shielding
JP7003439B2 (ja) * 2017-04-27 2022-01-20 富士電機株式会社 半導体装置
US10403602B2 (en) 2017-06-29 2019-09-03 Intel IP Corporation Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory
US10529592B2 (en) 2017-12-04 2020-01-07 Micron Technology, Inc. Semiconductor device assembly with pillar array
US11257803B2 (en) * 2018-08-25 2022-02-22 Octavo Systems Llc System in a package connectors
DE102020206769B3 (de) * 2020-05-29 2021-06-10 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Mikroelektronische anordnung und verfahren zur herstellung derselben
US11776888B2 (en) * 2021-05-28 2023-10-03 Qualcomm Incorporated Package with a substrate comprising protruding pad interconnects

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5490324A (en) * 1993-09-15 1996-02-13 Lsi Logic Corporation Method of making integrated circuit package having multiple bonding tiers
US5861670A (en) * 1979-10-04 1999-01-19 Fujitsu Limited Semiconductor device package
US20040041260A1 (en) * 2002-08-29 2004-03-04 Wood Alan G. Semiconductor component with backside contacts and method of fabrication
US20040175916A1 (en) * 1999-05-20 2004-09-09 Amkor Technology, Inc. Stackable semiconductor package having semiconductor chip within central through hole of substrate
US6861737B1 (en) * 1996-12-30 2005-03-01 Samsung Electronics Co., Ltd. Semiconductor device packages having semiconductor chips attached to circuit boards, and stack packages using the same
US7132841B1 (en) * 2000-06-06 2006-11-07 International Business Machines Corporation Carrier for test, burn-in, and first level packaging

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0719970B2 (ja) 1988-05-09 1995-03-06 日本電気株式会社 多層印刷配線板の製造方法
JP2681292B2 (ja) 1988-12-24 1997-11-26 イビデン電子工業株式会社 多層プリント配線板
US5043794A (en) 1990-09-24 1991-08-27 At&T Bell Laboratories Integrated circuit package and compact assemblies thereof
JP2516489B2 (ja) 1991-05-22 1996-07-24 住友軽金属工業株式会社 力センサ及び力測定装置
JP3026126B2 (ja) 1991-12-13 2000-03-27 日本ミクロン株式会社 削り出しによるチップキャリア
JPH09199526A (ja) * 1996-01-18 1997-07-31 Hitachi Ltd 半導体装置
JPH1056109A (ja) * 1996-08-12 1998-02-24 Hitachi Ltd 半導体装置
JPH1167963A (ja) * 1997-08-26 1999-03-09 Matsushita Electric Works Ltd 半導体装置
US6451624B1 (en) 1998-06-05 2002-09-17 Micron Technology, Inc. Stackable semiconductor package having conductive layer and insulating layers and method of fabrication
TW472330B (en) 1999-08-26 2002-01-11 Toshiba Corp Semiconductor device and the manufacturing method thereof
JP2001144218A (ja) * 1999-11-17 2001-05-25 Sony Corp 半導体装置及び半導体装置の製造方法
JP2001177051A (ja) 1999-12-20 2001-06-29 Toshiba Corp 半導体装置及びシステム装置
JP2001291800A (ja) * 2000-04-10 2001-10-19 Nippon Micron Kk 電子部品用パッケージ
US6404043B1 (en) * 2000-06-21 2002-06-11 Dense-Pac Microsystems, Inc. Panel stacking of BGA devices to form three-dimensional modules
JP2002237682A (ja) 2001-02-08 2002-08-23 Cmk Corp 部品実装用凹部を備えた多層プリント配線板及びその製造方法
US6717061B2 (en) 2001-09-07 2004-04-06 Irvine Sensors Corporation Stacking of multilayer modules
CN100550355C (zh) 2002-02-06 2009-10-14 揖斐电株式会社 半导体芯片安装用基板及其制造方法和半导体模块
DE10320579A1 (de) * 2003-05-07 2004-08-26 Infineon Technologies Ag Halbleiterwafer, Nutzen und elektronisches Bauteil mit gestapelten Halbleiterchips, sowie Verfahren zur Herstellung derselben
JP4204989B2 (ja) * 2004-01-30 2009-01-07 新光電気工業株式会社 半導体装置及びその製造方法
EP1617714B1 (en) 2004-07-16 2008-09-10 STMicroelectronics S.A. Electronic circuit assembly, device comprising such assembly and method for fabricating such device
JP4520355B2 (ja) * 2005-04-19 2010-08-04 パナソニック株式会社 半導体モジュール
US7504283B2 (en) * 2006-12-18 2009-03-17 Texas Instruments Incorporated Stacked-flip-assembled semiconductor chips embedded in thin hybrid substrate
SG146460A1 (en) 2007-03-12 2008-10-30 Micron Technology Inc Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5861670A (en) * 1979-10-04 1999-01-19 Fujitsu Limited Semiconductor device package
US5490324A (en) * 1993-09-15 1996-02-13 Lsi Logic Corporation Method of making integrated circuit package having multiple bonding tiers
US6861737B1 (en) * 1996-12-30 2005-03-01 Samsung Electronics Co., Ltd. Semiconductor device packages having semiconductor chips attached to circuit boards, and stack packages using the same
US20040175916A1 (en) * 1999-05-20 2004-09-09 Amkor Technology, Inc. Stackable semiconductor package having semiconductor chip within central through hole of substrate
US7132841B1 (en) * 2000-06-06 2006-11-07 International Business Machines Corporation Carrier for test, burn-in, and first level packaging
US20040041260A1 (en) * 2002-08-29 2004-03-04 Wood Alan G. Semiconductor component with backside contacts and method of fabrication

Also Published As

Publication number Publication date
KR101407773B1 (ko) 2014-07-02
US20100279466A1 (en) 2010-11-04
KR20090122283A (ko) 2009-11-26
CN101632175B (zh) 2012-02-22
US8138021B2 (en) 2012-03-20
CN101632175A (zh) 2010-01-20
WO2008112643A2 (en) 2008-09-18
TW200901435A (en) 2009-01-01
EP2130224A2 (en) 2009-12-09
WO2008112643A3 (en) 2008-12-18
TWI374536B (en) 2012-10-11
US20080224298A1 (en) 2008-09-18
JP5467458B2 (ja) 2014-04-09
US7759785B2 (en) 2010-07-20
EP2130224B1 (en) 2019-08-14
JP2010521818A (ja) 2010-06-24

Similar Documents

Publication Publication Date Title
SG146460A1 (en) Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
SG130055A1 (en) Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices
TW200608557A (en) Stacked semiconductor device
SG139594A1 (en) Microelectronic devices and methods for manufacturing microelectronic devices
WO2012006063A3 (en) Microelectronic package and method of manufacturing same
TW200629523A (en) Stacked die module
SG151204A1 (en) Integrated circuit package system with leadframe array
EP2043152A3 (en) Electronic apparatus with stacked semiconductor chips and manufacturing method thereof
WO2011071603A3 (en) Module package with embedded substrate and leadframe
JP2010521818A5 (enExample)
SG135074A1 (en) Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
GB201020062D0 (en) Multi-chip package
WO2009042546A3 (en) Stacked dual-die packages, methods of making, and systems incorporating said packages
TW200715499A (en) Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts
TW200711018A (en) Microfeature assemblies including interconnect structures and methods for forming such interconnect structures
MY199192A (en) Integrated circuit package having wire-bonded multi-die stack
SG144096A1 (en) 3d electronic packaging structure with enhanced grounding performance and embedded antenna
WO2009129334A3 (en) Three-dimensional semiconductor device structures and methods
WO2012174449A3 (en) Microelectronic device, stacked die package and computing system containing same, method of manufacturing a multi¬ channel communication pathway in same, and method of enabling electrical communication between components of a stacked-die package
TW200917396A (en) Semiconductor assemblies and methods of manufacturing such assemblies
SG151188A1 (en) Integrated circuit package system with dual connectivity
EP2650917A3 (en) Multilayered semiconductor device, printed circuit board, and method of manufacturing multilayered semiconductor device
WO2007041155A3 (en) Microelectronic package having multiple conductive paths through an opening in a support substrate
SG137770A1 (en) Interconnect structure and formation for package stacking of molded plastic area array package
TW200711152A (en) Three-dimensional interconnect interposer adapted for use in system in package and method of making the same