TWI369772B - Semiconductor device and display device having alignment mark - Google Patents

Semiconductor device and display device having alignment mark

Info

Publication number
TWI369772B
TWI369772B TW096140319A TW96140319A TWI369772B TW I369772 B TWI369772 B TW I369772B TW 096140319 A TW096140319 A TW 096140319A TW 96140319 A TW96140319 A TW 96140319A TW I369772 B TWI369772 B TW I369772B
Authority
TW
Taiwan
Prior art keywords
alignment mark
display device
semiconductor device
semiconductor
display
Prior art date
Application number
TW096140319A
Other languages
English (en)
Other versions
TW200834866A (en
Inventor
Hideaki Horii
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of TW200834866A publication Critical patent/TW200834866A/zh
Application granted granted Critical
Publication of TWI369772B publication Critical patent/TWI369772B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/708—Mark formation
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7088—Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0615—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0494—4th Group
    • H01L2924/04941—TiN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Multimedia (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Liquid Crystal (AREA)
  • Structure Of Printed Boards (AREA)
TW096140319A 2006-11-28 2007-10-26 Semiconductor device and display device having alignment mark TWI369772B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006319568A JP5425363B2 (ja) 2006-11-28 2006-11-28 半導体装置、及び表示装置

Publications (2)

Publication Number Publication Date
TW200834866A TW200834866A (en) 2008-08-16
TWI369772B true TWI369772B (en) 2012-08-01

Family

ID=39462730

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096140319A TWI369772B (en) 2006-11-28 2007-10-26 Semiconductor device and display device having alignment mark

Country Status (5)

Country Link
US (1) US7825529B2 (zh)
JP (1) JP5425363B2 (zh)
KR (1) KR100928856B1 (zh)
CN (1) CN101192596B (zh)
TW (1) TWI369772B (zh)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4378387B2 (ja) * 2007-02-27 2009-12-02 Ｏｋｉセミコンダクタ株式会社 半導体パッケージ及びその製造方法
JP5259211B2 (ja) 2008-02-14 2013-08-07 ルネサスエレクトロニクス株式会社 半導体装置
US8183701B2 (en) * 2009-07-29 2012-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. Structure of stacking scatterometry based overlay marks for marks footprint reduction
US9000525B2 (en) 2010-05-19 2015-04-07 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for alignment marks
TWI433290B (zh) * 2011-03-23 2014-04-01 Raydium Semiconductor Corp 半導體裝置
TW201240055A (en) * 2011-03-23 2012-10-01 Raydium Semiconductor Corp Semiconductor device
TWI466260B (zh) * 2012-05-28 2014-12-21 Au Optronics Corp 對位結構
KR20140017086A (ko) 2012-07-30 2014-02-11 삼성디스플레이 주식회사 집적회로 및 이를 포함하는 표시 장치
TWI543328B (zh) * 2012-08-01 2016-07-21 天鈺科技股份有限公司 具有對準標記的半導體器件以及顯示裝置
JP2015079848A (ja) * 2013-10-17 2015-04-23 シナプティクス・ディスプレイ・デバイス株式会社 表示装置駆動用半導体集積回路装置
KR102163358B1 (ko) * 2014-07-21 2020-10-12 엘지디스플레이 주식회사 디스플레이 장치
CN104407742B (zh) * 2014-12-12 2017-03-15 合肥鑫晟光电科技有限公司 触控基板及其制备方法、显示装置
CN110299345B (zh) * 2018-03-22 2020-09-29 联华电子股份有限公司 测量标记与监测半导体制作工艺的方法
CN108878401B (zh) * 2018-07-05 2020-04-21 长江存储科技有限责任公司 光学对准标记、光学定位方法以及半导体器件
KR20210026432A (ko) * 2019-08-30 2021-03-10 에스케이하이닉스 주식회사 반도체 메모리 장치
CN113725196A (zh) * 2021-08-31 2021-11-30 长江存储科技有限责任公司 半导体结构及其形成方法
CN114713993B (zh) * 2022-04-28 2023-05-30 江苏卡蒂罗网络科技有限公司 一种可调式cnc雕刻光影工艺

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JPS5890728A (ja) * 1981-11-25 1983-05-30 Nippon Telegr & Teleph Corp <Ntt> 半導体ウエファ上の位置合せ用マ−クの製法
JPS6218714A (ja) * 1985-07-18 1987-01-27 Nippon Telegr & Teleph Corp <Ntt> アライメントマ−クの形成方法
JP2855868B2 (ja) * 1990-03-12 1999-02-10 富士通株式会社 レーザトリミング用位置合わせマーク、半導体装置及び半導体装置の製造方法
JP2650182B2 (ja) 1995-01-17 1997-09-03 ソニー株式会社 位置合せマーク並びに該マークを有する電子装置及びその製造方法
US5858854A (en) * 1996-10-16 1999-01-12 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming high contrast alignment marks
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JP3566133B2 (ja) * 1999-05-11 2004-09-15 セイコーインスツルメンツ株式会社 半導体装置の製造方法
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US7271907B2 (en) * 2004-12-23 2007-09-18 Asml Netherlands B.V. Lithographic apparatus with two-dimensional alignment measurement arrangement and two-dimensional alignment measurement method

Also Published As

Publication number Publication date
CN101192596B (zh) 2012-06-13
JP5425363B2 (ja) 2014-02-26
KR100928856B1 (ko) 2009-11-30
US7825529B2 (en) 2010-11-02
KR20080048395A (ko) 2008-06-02
JP2008135495A (ja) 2008-06-12
US20080121915A1 (en) 2008-05-29
CN101192596A (zh) 2008-06-04
TW200834866A (en) 2008-08-16

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