TWI350579B - Integrated circuit device, method for forming and operating an integrated circuit, method for forming and operating a semiconductor device - Google Patents

Integrated circuit device, method for forming and operating an integrated circuit, method for forming and operating a semiconductor device

Info

Publication number
TWI350579B
TWI350579B TW096143663A TW96143663A TWI350579B TW I350579 B TWI350579 B TW I350579B TW 096143663 A TW096143663 A TW 096143663A TW 96143663 A TW96143663 A TW 96143663A TW I350579 B TWI350579 B TW I350579B
Authority
TW
Taiwan
Prior art keywords
operating
forming
integrated circuit
semiconductor device
circuit device
Prior art date
Application number
TW096143663A
Other languages
English (en)
Other versions
TW200830475A (en
Inventor
Shih Wei Wang
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200830475A publication Critical patent/TW200830475A/zh
Application granted granted Critical
Publication of TWI350579B publication Critical patent/TWI350579B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
TW096143663A 2006-11-20 2007-11-19 Integrated circuit device, method for forming and operating an integrated circuit, method for forming and operating a semiconductor device TWI350579B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/602,065 US7994564B2 (en) 2006-11-20 2006-11-20 Non-volatile memory cells formed in back-end-of line processes

Publications (2)

Publication Number Publication Date
TW200830475A TW200830475A (en) 2008-07-16
TWI350579B true TWI350579B (en) 2011-10-11

Family

ID=39416076

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096143663A TWI350579B (en) 2006-11-20 2007-11-19 Integrated circuit device, method for forming and operating an integrated circuit, method for forming and operating a semiconductor device

Country Status (2)

Country Link
US (2) US7994564B2 (zh)
TW (1) TWI350579B (zh)

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* Cited by examiner, † Cited by third party
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US8004060B2 (en) * 2007-11-29 2011-08-23 International Business Machines Corporation Metal gate compatible electrical antifuse
JP2013069947A (ja) * 2011-09-26 2013-04-18 Toshiba Corp 不揮発性半導体記憶装置の製造方法および不揮発性半導体記憶装置
GB201418888D0 (en) 2014-10-23 2014-12-10 Univ Lancaster Improvements relating to electronic memory devices
WO2018174514A1 (ko) * 2017-03-24 2018-09-27 광주과학기술원 다중레벨 저항 및 정전용량 메모리 특성을 갖는 비휘발성 메모리 소자 및 그 제조방법

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Also Published As

Publication number Publication date
US20110267897A1 (en) 2011-11-03
US20080116505A1 (en) 2008-05-22
US7994564B2 (en) 2011-08-09
US8247293B2 (en) 2012-08-21
TW200830475A (en) 2008-07-16

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MM4A Annulment or lapse of patent due to non-payment of fees