TWI349306B - Method for forming fine pattern of semiconductor device - Google Patents
Method for forming fine pattern of semiconductor deviceInfo
- Publication number
- TWI349306B TWI349306B TW096105208A TW96105208A TWI349306B TW I349306 B TWI349306 B TW I349306B TW 096105208 A TW096105208 A TW 096105208A TW 96105208 A TW96105208 A TW 96105208A TW I349306 B TWI349306 B TW I349306B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- fine pattern
- forming fine
- forming
- pattern
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0338—Process specially adapted to improve the resolution of the mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3085—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20060018144 | 2006-02-24 | ||
KR1020060131936A KR100861212B1 (en) | 2006-02-24 | 2006-12-21 | Method for forming fine patterns of semiconductor devices |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200733225A TW200733225A (en) | 2007-09-01 |
TWI349306B true TWI349306B (en) | 2011-09-21 |
Family
ID=38549355
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096105208A TWI349306B (en) | 2006-02-24 | 2007-02-13 | Method for forming fine pattern of semiconductor device |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP4901526B2 (en) |
KR (1) | KR100861212B1 (en) |
CN (1) | CN100550288C (en) |
TW (1) | TWI349306B (en) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7314810B2 (en) * | 2006-05-09 | 2008-01-01 | Hynix Semiconductor Inc. | Method for forming fine pattern of semiconductor device |
KR100763538B1 (en) * | 2006-08-29 | 2007-10-05 | 삼성전자주식회사 | Method of forming mask pattern and method of forming fine pattern using the same in a semiconductor device fabricating |
JP4932671B2 (en) * | 2007-10-26 | 2012-05-16 | 東京エレクトロン株式会社 | Etching mask forming method, control program, and program storage medium |
KR100932333B1 (en) * | 2007-11-29 | 2009-12-16 | 주식회사 하이닉스반도체 | Hard Mask Pattern of Semiconductor Device and Formation Method |
KR101439394B1 (en) | 2008-05-02 | 2014-09-15 | 삼성전자주식회사 | Method for forming fine patterns by double patterning process using acid diffusion |
KR101087835B1 (en) * | 2009-11-26 | 2011-11-30 | 주식회사 하이닉스반도체 | Method for fabricating fine pattern of semiconductor device |
US8461053B2 (en) * | 2010-12-17 | 2013-06-11 | Spansion Llc | Self-aligned NAND flash select-gate wordlines for spacer double patterning |
US8980757B2 (en) | 2011-12-15 | 2015-03-17 | Intel Corporation | Methods for single exposure—self-aligned double, triple, and quadruple patterning |
US8765612B2 (en) * | 2012-09-14 | 2014-07-01 | Nanya Technology Corporation | Double patterning process |
CN103839781B (en) * | 2012-11-21 | 2016-05-25 | 中芯国际集成电路制造(上海)有限公司 | The formation method of semiconductor fine pattern |
KR101882561B1 (en) * | 2015-10-02 | 2018-07-26 | 삼성에스디아이 주식회사 | Cmp slurry composition for organic film and polishing method using the same |
US10700072B2 (en) * | 2018-10-18 | 2020-06-30 | Applied Materials, Inc. | Cap layer for bit line resistance reduction |
TWI750574B (en) * | 2020-01-31 | 2021-12-21 | 華邦電子股份有限公司 | Semiconductor memory structure and method for forming the same |
CN113363217B (en) * | 2020-03-04 | 2024-02-06 | 华邦电子股份有限公司 | Semiconductor memory structure and forming method thereof |
US11205574B2 (en) | 2020-03-05 | 2021-12-21 | Winbond Electronics Corp. | Method for forming a semiconductor memory structure |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54155771A (en) * | 1978-05-29 | 1979-12-08 | Nec Corp | Pattern forming method |
JPS62166520A (en) * | 1986-01-20 | 1987-07-23 | Nec Corp | Patterning method for fine pattern |
JPH02266517A (en) * | 1989-04-06 | 1990-10-31 | Rohm Co Ltd | Manufacture of semiconductor device |
JP3906037B2 (en) * | 2001-04-20 | 2007-04-18 | 株式会社東芝 | Manufacturing method of semiconductor device |
KR100694412B1 (en) | 2006-02-24 | 2007-03-12 | 주식회사 하이닉스반도체 | Method for forming fine patterns of semiconductor devices |
KR100744683B1 (en) | 2006-02-27 | 2007-08-01 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device |
-
2006
- 2006-12-21 KR KR1020060131936A patent/KR100861212B1/en not_active IP Right Cessation
-
2007
- 2007-02-13 TW TW096105208A patent/TWI349306B/en not_active IP Right Cessation
- 2007-02-16 CN CNB2007100792890A patent/CN100550288C/en not_active Expired - Fee Related
- 2007-02-23 JP JP2007043716A patent/JP4901526B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP4901526B2 (en) | 2012-03-21 |
JP2007227934A (en) | 2007-09-06 |
KR100861212B1 (en) | 2008-09-30 |
CN100550288C (en) | 2009-10-14 |
TW200733225A (en) | 2007-09-01 |
CN101026086A (en) | 2007-08-29 |
KR20070088248A (en) | 2007-08-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI340407B (en) | Method for forming fine pattern of semiconductor device | |
TWI349306B (en) | Method for forming fine pattern of semiconductor device | |
TWI365508B (en) | Manufacturing method of semiconductor device | |
TWI369717B (en) | Method for forming semiconductor device | |
TWI368259B (en) | Method for forming fine patterns in semiconductor device | |
TWI366875B (en) | Method of manufacturing semiconductor device | |
TWI348746B (en) | Method for fabricating semiconductor device | |
TWI339861B (en) | Method for etching single wafer | |
EP2088626A4 (en) | Process for producing silicon carbide semiconductor device | |
TWI318439B (en) | Method for manufacturing semiconductor device | |
EP2353172A4 (en) | Methods of forming a masking pattern for integrated circuits | |
TWI371062B (en) | Method of manufacturing semiconductor apparatus | |
TWI365490B (en) | Semiconductor device and method for manufacturing same | |
EP1986217A4 (en) | Method for manufacturing semiconductor substrate | |
EP2015353A4 (en) | Semiconductor device and method for manufacturing semiconductor device | |
HK1132584A1 (en) | Method for manufacturing semiconductor sensor device | |
TWI341553B (en) | Method of forming resist pattern | |
TWI318008B (en) | Method of manufacturing semiconductor device | |
EP2096678A4 (en) | Semiconductor device and method for manufacturing semiconductor device | |
EP2033739A4 (en) | Method for producing wafer | |
EP2048697A4 (en) | Method for reusing removed wafer | |
EP2092552A4 (en) | Semiconductor device manufacturing method | |
TWI347379B (en) | Silicon wafer and method for producing same | |
EP2199861A4 (en) | Composition for forming silicon-containing fine pattern and method for forming fine pattern using the same | |
EP2020683A4 (en) | Semiconductor device and method for manufacturing same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |