TWI335639B - Improved mosfet using gate work function engineering for switching applications - Google Patents
Improved mosfet using gate work function engineering for switching applications Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4983—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
Description
1335639 九、發明說明： 【發明所屬之技術領域】 . 本發明係揭露一種功率金氧半場效電晶體(Power MOSFET)的電 路結構(Circuit C〇nfiguration)和構裝結構(package c〇_uratj〇n)，特 別係關於-種透過難的裝置來調整金氧半導_極結構的功函數， 以預防擊穿效應問題(Shoot Through)的發生。 【先前技術】 傳統的功率金氧半場效電晶體仍面臨擊穿效應問題，以導致過度 的功率(此邮故_與效率損失(efficiency丨oss)。如第，圖所示，此電 琴路圖為傳紐壓轉換H 10，其中包含—高㈣端金氧半場效電晶體 (High-Side M0SFET)15與-低電壓端金氧半場效電晶體（L〇w_Side MOSFET)20串連在-輸入端25(輸入電壓以Vjn表示)與一地端3〇之 間。低電壓端金氧半場效電晶體20的没極（Drain)連接到高電；1端金 氧半場效電晶體15的源極(Source)，兩者之間並透過一電感L與一電 容C搭接到負載（Load) 40。當降壓轉換器在高速運轉時〜，擊穿效應 狀態將會疋個問喊，因為當尚電壓端與低電壓端金氧半場效電晶體兩 個同時啟動時會造成-娜穿效應紐在輸人端25與_加之間流 鲁動。此舉將導致過度的功率與功效損失。為了要防止擊穿效應問題， -控制電路45被導人來控制高電壓端與低電壓端金氧半場效電晶體 的閘極訊號並在閘極訊號間產出一個停滯時間。第2圖顯示了當高電 壓端金氧半場效電晶體在關狀態與低電壓端金氧半場效電晶^在開 啟狀態時，該停滞時間將可避免高電壓端與低電壓端金氧半場效電晶 體同時啟動。 然而，擊穿效應問題還是不能完全被避免。如第3圖所示，當高 電壓端金氧半場效電晶體啟動時，中__接處35將核大比例的 電壓改變_dt)並導錄電壓端錄半場效電晶體會產线大的波極 電流(Drain Current)。第4A圖展示了降塵轉換器的等效電路，裡面的 5 1335639 -没極電流產出緩流(Flow)通過閘極没極電容，然後該緩流將會經由内 部閘極源電容(Internal Gate-Drain Capacitor Cb)或是一個由閘極電阻 . (Gate resbtor Rg)電感（丨nductor Lg)與外部閘極驅動電阻(External Gate D「ive Resistance Rext)所組成的等效電路而流到接地。在該情況 下’假使從閘極到接地的阻抗沒有達到某種程度，沒極電流(CdgMV/dt) 流過低電壓端金氧半場效電晶體的閘極時將會產生降壓，該降壓的值 將會大到可以啟動低電壓端金氧半場效電晶體並且導致擊穿效應。 如第4B圖所示，在全橋應用中，一 Dc電源供應(Vin)驅動一電 感負載(L卜在半週期時，Q1和Q4開啟而〇2和Q3則關閉，電流從 > Q1流到L和Q4流到接地。在下半週期内，Q2和Q3開啟而Q1和 Q4則關閉’電流從Q2流到L和Q3流到接地。在這一刻，Q2必須 開啟而Q4必須要完全關閉。然而在Q2開啟時的大比例變壓可能強迫 Q4強行啟動並如上面所敘導致擊穿效應。 在現代電路設計中，設計者一般會使用一大閘極源電容(Cgs)或是 一低Crss/Ciss比例來控制問題《輸入電容值q^s與反饋電容值c「ss 是由以下公式所推出的：
Ciss = Cgd + Cgs Crss = Cgd . 此外，該問題也可以利用-低閘極電使用一高電流閉極驅動 並有低外部電阻。不過假使閘極驅動電路系統，例如，控制電路45， 疋被金氧半場效電晶體所遙控的，Lg的電感值可能變得非常大。這會 造成搭接在Rg和Rext和Lg之間的電流路徑擁有高阻抗值，留下只 有Cgs路徑來消除該瞬間電流。唯一壓制擊穿效應電流的方法為增二 Cgs的電感值來降低阻抗。然而，這個解法將會使在低電壓端金氧半 場效電晶體20的閘極電荷過量的遺失。根據以上所敘述的理由，一個 擁有相隨㈣人在設計-繼有_預_穿賴的轉換器上時都 會充滿限制與困難。 6 1335639 第5A圖展不了一般傳統溝槽金氧半場效電晶體(丁阳门比 MOSFET)。如圖所示’在這個溝槽金氧半場效電晶體記憶胞結構，該 '閘極沒極電容(Cgd)是由一系列的氧化電容(Cox)與空乏層電容(Cdep> 所結合成的。一個函數上的關係可以藉由以下公式表示：
Cgd=Cox*Cdep/(Cox+Cdep) 如第5B圖所顯示，閘極沒極電容值(Cgd)隨著汲極對源極偏壓電 壓(Drain Bias Vo丨tage)Vds的增加而急速下降，因為空乏電容(cdep) 的減與在高偏壓下，空乏寬度的增加。當沒極對於源極偏壓_)小 時’氧化電容(Cox)將會處於支配狀態的來決定Cdg的電容值。既然 Cox值y能非常高’他很可能會變成產生擊穿效應電流的供應者。為 了解決這㈣題，存在料同記憶胞的結構糾低氧化電阻(c〇x)。第 6圖展示了先前技術的溝槽錄半場效電晶體，該金氧半場效電晶體 有個厚底氧化層幫助減少從閘極到沒極(Cgd)的電容。這種記憶胞結 構更近-步提供額外的域，就是能減少整段完整Vds電壓的電容 值第6B圖展不了另外一種傳統解法，其方法係利用在閘極電極之下 插入一個第二電極以及聯繫到源極電位，該電極保護該閘極免受於汲 極&因而降低了閘極對汲極電容值(Cdg)。然而，以上這兩種配置對於 製造過程都增加了相當可觀的複雜性。此外，因為凹槽式電極還有氧 化的控制十分困難，所以會額外的複雜。 一因此，金氧半場效電晶體在裝置結構與製造方法上的技術仍需要 進步的改良，讓擁有閘極的工作效能的金氧半場效電晶體裝置能偏 移電容電壓(C-V)效能上的特性以防止擊穿效應的發生 以及並且有效 的解決以上所討論到先前技術所遇到的難題。 【發明内容】 =本發明之主要目的係在提供更好的金氧半場效電晶體裝置，藉由 調整閘極材料的工作效能來增加臨界與偏移電容電壓(C-V)特性。因為 開啟閘極將需要更高的電壓，所以這將解決擊穿效應的問題。另外， 7 1335639 偏移C-Vds操作上的特性可以同時解決技術上的困難與限制。 本發明之另-目義在提供更好的錄伟效電晶^置 在N-金氧半場效電晶體裡面導人P，賴極以提高閘虹作、。千 能增加臨界電壓和偏移C_Vd特性。Cgd的減少將達到抑; 穿效應的目標並解決上述的_。顿傳統的技術如第5圖 到Cgd電容值的降低可以在不複賴造過程與凹處電極的: 簡言之’在-較佳實施例巾本發_露__種金 氧半場效電晶體)裝置。該裝置更進-步地包含一溝槽間極2;= ，整閘極功函數的材料來增加臨限的絕對值與降低閘極没極電 (Cgd卜在另-較佳實施例中，該金氧半場效電晶體裝置更進一步地包 含-溝槽祕填滿了祕材料，該材料在N•通道金氧半場效電晶體^ ，有功函數更高於N+多晶相及在P.通道上具有功函數更低:p+ 夕。在另—錄實關巾’該錄半觀電晶狀N_通道的金氧 半場效電晶體而且溝槽閘極填滿了 p_摻雜閘極材料。在另一較佳 =，該金氧半場效電晶奴卩_通道的金氧半場效電晶體而且溝槽間 閘極材料。在另—較佳實施例中，該金氧半場效電晶 第-導電型的-通道，其溝槽閘極則填滿了第二導電型間極 t在另-較佳實施例中，對dvds/dT的反應，藉由調整該功函數， I溝槽閘極材料更近-步的減少Vgs尖(SPIKE)，在此，Vgs代表一 :極汲極電壓而dvds/dT則代表沒極對源極電壓在時間上的改變比 i在另—較佳實施例中，為了調整功函數來減少該cgd值，該溝槽 材料更近-步的偏移代表著閘極對沒極電容 :線’以來表達汲姆源極電華s)的—個功能。(/另)—較佳 該閘極材料更财—合金料高達ι〇Λ22/ατι3的p•❹梦 來降侧極電阻。在另—健實酬中綱極材料溝槽更包含多 夕化物來更步的改善閘極阻抗。在另一較佳實施例中該間極材 8 1335639 極材料。在另-較佳實施例中，該閘極材料包含了- 滿梯槽::氧半場效電晶_更包含了-個充 辦Λ 2明更揭路—縣由用有功函數賴靖料來填滿溝槽間極以 曰體^、^ 較佳實施例中，該方法更包括金氧半場效電 ===在讀間極裡填滿了祕材料的步驟，而該材料在ν·通 ====1 嫌娜叫娜縱通道上 的目軸舰後，本發明 【實施方式】 措斷5、自m圖為本發明之一新卜通道金氧半場效電晶體記憶胞100之 金氧半場效電晶體1GG是形成在—個運作如_般 的基板105上。支撐一個N_蟲晶層11〇的該N+基板與在更深 =土極區120上形成的N+源極區115隨即形成一接 場效電晶體1GG更包含—祕125由多_沈= 。該溝槽是從磊晶廣含有一閘極氧化層來絕緣閘極所形 ί 徑由源極產生經岭基極裡所形摘—通道，沿著閘 100 伸聰Ν+基板1Q5。在純金氧半場效電晶體記憶胞 了素數將被改變以為了在c-v特性裡製造一偏移。為 的改變，該閉極與一p•型推雜物推雜在一起並形成 如第7A圖裡的p_型閘極所示，該臨限電壓(vth)增加 壓對於壓制擊穿效應是很有利的’因為需要更高的尖峰(sp㈣來啟動 9 1335639 閘極。正常來說，—個N通道金屬氧化半導體使肖N•型摻雜多晶石夕間 極’以及-個P.通道金屬氧化半導體使用p_型摻雜多晶顯極來達成 低臨限與低_組抗。—般N金魏辨導體的正常功函數大概是在 4.05ev，P金屬氧化半導體大概是在5 i5ev。 表1展示了在-個在30伏特的金氧半場效電晶體裝置裡，一個 表1
Ciss (ον) Ciss (〇V) Ciss (ον) Ciss (15V) Ciss (15V) 625pf Ciss (15V) 395pf vt Rds(4.5) P-閘極 N通道 9.2nf 2.19nf 1.09nf 2.26V 2.95 mohm N-閘極 N通道 报 8.86nf M·楚 7 口 4.18nf ί 固4·拉 3.1nf 6.1nf 636pf 420pf --- 1.18V 2.6 mohm x 效電晶體記憶胞之側 :广樣的，除了額25,具有一個p掺雜濃度的梯 極在上面部分有而量的P+摻雜濃度，中間部分有中量的p摻雜濃产以 2:=1=濃=一個濃縮的梯度_^^ 處來減y Crss ’尤其疋在更㈣_運作如町所示 設計者額外的參數來使他們設計的更為完美。 /、 第8A圖是第Μ與7B圖金氧半場效電晶體裝置的相 如上面所討論的，在Cgd-Vds特性裡，"伏特 :
Vds之間的函數關係)在0伏特時會減少Crss就如第8(B=t值與 外，閘極摻雜物的梯度分布更近一步在高電壓時減少Crss n 8D圖展示了 P+間極裝置，減少後的Vga尖 第8= dVT的反應。與更高Vt的連接，本發日職 氧 =應= 體裝置顯著的增加了裝置對於擊穿效應問題 【+~效電晶 1335639 • *在一個實際的導入’為了要保持狀態中阻抗值低，我們塑造-個 薄閘極氧化層130。該薄氧化層同時有維持更高as的好處，並導致 ‘更小的CrWCiSS比例。因導入—個p-型閘極以致提高閘極阻抗的憂 心，可以藉由增加多轉摻雜物或實施-侧極多晶魏物結構來規 避。 藉由調整閘極材料的功函數來增加臨限電壓並且偏移Cgd_vds特 性的改良新裝置也有可能_其他技術達成，例來說，_嫣或是 卿化物閘極來取代p-型閘極材料，也有可能提高閘極材料的功函 數。對錄有侧技術的人’任何㈣或合金或是摻雜質，只要是 •可以用來提高閘極材料的功函數高於n+多晶梦，都有可能利用於n_ 通道。任何材料或合金或是摻雜雜質，只要是可以用來降低閉極材，料 的功函數低於p+多晶石夕，都有可能利用於p-通道。這些都可 敘的好處。
f 9A到9E圖為-系列的侧剖視圖說明帛7八與7B冑中 場效電晶體裝置之製造過程。在第9A圖，一個第一罩幕，如光阻215 與遮蔽氧化層(沒顯不出來)被用來實行植入一個P_型離 體來形成複數個P·基極區220，在一個支撲在N+基板2〇5的N 層210。然後一個擴散過程開始執行來在該蟲晶層210上形成Ρ·基極 區220。在第9Β圖，-個第二罩幕，如源極罩幕挪，被用來實行植 入-個Ν+離子摻雜物到—個擴散過程來形成Ν +源極區 230。在第9C圖…個第三罩幕，如溝槽罩幕，被用來實行蝴與打 開複數溝槽235，該溝槽會垂直延伸越過基極區22〇的最底層。更 多的步驟會陸執行像是溝槽_化，具有犧牲㈣氧化的^除， 閘極氧化層的構成’多砂在溝槽235裡面的沈積來形摘極24〇， 以及多晶树雜步驟來製造如上面所解_ ρ.型多晶㈣極。一 同摻雜的閘極也許可以利用在原位子離子植入來達成。為了要達成間 極摻雜濃度舰度分佈，-個精準㈣的離子植人隨著—個快速的擴 11 1335639 散或許可以在碱步驟前錢執行來H乡晶料在溝槽。在第％ 圖’-個絕緣的BPSG層245隨著第四罩幕的應用被沈積，例如 罩幕用來#刻複數接觸面，隨之植人—個改善主體觸碰間阻抗的操 作。然後是-個金屬層的沈積以及第五罩幕，如金屬罩幕被用來執行 餘刻和把金屬層給圖絲刻進源極金屬25G與閘極金屬26Q。用來植 入的光阻罩幕只留下紐印區域供未來形成的層對準。為了克服這個 難處，-個特別的罩幕，舉例來說，通常是指像是第〇罩幕被用來
侧調準目標。分開來調準每個目標到第G的圖案侧可以相對彼此 的調準基極，源極和溝槽罩幕。 以上所述之實施例僅係為說明本發明之技術思想及特點，其目的 在使熟習此項技藝之人士能夠瞭解本發明之内容並據以實施，當不能 以之限定本發明之專職圍，即大凡依本發賴揭示讀神所作之均 等變化或修飾’鋪涵蓋在本發明之專·關。糊來說，—個p 通道裝置可以用來壓制擊穿效應藉由採納一個N摻雜閘 【圖式簡單說明】 第1圖為傳統降壓轉換器電路方塊示意圖。 =2圖為第-圖高電壓端與低電壓端金氧半場效電晶體的閘極電壓波 仏不意圖。 =3圖為當高t壓端金氧半場效電晶體的雜伏特age(Vds)高速率改 時’低電壓端金氧半場效電晶體的閘極針型與汲極對源極電壓(Vd 之示意圖。 4A圖為傳統電子電路企圖解決如第三圖所顯示的擊穿效應。 第4B圓為傳統橋式反流器電路方塊示意圖。 第5A圖為一般傳統溝槽金氧半場效電晶體之示意圖。 第5B圖為該閘極汲極電容(Cgd)對源極偏壓電壓(Vds)之曲線示意圖。 第6A圖為先前技術的溝槽金氧半場效電晶體’該金氧半場效電晶體底 層有層氧化用來減少從閘極到沒極(Cgd)的電容值示意圖。 12 1335639 下並聯繫到源極法’其方法為插入一第二電極在間_極之 晶體之側錢半場效電 圖。為第Μ圖與第7β圖金氧半場效電晶體裝置之相等電路示意 第8B圖為C々曲線圖，顯示c_ 型間極的偏移。 的特性與第7 _顯示之p_ ，8C與8D圖為Vds與Vgs的時 第9A到第9E圖為—系列 =曲線圖。 製造流程之*_ /觸㈣侧展吨金財場效電綠裝置的 【主要元件符號說明】 10傳統降壓轉換器 15高電壓端錢半場效電晶體 20低電壓端金氧半場效電晶體 25輸入端 30地端 35銜接處 40負載 45控制電路 1〇〇 N-通道金氡半場效電晶體記憶胞 105 N+基板 110 N-磊晶層 115 N+源極區 120 p-基極區 13 1335639 ^ 125 閘極 130薄閘極氧化層 205 N+基板 210磊晶層 215 光阻 220 P-基極區 225源極罩幕 230 N +源極區 235溝槽 # 240閘極 245 BPSG 層 250 源極金屬 260 閘極金屬
Claims (1)
- ^335639 修正本 η丨ί 十、申請專利範圍： 1·一種金氧半場效電晶體裝置，包括： -重摻雜基板’在該金氧半場效電晶體為卜通道金氧半場效電晶體 時，該重摻雜基板為Ν型重摻雜基板，在該錄半場效電晶體為ρ一通 道金氧半場效電晶體時，該重摻雜基板為ρ型重掺雜基板；以及 -輕摻祕晶層’其係設於該重摻雜基板上，並與該重摻雜基板同型， 該輕摻雜蠢晶層具有-溝槽’該溝槽裝滿了—擁有掺雜濃度的垂直 分布之閘極材料與-閘極氧化層’以形成—溝槽閘極，該閘極氧化係位於該_材料與該輕摻雜蟲晶層之間，其中該材料在Ν—通道金氧 半場效電晶趙上具有功函數更高於Ν+多晶賴及在ρ_通道上具有功函數 更低於P+S砂’且該材料摻雜了 -摻雜物來調整該功函數以便辦加談 金氧半場效電晶體裝置的臨限電壓。 a 2_如申請專利範圍第1項所敘之金氧半場效電晶體裝置，其中該 半場效電晶體是個N·通道錢半場效電晶體以及麟槽填滿了一 p_ 摻雜閘極材料。 3:如申請專利_第1項所敘之金氧半場效電晶體裝置，其中該金氧半場效電晶體是個P·通道金氧半場效電晶體以及該溝娜滿了一 N_ 摻雜閘極材料。 、 4. 如申請專利範圍第1項所敘之金氧半場效電晶體裝置，其中該金氧 半場效電晶體包含了-第-導電型的—通道以及該溝槽充滿了 導電型閘極材料》 5. 如申請專利範圍第彳項所敘之金氧半場效電晶職置，其中該溝槽 閘極材料更包括對於-個dVds/dT的反應，藉由調整該功函數，能更 ，步減y VGS尖型。在此’ Vgs代表一閘極没極電壓而dVds/dT 則代纽極對條錢在_上的改變_，且找金氡半場效電晶體 為N-通道金氧半場效電晶體時，該摻雜物為p _物；在該金氧半場效電 15 Τ5Ί5639 修正本 晶體為p-通道金氧半場效電晶體時，該摻雜物為N摻雜物。 6.如申請專利範圍第1項所敘之金氧半場效電晶體裝置，其中該溝槽 _材料藉由調整功函數來減少該汲極電容值(Cgd)值，偏移代表著 極觀極電容值Cgd的C-V特性曲線，以來表奴極對來源電壓(Vds) 的個功能’且在該金氧半場效電晶體為通道金氧半場效電晶體時，該 摻雜物為•，在該金氧半場效電晶體為卜通道金氧半場效電晶體時: 該摻雜物為N摻雜物。 =申請專利顏第2項所敘之金氧半場效電晶體裝置，其中該問極 材枓更進-步包含-含有換雜物密度高達1〇Λ22/αη3的p-型多 參 之谢繼，其中‘ ㈣物峨繼，其中娜 =〇申請專圍第2項所狀錄半場效電晶體裝置 材料包含了-翻石夕化物閘極材料。 11·如申請專利範圍第1項所敘之金氧半場效 含I最高摻雜献的在上層，含有最低摻雜濃度的在下该閉極 12.-種製造金氧半場效電晶體裝置的方法，其中包括 層 提供-重#雜基板，其上财—姆雜^層，· 一溝槽，其中該金氧半場效電綠為‘迦2明層具有 ，摻雜基板為Ν型重掺雜基板，該金氧半場效電曰;體時，該 場效電晶料，該重摻雜基板為p型重摻 :道金氧半 與該重換雜基板同型，·以及 义重推雜基板，且該輕摻雜蟲晶層 利用擁有-垂直梯度摻賴度之_ 槽，以形成-溝槽閘極，其中該閘極氧你化層填滿該溝 摻賴晶層之間’且該材料祕通道金氧半==材料與該輕 更高於N+彡㈣崎在w道上钟功祕聽二功函數 16 I歹工+ 1 其12雜之錄條㈣亀製造方法， 二申成請:=極第：:二金=效=趙裝置製造方法， 權鴨偷碰购效鐵， ====112 物細繼製造方法， *:==::::=-金氡半場_ mm12嫌^氧半侧峨置製造方法， 氧===:=含了利_-_材料來增加該金 1Λ , . _電晶體上之該材料為N摻雜閘極材料。 18·如申請專概圍第12項所敛之金氧半場效電碰裝置製科造方法， =形成該溝槽閘極的該步驟包含了為了藉由調整功函數來減少該 雜綠雜贼極電“ 且在該N-通道金氧半場效電曰體上之㈣源極锁_的一個功能’ 道金氣半場效_^· 娜她娜通 咖2/cm3的p-型多晶石夕的開極材料來形成該物密度高達 17 1335639 修正本 20. 如申請專利範圍第12項所敘之金氧半場效電晶體裝置製造方法， 其中形成該溝槽閘極的該步驟包含了利用一多晶矽化物來形成該溝槽 閘極。 21. 如申請專利範圍第12項所敘之金氧半場效電晶體裝置製造方法， 其中形成該溝槽閘極的該步驟包含了利用一鎢閘極材料來形成該溝槽 閘極。 22. 如申請專利範圍第12項所敘之金氧半場效電晶體裝置製造方法， 其中形成該溝槽閘極的該步驟包含了利用一矽化物閘極材料來形成該 溝槽閘極。 1S
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-
2005
- 2005-06-06 US US11/146,499 patent/US20060273379A1/en not_active Abandoned
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2006
- 2006-06-06 WO PCT/US2006/022850 patent/WO2007073400A2/en active Application Filing
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- 2006-06-06 TW TW095119983A patent/TWI335639B/zh active
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| TW200703565A (en) | 2007-01-16 |
| US7863675B2 (en) | 2011-01-04 |
| WO2007073400A3 (en) | 2007-12-27 |
| US20110097885A1 (en) | 2011-04-28 |
| CN101194367A (zh) | 2008-06-04 |
| US20060273379A1 (en) | 2006-12-07 |
| US20080173956A1 (en) | 2008-07-24 |
| WO2007073400A2 (en) | 2007-06-28 |
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