TWI334615B - Integrated capacitors in package-level structures, processes of making same, and systems containing same - Google Patents

Integrated capacitors in package-level structures, processes of making same, and systems containing same Download PDF

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Publication number
TWI334615B
TWI334615B TW095147934A TW95147934A TWI334615B TW I334615 B TWI334615 B TW I334615B TW 095147934 A TW095147934 A TW 095147934A TW 95147934 A TW95147934 A TW 95147934A TW I334615 B TWI334615 B TW I334615B
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Taiwan
Prior art keywords
die
layer
dielectric film
core layer
top electrode
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TW095147934A
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English (en)
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TW200733161A (en
Inventor
John J Tang
Xiang Yin Zeng
Jiangqi He
Ding Hai
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Intel Corp
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Publication of TW200733161A publication Critical patent/TW200733161A/zh
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Publication of TWI334615B publication Critical patent/TWI334615B/zh

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Description

1334615 (1) 九、發明說明 【發明所屬之技術領域】 本發明實施例大致關係於晶片封裝內之電容。 【先前技術】 例如電容、電感及電阻之被動元件在積體電路（1C ) 晶片封裝內係愈來愈重要。例如，電容作出解耦合、回應 • 於處理機負載、射頻（RF)應用中之調頻與調變等等之功 能。在愈來愈大之壓力，有需要最小化被動RF裝置的情 形，以方便提供使用者以愈來愈小的封裝》因此，電容與 其他被動RF裝置很難設置在這些小封裝內。 【發明內容】與【實施方式】 本案中之實施例關係於內藏之被動裝置，其係被配置 在防焊膜與核心結構內。一實施例包含電容，其在防焊膜 • 內包含一頂電極。該防焊膜結構被修改以允許一零輪廓之 • 電容在現行防焊膜結構內。同樣地，核心結構被修改以允 - 許一零輪廓電容鄰近一電鍍貫孔。 以下說明包含用於說明目的之例如上、下 '第一、第 二等等之名稱，其並不是作爲限定用。於此所述之設備或 物件實施例可以以若干位置及取向下被製造、使用、運送 。名詞"晶粒"及"晶片"大致表示實體物件，其係爲各製程 操作所轉換爲想要積體電路裝置的基本工件。一晶粒通常 由一晶圓切開，該等晶圓係由半導體、非半導體、或半導 -5- (2) 1334615 體與非半導體材料的組合所作成》—板典型爲含浸樹脂的 玻璃纖維結構，其作爲晶粒的安裝基材。 參考附圖，相似結構將以相似字尾元件符號表示。爲 . 了清楚顯示各種實施例之結構，於此所示之附圖係爲積體 電路結構的代表圖。因此，製造結構的實際外表，例如， 在光微影中的外表可能不同，但仍加入有所示實施例的基 本結構。再者，圖式顯示了解所示實施例所必要之結構。 • 在本技藝中之其他結構爲圖式之清楚並未被加入。 第1A圖爲依據一實施例之用於晶粒之核心支撐結構 1 00的剖面圖。核心支撐結構（以下稱"核心結構"）1 00 係爲依據一實施例之有機-無機組成物。依據一實施例， 核心結構1〇〇爲一硬有機質，例如含浸FR4-樹脂玻璃纖 維。依據一實施例，該核心結構100爲有機與無機之組合 ，例如醯胺三氮雜苯（BT )樹脂。 第1B圖爲第1A圖所示之核心支撐結構100依據一實 • 施例在圖案化後之剖面圖。該圖案化核心結構101包含一 • 週邊圖案結構層110及一內部圖案化結構層112。第一凹 • 槽114係被備製於週邊圖案化結構層110旁，用以收納一 介電膜。圖案化核心結構101同時也包含一第二凹槽116 ，其係被備製用於隨後製造之電鍍貫孔（PTH)。 第1C圖爲描繪於第1B圖之核心支撐結構1〇1依據一 實施例於鏤印及施加一介電膜118後之剖面圖。一鏤印層 120係被放置於該核心結構102上及一介電膜118係被通 入鏤印開口，以塡入每一個之第一凹槽114。 -6 - (3) 1334615 在一實施例中，核心結構102在形成介電膜118後展 現一介電第一表面122及一核心第一表面124，該兩表面 係實質在同一平面。同樣地，在一實施例中，核心結構 . 102在形成介電膜118後展現一介電第二面126與一核心 第二表面128，兩表面係實質在同一平面。依據所主張實 % 施例，核心結構102也被稱爲結構層102。 在鏤印或形成介電膜Π8於第一凹槽114後，介電膜 φ Π8被固化或在至少B階段，以完成足夠穩定度，用於核 心結構102的進一步處理。在一實施例中，介電膜118爲 高K材料，其具有約20之電容率Er (其展現約17.7微微 法拉/毫米2 ( pF/mm2))。在一實施例中，介電膜118具 有約50之Er ( 44pF/mm2 )。在一實施例中，介電膜118 具有範圍由約15至約60的ΕΓ。 第ID圖爲依據一實施例之第1C圖之核心支撐結構 102在形成頂電極130與底電極132與電鍍貫孔（PTH) # 134後之剖面圖。該用以形成電極與結構層之製程可以在 - 幾個階段內被執行。例如，在核心第一面124或其附近之 . 頂電極與PTH134的部份係藉由無電電鍍在介電第一表面 122與核心第一表面124上之種層加以形成。隨後，執行 電鍍製程，以完成造成PTH134之給定厚度之頂電極130 的設計厚度，該PTH134係在核心第一表面124或其附近 。隨後，核心結構103被放置於介電第二表面126及核心 第二表面128。隨後，塡入第二凹槽116之PTH134在其 中可以具有一電鍍縫。 (4) 1334615 第1E圖爲依據一實施例描繪於第ID圖之核心支撐結 構103於形成防焊膜層136後之剖面圖。在一實施例中， 防焊膜136作爲一防焊膜及一密封層，其係安置在頂電極 . 130與底電極132之至少一個之上。核心支撐1〇4係被覆 蓋以準備以圖案化並應用至微電子裝置，例如處理機或 RF應用之特定用途積體電路（ASIC )等等之上的防焊膜 層 1 3 6 〇 φ 第2A圖爲依據一實施例在組裝至一內藏核心電容時 之晶片封裝200的剖面圖。晶片封裝200包含核心結構 23 8，其係類似於第1 E圖所示之核心結構1 04。一防焊膜 層236已經被圖案化，以依據一實施例形成一電容罩開口 240。防焊膜層23 6也依據一實施例被圖案化，以形成 PTH罩開口 242。一具有作用面246與背側面248之覆晶 2 44係被雙向箭頭所描繪，以與核心結構23 8放在一起。 依據一實施例，覆晶244包含焊錫凸塊250，其係被組態 # 以匹配電容罩開口 240的圖案。依據一實施例，焊錫凸塊 - 2 50的其他出現點係被組態，以匹配PTH罩開口 242的圖 . 案。 在一實施例中，並未使用防焊膜層236，而是，防焊 膜層236進入B階段。隨後，具有焊錫凸塊250之覆晶 244係被壓入防焊膜層23 6並藉由使防焊膜層23 6排除開 爲電容罩開口 240與PTH罩開口 242所準備之位置，而完 成電接觸。 第2B圖爲描繪於第2A圖之晶片封裝200於依據一實 (5) 1334615 施例處理後之剖面圖。晶片封裝201顯示將覆晶244與核 心結構238放在一起。隨後，一底膠材料252被插入於覆 彝44與核心結構23 8之間，以保護電連接與其他結構。 . 第3圖爲依據一實施例之具有內藏核心電容之晶片封 裝300的剖面圖。類似於第2A圖所描繪之晶片封裝201 % ，一覆晶344與核心結構338被接合。在此實施例中，多 數焊錫凸塊3 50係大約爲2B圖中所示之兩倍。因此，焊 # 錫凸塊3 50的兩發生點碰撞內藏在核心結構338內之頂電 極3 3 0。一底膠材料3 5 2係被插入覆晶344與核心結構 338之間，以保護電連接與其他結構。 第4A圖爲依據一實施例之處理打線接合安裝基材（ WBMS) 400的剖面圖。依據一實施例，WBMS400包含一 WBMS核心454、一頂塗層456、及一底塗層458。在一實 施例中’ WBMS4〇〇係被選擇用於手持裝置製造，例如無 線裝置。依據一實施例，WB MS 400包含第一接合指部460 # 墊。同樣地，當WBMS4〇0被選擇以具有一電容時，其中 # WBMS400包含一底電極432。在一實施例中，WBMS400 . 包含一第二接合指部462墊。 依據一實施例，第4B圖爲第4A圖所示之WBMS400 於備製一防焊膜464後之剖面圖。WBMS401包含一第一 罩466，其已經被作出圖案以對應底電極432的發生點。 防焊膜464的第一圖案化係被顯示以移除經由第—罩464 曝光之所有之防焊膜464。 依據一實施例，第4C圖爲描繪於第4B圖之 (6) 1334615 WBMS401於第二圖案化防焊膜 405後之剖面圖。 WBMS4 02包含一介電膜468，其已經覆蓋底電極432»依 據一實施例，介電膜468係被選擇以具有高電容率。在一 . 實施例中，在第4C圖中所示之圖案化設計係用以在移除 第一罩466之前，在介電膜468上，佈局一電鍍種層。 % 依據一實施例，第 4D圖爲描繪於第 4C圖之 WBMS402於進一步處理後之剖面圖。WBMS403已經藉由 φ 第二圖案化描繪第4C圖中之防焊膜464加以處理，以取 得第二圖案化防焊膜465。依據一實施例，第二罩470已 經被使用不但曝露第一接合指部墊460與第二接合指部墊 462，同時也曝露在WBMS403中心旁之晶粒焊墊472。 第4E圖爲第4D圖所示之核心支撐結構403在依據一 實施例進一步處理後之剖面圖。核心支撐結構404已經清 除第二罩470。在一實施例中，在形成介電膜468後之核 心結構404展示介電質之第一表面474與結構層第一表面 φ 476，兩表面不必然要同一平面。在一實施例中’在形成 • 介電膜468後之核心結構404展現一介電第二表面478與 . 結構層之第二表面480，兩表面係實質同一平面》 第4F圖爲第4E圖所示之核心支撐結構404在依據一 實施例進一步處理後的剖面圖。該支撐結構405包含一頂 電極482，其已經被電鍍於介電膜468上。同樣地’第一 接合指部墊460已經被電鍍有第一接合指部上層484 ’及 第二接合指部墊462已經被電鍍以第二接合指部上層486 。在一實施例中，電鍍係藉由提供—第三罩488完成。在 -10- (7) 1334615 —實施例中，頂電極482、第一接合指部上層484、及第 二接合指部上層486均由單一膜加以圖案化，圖案化主要 係爲第三罩48 8的相反。 . 第4G圖爲描繪於第4E圖之核心支撐結構4〇4依據.一 實施例作進一步處理後之剖面圖。核心支撐結構405已經 被處理以置放一晶粒490於晶粒焊墊472上。核心支撐結 構405係在此製程階段被準備，以接收該晶粒490之打線 φ 接合耦接至核心支撐結構405上。 於一實施例中，底電極432爲核心支撐結構405內之 接地環43 2的一部份，及第一接合墊460爲電源環460的 —部份。在一實施例中，底電極432爲核心支撐結構405 之電源環432的一部份，及第一接合墊460爲接地環460 的一部份。依據一實施例，電源環與接地環一起提供電通 路，以供給足夠電力至晶粒490。 雖然頂電極482與底電極432係被描繪爲電容的一部 • 份，但其他結構，例如內藏之電感或內藏之電阻也可以依 • 據各種實施例類似地製造。 - 第5圖爲依據一實施例之在基材500中之內藏防焊膜 電容的俯視圖。剖面線4G-4G提供由類似於第4G圖之核 心支撐結構405之結構所取之剖面圖。晶粒5 90係被安置 於晶粒焊墊位置之基材500上。一電源環5 3 2係以假想線 描繪爲包圍該晶粒590。一接地環560同時也以假想線描 繪爲包圍電源環532及晶粒590。一上電極582係經由防 焊膜56S加以曝光，該防焊膜可以爲第二有圖案防焊膜， -11 - (8) 1334615 例如在第4G圖中所示之第二有圖案防焊膜465。一第一 接合指部上層5 84也被描繪爲經由防焊膜5 65曝光。該上 電極582與第一接合指部上層5 84呈現爲一體結構，例如 . 第4G圖中之上電極482與第一接合指部上層484。 於晶粒590與基材500間之電通訊係爲第一接合線 勢 594所執行於第一晶粒接合指部592與第一接合指部上層 5 8 4之間。於晶粒590與基材5 00間之電通訊也爲第二接 φ 合線598所執行於第二晶粒接合指部596與第二接合指部 上層586之間。因此，一內藏被動裝置，例如一平行板電 容係依據一實施例被製造出來，而不必加入垂直形狀因數 之核心支撐結構500。 第6圖爲一流程圖600，描述方法流程實施例。 在610，該製程包含形成一介電膜鄰近並與一結構層 接觸，該結構層爲防焊膜與核心之一者。 在620，該製程包含在該介電層上形成一頂電極。在 # —實施例中，該製程開始於61〇並結束於62〇。 - 在<530，製程包含將該頂電極耦接至一晶粒。在一實 . 施例中，該製程結束於。 第7圖爲一截去圖，其描繪一依一實施例之計算系統 700。該內藏核心被動裝置或內藏防焊膜被動裝置之·前述 實施例之一或多者可以被用於計算系統中’例如第7圖之 計算系統700。以下’任一內藏核心被動裝置或內藏防焊 膜被動裝置實施例單獨或配合上其他實施例係被稱爲實施 例架構。 -12- 1334615 Ο) 計算系統700包含：至少—處理機（未斥 被包圍於1C晶片封裝710中；一資料儲存系 少一輸入裝置，例如鍵盤714;與至少一輸出 * 監視器716。計算系統700包含一處理機，.其 . 號’並可以包含例如一微處理機，其可以由英 除了鍵盤714外’計算系統700可以包含另一 裝置’例如滑鼠。計算系統700可以包含—在 * 2_5圖所繪之處理後之結構，即給定內藏核心 內藏防焊膜被動裝置實施例。 爲了此揭示之目的’一依據主張標的加以 計算系統700可以包含任一系統，其利用微電 ’其可以包含例如內藏核心被動裝置或內藏防 置之至少一者’其係被耦接至一例如動態隨機 (DRAM )、聚合物記憶體、快閃記憶體及相 資料儲存器。於此實施例中，實施例係藉由耦 ® 機，而被連接至這些功能之組合。然而，在一 * 於本案中所述之實施例架構係被耦接至這些功 - 對於一例示實施例，資料儲存器包含晶粒上之 快取。另外，在一實施例中，被耦接至處理機 之實施例架構係爲系統之一部份，該系統具有 構，其係連接至DRAM快取之資料儲存器。另 施例中，實施例架構被連接至資料儲存器712 = 在一實施例中’計算系統700也包含一晶 —數位信號處理機（DSP)、一微控制器、一 :出），其係 統712之至 裝置，例如 處理資料信 特爾公司。 使用者輸入 :如第1G及 被動裝置或 實施元件之 子裝置系統 焊膜被動裝 存取記憶體 變記憶體之 接至一處理 實施例中， 能之任一。 內藏 DRAM (未示出） 一實施例架 外，在一實 » 粒，其包含 特殊設計積 -13- 1334615 do) 體電路（ASIC )、或一微處理機。在此實施例中，實施例 架構被連接至安裝在與1C晶片封裝710相同板720上之 DSP。可以了解的是，實施例架構可以如有關計算系統 . 7〇〇所述之方式組合，組合在本案所揭示之內藏核心被動 裝置或內藏防焊膜被動裝置其等效物之各種實施例所述之 « 實施例架構》 可以了解的是，本案所揭示之實施例可以應用至傳統 # 電腦以外之裝置與設備。例如，一晶粒可以被封裝以一實 施例架構，並被置放於一攜帶式裝置中，例如一無線通訊 器或一手持裝置，例如一個人資料助理等等。另一例子爲 一晶粒’其可以被封裝爲一實施例架構，並被放置於交通 工具內，例如車輛、火車、船隻、飛機、或太空梭》 第8圖爲依據一實施例之電子系統800的示意圖。電 子系統800被描繪爲可以實施第7圖所示之計算系統700 ，但電子系統被描繪爲更一般化。電子系統800加入至少 # —電子組件8 10，例如第2至5圖所示之1C晶粒。在一實 • 施例中，電子系統800爲一電腦系統，其包含系統匯流排 • 820以電氣耦接電子系統800的各種元件。系統匯流排 820依據各種實施例可以爲單一匯流排或匯流排之任意組 合。電子系統800包含一電壓源830，其提供電力給積體 電路810。於部份實施例中，電壓源830經由系統匯流排 820供給電流至積體電路810。 積體電路810被電氣耦接至系統匯流排820並包含任 意電路或依據實施例之電路之組合。在一實施例中，積體 -14- (11) 1334615 電路810包含處理機812，其可以爲任意類型。如此所述 ，處理機812表示任意類型電路，例如但並不限於微處理 機、微控制器、圖形處理機、數位信號處理機或其他處理 . 機。可以包含於積體電路810內之其他類型之電路爲指定 電路或ASIC，例如通訊電路814，其可以用於無線裝置， * 例如行動電話、呼叫器、攜帶式電腦、雙向無線電、及類 似電子系統。於一實施例中，處理機810包含晶片上記憶 • 體81 6，例如SRAM。在一實施例中，處理機810包含晶 片上記憶體8 16，例如eDRAM。 在一實施例中，電子系統800包含一外部記憶體840 ，其隨後可以包含一或多數適用於特定應用之記憶體元件 ，例如以RAM形式之主記憶體842、一或多數硬碟機826 、及/或一或多數處理可移除媒體8 48之驅動器，例如碟 片、光碟（CD)、數位影音光碟（DVD)、快閃記憶體鑰 、及其他本技藝中所知之其他可移除媒體。 • 在一實施例中，電子系統8 00同時也包含一顯示裝置 _ 850、一音訊輸出860。於一實施例中，電子系統800包含 • —控制器8 70，例如一鍵盤、滑鼠、軌跡球、遊戲控制器 、麥克風、語音辨系統、或其他裝置，其可以輸入資訊至 電子系統8 00者。 於此所示’積體電路810可以被以若干不同實施例加 以實施’包含電子封裝、電子系統、電腦系統、製造—積 體電路的一或多數方法、及製造電子組件之一或多數方法 ，其包含如同於各種實施例與其技術上等效物所述之積體 -15- (12) 1334615 電路。元件、材料、幾何、尺寸及操作順序可以被改變， 以適應特定封裝需求。 摘要係被提供以符合專利法施行細則第十六條的規定 . ’以描述所欲解決問題及解決問題之技術手段。應了解的 是’其並不被解釋或限定申請專利範圍。 « 在前述實施方式中，各種特性係被集合於單一實施例 中’以詳述本案。本案之方法並不被解釋爲反映本案之實 • 施例需要較每一申請專利範圍中所述之更多特性。本案標 的在於較單一揭示實施例所有爲少爲特性。因此，以下申 請專利範圍係被倂入詳細說明中，每一申請專利範圍被解 釋爲分開之較佳實施例。 可以爲熟習於本技藝者所了解，在部件與方法步驟的 細節、材料與配置的其他變化已經被描述與顯示，以解釋 本發明之本質，這些變化係未脫離本發明之原理與範圍。 • 【圖式簡單說明】 •第1A圖爲依據一實施例之處理時之晶粒的核心支撐 .結構的剖面圖； 第1B圖爲第1A圖所示之核心支撐結構在依據實施例 圖案化後之剖面圖； 第1C圖爲在第1B圖所示之核心支撐結構在依據實施 例鏤印及施加一介電膜後之剖面圖； 第1D圖爲在第1C圖所示之核心支撐結構在依據實施 例形成頂及底電極及電鍍貫孔後之剖面圖； -16- (13) 1334615 第1E圖爲在第ID圖所示之核心支撐結構在依據實施 例形成防焊膜層後之剖面圖： 第2A圖爲在組裝以依據一實施例之內藏核心電容時 . 的晶片封裝的剖面圖； 第2B圖爲第2A圖所示之晶片封裝在依據實施例處理 後之剖面圖： 第3圖爲具有依據一實施例之內藏核心電容之晶片封 φ 裝的剖面圖； 第4A圖爲在依據實施例處理時之打線接合安裝基材 的剖面圖； 第4B圖爲第4A圖中所示之打線接合安裝基材在依據 實施例準備防焊膜後之剖面圖； 第4C圖爲第4B圖所示之打線接合安裝基材在依據實 施例圖案化防焊膜後之剖面圖； 第4D圖爲第4C圖所示之打線接合安裝基材在依據實 # 施例高度降低防焊膜之一部份後之剖面圖； • 第4E圖爲第4D圖所示之核心支撐結構在依據實施例 - 曝光該高度降低之防焊膜及晶粒焊墊後之剖面圖； 第4F圖爲第4E圖所示之核心支撐結構在依據實施例 處理以形成頂電極並將晶粒置放於晶粒焊墊上之後的剖面 圖， 第4G圖爲第4E圖所示之核心支撐結構在依據另—實 施例處理以形成頂電極並將晶粒放置於晶粒焊墊上之後的 剖面圖： -17- (14) (14)1334615 第5圖爲由依據實施例之第4F圖所取之基材中之防 焊膜內藏電容的俯視圖； 第6圖爲描述方法流程實施例之流程圖； 第7圖描繪依據一實施例之計算系統之截去圖；及 第8圖爲依據實施例之計算系統之示意圖。 【主要元件符號說明】 100 :核心支撐結構 1 〇 1 :圖案核心結構 104 :核心支撐 110:週邊圖案結構層 內部圖案結構層 1 1 4 :第一凹槽 1 16 :第二凹槽 118 :介電膜 120 :鏤印層 122 :介電第一表面 124 :核心第一表面 126 :介電第二表面 1 2 8 :核心第二表面 102 :核心結構 1 30 :頂電極 132 :底電極 1 3 4 :電鍍貫孔 -18 - (15)1334615
136 :防焊膜層 2 0 0 :晶片封裝 2 0 1 :晶片封裝 2 3 6 :防焊膜層 2 3 8 :核心結構 240 :電容遮罩開口 242 : PTH遮罩開口 2 4 4 :覆晶 246 :作用面 2 4 8 :背側面 250 :焊錫凸塊 2 5 2 :底膠材料 3 0 0 :晶片封裝 3 3 8 :核心結構 3 4 4 :覆晶
3 5 0 :焊錫凸塊 3 3 0 :頂電極 3 52 :底膠材料 400 :打線接合安裝基材 4 3 2 ·底電極 454: WBMS 核心 4 5 6 :頂塗層 460 :第一接合指部墊 462 :第二接合指部墊 -19 (16)1334615 464 :防焊膜 466 :第一罩 401 :打線接合 468 :介電膜 402 :打線接合 4 0 3 :核心支撐 4 〇 4 :核心支撐 465 :第二圖案 470 :第二罩 472 :晶粒焊墊 4 7 4 :介電第一 476 :結構層第 478 :介電第二 480 :結構層第 4 8 2 :頂電極 484 :第一接合 4 8 6 :第二接合 48 8 :第三罩 4 9 0 :晶粒 4 0 5 :核心支撐 500 :基材 5 9 0 :晶粒 5 3 2 :電源環 560 :接地環 安裝基材 安裝基材 結構 結構 防焊膜 表面 —表面 表面 二表面 指部上層 指部上層 結構 -20 (17)1334615
5 82 ：上 5 65 :防 5 84 :接 592 ：第 5 94 ：第 596 ：第 5 9 8 ：第 5 8 6 :第 700 :計 710： 1C 7 1 2 :資 714 :鍵 716 :監 7 1 8 :滑 720 :板 8 00 ：電 810 :積 8 1 2 :處 8 1 4 :通 8 1 6 :晶 820 :系 8 3 0 ：電 840 ：外 8 5 0 :顯 電極 焊膜 合指部上層 一晶粒接合指部 一接合線 —晶粒接合指部 二接合線 二接合指部上層 算系統 晶片封裝 料儲存系統 盤 視器 鼠 子系統 體電路 理機 訊電路 片上記億體 統匯流排 壓源 部記憶體 示裝置 -21 1334615 (18) 8 60 :音訊輸出 8 7 0 :控制器 842 :主記憶體 846 :硬碟機 848 :可移除媒體

Claims (1)

1334615 Π) 十、申請專利範固 κ~種積體電容，包含： —底電極； • —介電膜，包含一第一表面與一第二表面，其中該介 . 電膜係安置在該底電極之上或上方； 一結構層，安置成鄰近該介電膜並與該介電膜接觸， 其中該結構層係實質與該介電膜同一平面於該第一表面與 • 該第二表面之至少一表面上，及其中該結構層爲一防焊膜 與一核心層之至少之一；及 一頂電極，安置於該介電膜之上或上方。 2.如申請專利範圍第1項所述之積體電容，其中該底 電極係耦接至一封裝內之一電源環與一接地環之一者。 3 .如申請專利範圍第1項所述之積體電容，其中該底 電極爲在一封裝之接地環之一部份，及其中該頂電極爲在 該封裝中之一電源環之一部份。 Φ 4.如申請專利範圍第1項所述之積體電容’其中該介 • 電膜與該結構層具有實質相同的組成。 - 5.如申請專利範圍第1項所述之積體電容’其中該結 構層爲一核心層，該核心層更包含一電鍍貫孔’鄰近該介 電膜並以該核心層與該介電膜分隔開。 6.如申請專利範圍第1項所述之積體電容’其中該結 構層爲一核心層，該核心層更包含一電鍍貫孔，鄰近該介 電膜並以該核心層分隔開，該積體電容更包含一密封層’ 安置在該頂電極與該底電極之至少之一上方。 -23- (2) (2)1334615 7. 如申請專範圍第1項所述之積體電容，其中該結構 層爲一核心層，該積體電容更包含： —第一焊錫凸塊，與該頂電極接觸；及 一晶粒與該第一焊錫凸塊接觸。 8. 如申請專利範圍第1項所述之積體電容，其中該結 構層爲一核心層，該核心層包含一電鍍貫孔鄰近該介電膜 並以該核心層與該介電膜分開，該積體電容更包含： 一第一焊錫凸塊，耦接至該頂電極； —第一晶粒，耦接至該第一焊錫凸塊： 一第二焊錫凸塊，耦接至該電鍍貫孔；及 該第二焊錫凸塊，耦接至該第一晶粒。 9·—種製作積體電容的製程，包含： 於一核心層中，形成一第一貫孔，其中該核心層包含 一第一側與一第二側； 於該第一貫孔中，形成一介電層； 在該介電層上與該核心層第二側之下方，形成一底電 極； 在該介電層上與該核心層之上方，形成一頂電極； 在該核心層中，形成一第二貫孔； 由該第二貫孔，形成一電鍍貫孔；及 耦接該核心層與一晶粒。 10.如申請專利範圍第9項所述之製程，其中耦接包 含耦接在該晶粒上之電容焊錫凸塊至該頂電極，及耦接在 該晶粒上之一電源焊錫凸塊或一信號焊錫凸塊至該電鍍貫 -24- 1334615
孔》 1 1 .如申請專利範圍第9項所述之製程’其中形成一 介電層包含經由一鏤印形成該介電層，該鏤印係安置在該 . 核心層上方。 1 2 .如申請專利範圍第9項所述之製程，其中形成該 頂電極與該底電極之一包含完成該電鍍貫孔。 1 3 .如申請專利範圍第9項所述之製程，在耦接之前 • ，該製程更包含： 以一防焊膜層覆蓋該第一側： 圖案化該防焊膜層，以曝露出該頂電極之至少一部份 與該電鍍貫孔之至少一部份。 14. 一種製作積體電容的製程，包含： 在一基材上，形成一防焊膜； 第一次圖案化該防焊膜，以曝露出一底電極； 在該底電極上，形成一介電膜，其中該介電膜與該防 • 焊膜共享共同平面表面； • 第二次圖案化該防焊膜，以曝露至少一第一接合指部 . 墊及一晶粒焊墊；及 電鍍在該介電膜上方之一頂電極。 15. 如申請專利範圍第14項所述之製程，更包含定位 —晶粒在一晶粒焊墊，該晶粒焊墊係在第二次圖案化時被 曝露。 16. 如申請專利範圍第14項所述之製程，更包含： 定位一晶粒在一晶粒焊墊，該晶粒焊墊係在第二次圖 -25- (4) 1334615 案化時被曝露；及 藉由耦接該晶粒至該頂電極，而第一次打線接合該晶 粒。 . 17.如申請專利範圍第14項所述之製程，更包含： 定位一晶粒於一晶粒焊墊上，該晶粒焊墊係在第二次 圖案化時被曝露： 藉由耦接該晶粒至電源環與接地環之一，而第一次打 φ 線接合該晶粒；及 藉由耦接該晶粒至接合指部上層，而第二次打線接合 該晶粒。 18. —種包含有積體電容的計算系統，包含： 一底電極； 一介電膜’包含一第一表面與一第二表面，其中該介 電膜係安置於該底電極之上或上方； 一結構層，安置鄰近該介電膜並與該介電膜接觸，其 • 中該結構層係與該介電膜實質共同平面在該第一表面與該 • 第二表面之至少之一上，及其中該結構層爲一防焊膜與一 . 核心層之至少之一： 一頂電極，安置於該介電膜之上與上方： 一晶粒，耦接至該頂電極；及 動態隨機存取記憶體，耦接至該晶粒。 19. 如申請專利範圍第18項所述之計算系統，其中該 晶粒被安置在一防焊膜層之中。 2 〇.如申請專利範圍第1 8項所述之計算系統，其中該 -26- (5) 1334615 結構層爲一核心層’及更包含一電鍍貫孔，安置於鄰近該 介電層，並以該核心層與該介電膜分隔開。 2 1 ·如申請專利範圍第1 8項所述之計算系統，其中該 系統係安置於電腦、無線通訊器、手持裝置、車輛、火車 頭、飛機、船隻、及太空梭之一中。 22 _如申請專利範圍第1 8項所述之計算系統，其中該 曰曰&係由資料儲存裝置、數位信號處理機、微控制器、特
及微處理機中選出。 殊應用積體_ $ -27-
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