TWI315610B - Configurable logic and memory block, and programmable pass gate based configurable logic device - Google Patents

Configurable logic and memory block, and programmable pass gate based configurable logic device

Info

Publication number
TWI315610B
TWI315610B TW095115248A TW95115248A TWI315610B TW I315610 B TWI315610 B TW I315610B TW 095115248 A TW095115248 A TW 095115248A TW 95115248 A TW95115248 A TW 95115248A TW I315610 B TWI315610 B TW I315610B
Authority
TW
Taiwan
Prior art keywords
configurable logic
memory block
pass gate
gate based
logic device
Prior art date
Application number
TW095115248A
Other languages
English (en)
Chinese (zh)
Other versions
TW200644426A (en
Inventor
Chien Chung Shine
Yung Chin Hou
Kun Lung Chen
Wu Yu-Chun
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/119,086 external-priority patent/US7401302B2/en
Priority claimed from US11/180,936 external-priority patent/US7350177B2/en
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Publication of TW200644426A publication Critical patent/TW200644426A/zh
Application granted granted Critical
Publication of TWI315610B publication Critical patent/TWI315610B/zh

Links

TW095115248A 2005-04-29 2006-04-28 Configurable logic and memory block, and programmable pass gate based configurable logic device TWI315610B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/119,086 US7401302B2 (en) 2004-04-29 2005-04-29 System on chip development with reconfigurable multi-project wafer technology
US11/180,936 US7350177B2 (en) 2004-04-29 2005-07-13 Configurable logic and memory devices

Publications (2)

Publication Number Publication Date
TW200644426A TW200644426A (en) 2006-12-16
TWI315610B true TWI315610B (en) 2009-10-01

Family

ID=37195497

Family Applications (2)

Application Number Title Priority Date Filing Date
TW095115249A TWI321841B (en) 2005-04-29 2006-04-28 System on chip development with reconfigurable multi-project wafer technology
TW095115248A TWI315610B (en) 2005-04-29 2006-04-28 Configurable logic and memory block, and programmable pass gate based configurable logic device

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW095115249A TWI321841B (en) 2005-04-29 2006-04-28 System on chip development with reconfigurable multi-project wafer technology

Country Status (3)

Country Link
JP (1) JP4730192B2 (ja)
CN (3) CN101359908B (ja)
TW (2) TWI321841B (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130191572A1 (en) * 2012-01-23 2013-07-25 Qualcomm Incorporated Transaction ordering to avoid bus deadlocks
US10176855B2 (en) * 2013-11-21 2019-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional (3-D) write assist scheme for memory cells
US9275180B1 (en) * 2014-07-14 2016-03-01 Xilinx, Inc. Programmable integrated circuit having different types of configuration memory
KR102201566B1 (ko) * 2017-08-18 2021-01-11 주식회사 엘지화학 맞춤형 bms 모듈 및 그 설계 방법
TWI661676B (zh) * 2018-08-01 2019-06-01 新唐科技股份有限公司 可程式陣列邏輯
CN110364203B (zh) * 2019-06-20 2021-01-05 中山大学 一种支撑存储内计算的存储系统及计算方法
US11088693B2 (en) * 2019-07-08 2021-08-10 Hossein Asadi Configurable logic block for implementing a Boolean function
CN112106139A (zh) * 2020-08-13 2020-12-18 长江存储科技有限责任公司 闪速存储器设备

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0695569B2 (ja) * 1984-11-20 1994-11-24 富士通株式会社 ゲ−トアレイlsi装置
US5200907A (en) * 1990-04-16 1993-04-06 Tran Dzung J Transmission gate logic design method
JPH04240768A (ja) * 1991-01-25 1992-08-28 Matsushita Electron Corp 読み出し専用半導体記憶装置
JPH06224300A (ja) * 1993-01-26 1994-08-12 Hitachi Ltd 半導体集積回路の設計方法および評価用半導体集積回路
JP3407975B2 (ja) * 1994-05-20 2003-05-19 株式会社半導体エネルギー研究所 薄膜半導体集積回路
US6237132B1 (en) * 1998-08-18 2001-05-22 International Business Machines Corporation Toggle based application specific core methodology
JP2002289817A (ja) * 2001-03-27 2002-10-04 Toshiba Corp 半導体集積回路装置及びその製造方法
US7170315B2 (en) * 2003-07-31 2007-01-30 Actel Corporation Programmable system on a chip
US7032191B2 (en) * 2004-02-27 2006-04-18 Rapid Bridge Llc Method and architecture for integrated circuit design and manufacture

Also Published As

Publication number Publication date
CN100538881C (zh) 2009-09-09
TW200644426A (en) 2006-12-16
CN101359908A (zh) 2009-02-04
TWI321841B (en) 2010-03-11
CN100508190C (zh) 2009-07-01
JP4730192B2 (ja) 2011-07-20
CN1917082A (zh) 2007-02-21
JP2006310869A (ja) 2006-11-09
CN101359908B (zh) 2010-08-18
CN1855485A (zh) 2006-11-01
TW200723501A (en) 2007-06-16

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