TWI278025B - Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate - Google Patents

Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate Download PDF

Info

Publication number
TWI278025B
TWI278025B TW092114516A TW92114516A TWI278025B TW I278025 B TWI278025 B TW I278025B TW 092114516 A TW092114516 A TW 092114516A TW 92114516 A TW92114516 A TW 92114516A TW I278025 B TWI278025 B TW I278025B
Authority
TW
Taiwan
Prior art keywords
gate electrode
oxygen
substrate
forming
original substrate
Prior art date
Application number
TW092114516A
Other languages
English (en)
Chinese (zh)
Other versions
TW200401349A (en
Inventor
Andy C Wei
Derick J Wristers
Mark B Fuselier
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of TW200401349A publication Critical patent/TW200401349A/zh
Application granted granted Critical
Publication of TWI278025B publication Critical patent/TWI278025B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials

Landscapes

  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
TW092114516A 2002-06-04 2003-05-29 Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate TWI278025B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/162,299 US6884702B2 (en) 2002-06-04 2002-06-04 Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate

Publications (2)

Publication Number Publication Date
TW200401349A TW200401349A (en) 2004-01-16
TWI278025B true TWI278025B (en) 2007-04-01

Family

ID=29583580

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092114516A TWI278025B (en) 2002-06-04 2003-05-29 Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate

Country Status (8)

Country Link
US (2) US6884702B2 (https=)
EP (1) EP1509950A2 (https=)
JP (1) JP2005528797A (https=)
KR (1) KR20050004285A (https=)
CN (1) CN100367462C (https=)
AU (1) AU2003240569A1 (https=)
TW (1) TWI278025B (https=)
WO (1) WO2003103040A2 (https=)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4412710B2 (ja) * 2003-11-25 2010-02-10 キヤノン株式会社 光電変換装置の設計方法
KR20070034519A (ko) * 2004-05-27 2007-03-28 이 아이 듀폰 디 네모아 앤드 캄파니 광감성 중합체 보호층용 현상제
JP5113999B2 (ja) * 2004-09-28 2013-01-09 シャープ株式会社 水素イオン注入剥離方法
US7250351B2 (en) * 2005-04-14 2007-07-31 International Business Machines Corporation Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors
US20070069300A1 (en) * 2005-09-29 2007-03-29 International Business Machines Corporation Planar ultra-thin semiconductor-on-insulator channel mosfet with embedded source/drain
KR100724560B1 (ko) * 2005-11-18 2007-06-04 삼성전자주식회사 결정질 반도체층을 갖는 반도체소자, 그의 제조방법 및그의 구동방법
DE102006027969A1 (de) * 2006-06-17 2007-12-20 X-Fab Semiconductor Foundries Ag Verfahren zur selektiven Entspiegelung einer Halbleitergrenzfläche durch eine besondere Prozessführung
US7550330B2 (en) * 2006-11-29 2009-06-23 International Business Machines Corporation Deep junction SOI MOSFET with enhanced edge body contacts
US8053327B2 (en) * 2006-12-21 2011-11-08 Globalfoundries Singapore Pte. Ltd. Method of manufacture of an integrated circuit system with self-aligned isolation structures
US7998815B2 (en) * 2008-08-15 2011-08-16 Qualcomm Incorporated Shallow trench isolation
DE102009010843B4 (de) * 2009-02-27 2014-04-10 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Substrate und Halbleiterbauelemente hergestellt unter Einsatz einer Verformungstechnologie unter Anwendung eines piezoelektrischen Materials und Verfahren zum Einsatz einer derartigen Verformungstechnolgie
US20140197462A1 (en) * 2013-01-14 2014-07-17 International Rectifier Corporation III-Nitride Transistor with High Resistivity Substrate
US20140197461A1 (en) * 2013-01-14 2014-07-17 International Rectifier Corporation Semiconductor Structure Including A Spatially Confined Dielectric Region
DE102015211087B4 (de) * 2015-06-17 2019-12-05 Soitec Verfahren zur Herstellung eines Hochwiderstands-Halbleiter-auf-Isolator-Substrates
KR101921627B1 (ko) * 2017-06-16 2018-11-26 한국과학기술연구원 전계 효과 트랜지스터, 이를 구비한 바이오 센서, 전계 효과 트랜지스터의 제조방법 및 바이오 센서의 제조방법
US11189566B2 (en) * 2018-04-12 2021-11-30 International Business Machines Corporation Tight pitch via structures enabled by orthogonal and non-orthogonal merged vias
US12588282B2 (en) 2022-11-13 2026-03-24 Globalfoundries U.S. Inc. Integrated structure with trap rich regions and low resistivity regions

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04226079A (ja) 1990-04-17 1992-08-14 Canon Inc 半導体装置及びその製造方法及びそれを有する電子回路装置
US5278077A (en) * 1993-03-10 1994-01-11 Sharp Microelectronics Technology, Inc. Pin-hole patch method for implanted dielectric layer
JPH0778994A (ja) * 1993-09-07 1995-03-20 Hitachi Ltd Ｍｏｓ型半導体装置及びその製造方法
US6313505B2 (en) 1998-09-02 2001-11-06 Advanced Micro Devices, Inc. Method for forming shallow source/drain extension for MOS transistor
JP2000208393A (ja) * 1999-01-12 2000-07-28 Asahi Kasei Microsystems Kk 半導体装置の製造方法
US6103569A (en) * 1999-12-13 2000-08-15 Chartered Semiconductor Manufacturing Ltd. Method for planarizing local interconnects
TW473917B (en) 2000-03-07 2002-01-21 United Microelectronics Corp Step-like structure of silicon on insulation (SOI)
US6441436B1 (en) 2000-11-29 2002-08-27 United Microelectronics Corp. SOI device and method of fabrication
US6407428B1 (en) * 2001-06-15 2002-06-18 Advanced Micro Devices, Inc. Field effect transistor with a buried and confined metal plate to control short channel effects

Also Published As

Publication number Publication date
AU2003240569A1 (en) 2003-12-19
AU2003240569A8 (en) 2003-12-19
CN100367462C (zh) 2008-02-06
WO2003103040A2 (en) 2003-12-11
WO2003103040A3 (en) 2004-03-18
US20050151133A1 (en) 2005-07-14
CN1659687A (zh) 2005-08-24
US20030223258A1 (en) 2003-12-04
TW200401349A (en) 2004-01-16
US7544999B2 (en) 2009-06-09
EP1509950A2 (en) 2005-03-02
KR20050004285A (ko) 2005-01-12
US6884702B2 (en) 2005-04-26
JP2005528797A (ja) 2005-09-22

Similar Documents

Publication Publication Date Title
TWI278025B (en) Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate
TWI236149B (en) Semiconductor device and its manufacturing method
TWI286821B (en) Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same
US7180136B2 (en) Biased, triple-well fully depleted SOI structure
US20050287753A1 (en) MOS device for high voltage operation and method of manufacture
CN104022064B (zh) 于集成电路产品的不同结构上形成不对称间隔件的方法
CN1147003C (zh) “绝缘体上的硅”半导体装置及其制造方法
US20030025165A1 (en) Buried channel pmos transistor in dual gate cmos with reduced masking steps
US8222130B2 (en) High voltage device
US8053319B2 (en) Method of forming a high voltage device
EP2059950A2 (en) Complementary silicon-on-insulator (soi) junction field effect transistors and method of manufacture
CN101211972A (zh) 半导体结构及其形成方法
CN101385133B (zh) 形成具有不对称电介质区域的半导体器件的方法及其结构
JP3274638B2 (ja) 半導体装置の製造方法
TW200415786A (en) Semiconductor device and method for forming
KR20060049216A (ko) 반도체장치
US20050269640A1 (en) Semiconductor device and manufacturing method thereof
CN101981674A (zh) 包括缩减高度的金属栅极堆栈的半导体器件及形成该半导体器件的方法
US10395987B2 (en) Transistor with source-drain silicide pullback
US20100038696A1 (en) Semiconductor Device and Method for Making Same
US20080150026A1 (en) Metal-oxide-semiconductor field effect transistor with an asymmetric silicide
TW517352B (en) Capacitively coupled DTMOS on SOI for multiple devices
US20190057909A1 (en) Semiconductor structure and method for forming the same
US6706582B2 (en) Semiconductor integrated circuit device and method of manufacturing the same
CN107104148A (zh) 降低soi装置中的天线效应