KR20050004285A - 벌크 실리콘 기판에 강화된, 자기정렬 유전체 영역들을가지는 soi 반도체 디바이스 제조 방법 - Google Patents
벌크 실리콘 기판에 강화된, 자기정렬 유전체 영역들을가지는 soi 반도체 디바이스 제조 방법 Download PDFInfo
- Publication number
- KR20050004285A KR20050004285A KR10-2004-7019743A KR20047019743A KR20050004285A KR 20050004285 A KR20050004285 A KR 20050004285A KR 20047019743 A KR20047019743 A KR 20047019743A KR 20050004285 A KR20050004285 A KR 20050004285A
- Authority
- KR
- South Korea
- Prior art keywords
- gate electrode
- bulk substrate
- regions
- dielectric regions
- dielectric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
Landscapes
- Thin Film Transistor (AREA)
- Element Separation (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/162,299 US6884702B2 (en) | 2002-06-04 | 2002-06-04 | Method of making an SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate |
| US10/162,299 | 2002-06-04 | ||
| PCT/US2003/017917 WO2003103040A2 (en) | 2002-06-04 | 2003-05-28 | Method of making an soi semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20050004285A true KR20050004285A (ko) | 2005-01-12 |
Family
ID=29583580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2004-7019743A Ceased KR20050004285A (ko) | 2002-06-04 | 2003-05-28 | 벌크 실리콘 기판에 강화된, 자기정렬 유전체 영역들을가지는 soi 반도체 디바이스 제조 방법 |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US6884702B2 (https=) |
| EP (1) | EP1509950A2 (https=) |
| JP (1) | JP2005528797A (https=) |
| KR (1) | KR20050004285A (https=) |
| CN (1) | CN100367462C (https=) |
| AU (1) | AU2003240569A1 (https=) |
| TW (1) | TWI278025B (https=) |
| WO (1) | WO2003103040A2 (https=) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4412710B2 (ja) * | 2003-11-25 | 2010-02-10 | キヤノン株式会社 | 光電変換装置の設計方法 |
| KR20070034519A (ko) * | 2004-05-27 | 2007-03-28 | 이 아이 듀폰 디 네모아 앤드 캄파니 | 광감성 중합체 보호층용 현상제 |
| JP5113999B2 (ja) * | 2004-09-28 | 2013-01-09 | シャープ株式会社 | 水素イオン注入剥離方法 |
| US7250351B2 (en) * | 2005-04-14 | 2007-07-31 | International Business Machines Corporation | Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors |
| US20070069300A1 (en) * | 2005-09-29 | 2007-03-29 | International Business Machines Corporation | Planar ultra-thin semiconductor-on-insulator channel mosfet with embedded source/drain |
| KR100724560B1 (ko) * | 2005-11-18 | 2007-06-04 | 삼성전자주식회사 | 결정질 반도체층을 갖는 반도체소자, 그의 제조방법 및그의 구동방법 |
| DE102006027969A1 (de) * | 2006-06-17 | 2007-12-20 | X-Fab Semiconductor Foundries Ag | Verfahren zur selektiven Entspiegelung einer Halbleitergrenzfläche durch eine besondere Prozessführung |
| US7550330B2 (en) * | 2006-11-29 | 2009-06-23 | International Business Machines Corporation | Deep junction SOI MOSFET with enhanced edge body contacts |
| US8053327B2 (en) * | 2006-12-21 | 2011-11-08 | Globalfoundries Singapore Pte. Ltd. | Method of manufacture of an integrated circuit system with self-aligned isolation structures |
| US7998815B2 (en) * | 2008-08-15 | 2011-08-16 | Qualcomm Incorporated | Shallow trench isolation |
| DE102009010843B4 (de) * | 2009-02-27 | 2014-04-10 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Substrate und Halbleiterbauelemente hergestellt unter Einsatz einer Verformungstechnologie unter Anwendung eines piezoelektrischen Materials und Verfahren zum Einsatz einer derartigen Verformungstechnolgie |
| US20140197462A1 (en) * | 2013-01-14 | 2014-07-17 | International Rectifier Corporation | III-Nitride Transistor with High Resistivity Substrate |
| US20140197461A1 (en) * | 2013-01-14 | 2014-07-17 | International Rectifier Corporation | Semiconductor Structure Including A Spatially Confined Dielectric Region |
| DE102015211087B4 (de) * | 2015-06-17 | 2019-12-05 | Soitec | Verfahren zur Herstellung eines Hochwiderstands-Halbleiter-auf-Isolator-Substrates |
| KR101921627B1 (ko) * | 2017-06-16 | 2018-11-26 | 한국과학기술연구원 | 전계 효과 트랜지스터, 이를 구비한 바이오 센서, 전계 효과 트랜지스터의 제조방법 및 바이오 센서의 제조방법 |
| US11189566B2 (en) * | 2018-04-12 | 2021-11-30 | International Business Machines Corporation | Tight pitch via structures enabled by orthogonal and non-orthogonal merged vias |
| US12588282B2 (en) | 2022-11-13 | 2026-03-24 | Globalfoundries U.S. Inc. | Integrated structure with trap rich regions and low resistivity regions |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04226079A (ja) | 1990-04-17 | 1992-08-14 | Canon Inc | 半導体装置及びその製造方法及びそれを有する電子回路装置 |
| US5278077A (en) * | 1993-03-10 | 1994-01-11 | Sharp Microelectronics Technology, Inc. | Pin-hole patch method for implanted dielectric layer |
| JPH0778994A (ja) * | 1993-09-07 | 1995-03-20 | Hitachi Ltd | Mos型半導体装置及びその製造方法 |
| US6313505B2 (en) | 1998-09-02 | 2001-11-06 | Advanced Micro Devices, Inc. | Method for forming shallow source/drain extension for MOS transistor |
| JP2000208393A (ja) * | 1999-01-12 | 2000-07-28 | Asahi Kasei Microsystems Kk | 半導体装置の製造方法 |
| US6103569A (en) * | 1999-12-13 | 2000-08-15 | Chartered Semiconductor Manufacturing Ltd. | Method for planarizing local interconnects |
| TW473917B (en) | 2000-03-07 | 2002-01-21 | United Microelectronics Corp | Step-like structure of silicon on insulation (SOI) |
| US6441436B1 (en) | 2000-11-29 | 2002-08-27 | United Microelectronics Corp. | SOI device and method of fabrication |
| US6407428B1 (en) * | 2001-06-15 | 2002-06-18 | Advanced Micro Devices, Inc. | Field effect transistor with a buried and confined metal plate to control short channel effects |
-
2002
- 2002-06-04 US US10/162,299 patent/US6884702B2/en not_active Expired - Fee Related
-
2003
- 2003-05-28 EP EP03731586A patent/EP1509950A2/en not_active Withdrawn
- 2003-05-28 AU AU2003240569A patent/AU2003240569A1/en not_active Abandoned
- 2003-05-28 JP JP2004510024A patent/JP2005528797A/ja active Pending
- 2003-05-28 CN CNB038128373A patent/CN100367462C/zh not_active Expired - Lifetime
- 2003-05-28 KR KR10-2004-7019743A patent/KR20050004285A/ko not_active Ceased
- 2003-05-28 WO PCT/US2003/017917 patent/WO2003103040A2/en not_active Ceased
- 2003-05-29 TW TW092114516A patent/TWI278025B/zh active
-
2005
- 2005-03-04 US US11/072,661 patent/US7544999B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| AU2003240569A1 (en) | 2003-12-19 |
| AU2003240569A8 (en) | 2003-12-19 |
| CN100367462C (zh) | 2008-02-06 |
| WO2003103040A2 (en) | 2003-12-11 |
| WO2003103040A3 (en) | 2004-03-18 |
| US20050151133A1 (en) | 2005-07-14 |
| CN1659687A (zh) | 2005-08-24 |
| TWI278025B (en) | 2007-04-01 |
| US20030223258A1 (en) | 2003-12-04 |
| TW200401349A (en) | 2004-01-16 |
| US7544999B2 (en) | 2009-06-09 |
| EP1509950A2 (en) | 2005-03-02 |
| US6884702B2 (en) | 2005-04-26 |
| JP2005528797A (ja) | 2005-09-22 |
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| KR20050004285A (ko) | 벌크 실리콘 기판에 강화된, 자기정렬 유전체 영역들을가지는 soi 반도체 디바이스 제조 방법 | |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| A201 | Request for examination | ||
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| N231 | Notification of change of applicant | ||
| PN2301 | Change of applicant |
St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
St.27 status event code: N-2-6-B10-B15-exm-PE0601 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |