TWI265593B - Interconnects with improved barrier layer adhesion - Google Patents

Interconnects with improved barrier layer adhesion Download PDF

Info

Publication number
TWI265593B
TWI265593B TW091135258A TW91135258A TWI265593B TW I265593 B TWI265593 B TW I265593B TW 091135258 A TW091135258 A TW 091135258A TW 91135258 A TW91135258 A TW 91135258A TW I265593 B TWI265593 B TW I265593B
Authority
TW
Taiwan
Prior art keywords
layer
nitrogen
barrier layer
dielectric
dielectric layer
Prior art date
Application number
TW091135258A
Other languages
English (en)
Chinese (zh)
Other versions
TW200304202A (en
Inventor
Minh Van Ngo
Dawn Hopper
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of TW200304202A publication Critical patent/TW200304202A/zh
Application granted granted Critical
Publication of TWI265593B publication Critical patent/TWI265593B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42Vias, e.g. via plugs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
TW091135258A 2001-12-05 2002-12-05 Interconnects with improved barrier layer adhesion TWI265593B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/001,805 US6645853B1 (en) 2001-12-05 2001-12-05 Interconnects with improved barrier layer adhesion

Publications (2)

Publication Number Publication Date
TW200304202A TW200304202A (en) 2003-09-16
TWI265593B true TWI265593B (en) 2006-11-01

Family

ID=21697916

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091135258A TWI265593B (en) 2001-12-05 2002-12-05 Interconnects with improved barrier layer adhesion

Country Status (8)

Country Link
US (2) US6645853B1 (https=)
EP (1) EP1451858B1 (https=)
JP (1) JP4740538B2 (https=)
KR (2) KR101059968B1 (https=)
CN (1) CN1316566C (https=)
AU (1) AU2002362062A1 (https=)
TW (1) TWI265593B (https=)
WO (1) WO2003049161A1 (https=)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW518712B (en) * 2002-01-25 2003-01-21 Taiwan Semiconductor Mfg Manufacture method of low resistance barrier layer of copper metallization process
US6664185B1 (en) * 2002-04-25 2003-12-16 Advanced Micro Devices, Inc. Self-aligned barrier formed with an alloy having at least two dopant elements for minimized resistance of interconnect
US7060557B1 (en) * 2002-07-05 2006-06-13 Newport Fab, Llc, Inc. Fabrication of high-density capacitors for mixed signal/RF circuits
US6780789B1 (en) * 2002-08-29 2004-08-24 Advanced Micro Devices, Inc. Laser thermal oxidation to form ultra-thin gate oxide
US7825516B2 (en) * 2002-12-11 2010-11-02 International Business Machines Corporation Formation of aligned capped metal lines and interconnections in multilevel semiconductor structures
US20050104072A1 (en) 2003-08-14 2005-05-19 Slater David B.Jr. Localized annealing of metal-silicon carbide ohmic contacts and devices so formed
US6992390B2 (en) * 2003-11-07 2006-01-31 International Business Machines Corp. Liner with improved electromigration redundancy for damascene interconnects
KR100515370B1 (ko) * 2003-12-31 2005-09-14 동부아남반도체 주식회사 반도체 소자의 플러그 제조 방법
US6952052B1 (en) * 2004-03-30 2005-10-04 Advanced Micro Devices, Inc. Cu interconnects with composite barrier layers for wafer-to-wafer uniformity
US7605469B2 (en) * 2004-06-30 2009-10-20 Intel Corporation Atomic layer deposited tantalum containing adhesion layer
US7223670B2 (en) 2004-08-20 2007-05-29 International Business Machines Corporation DUV laser annealing and stabilization of SiCOH films
US7087521B2 (en) * 2004-11-19 2006-08-08 Intel Corporation Forming an intermediate layer in interconnect joints and structures formed thereby
US20060113675A1 (en) * 2004-12-01 2006-06-01 Chung-Liang Chang Barrier material and process for Cu interconnect
US7528028B2 (en) * 2005-06-17 2009-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Super anneal for process induced strain modulation
KR100640662B1 (ko) * 2005-08-06 2006-11-01 삼성전자주식회사 장벽금속 스페이서를 구비하는 반도체 소자 및 그 제조방법
KR100687436B1 (ko) * 2005-12-26 2007-02-26 동부일렉트로닉스 주식회사 반도체소자의 구리배선막 형성방법
US20070235876A1 (en) * 2006-03-30 2007-10-11 Michael Goldstein Method of forming an atomic layer thin film out of the liquid phase
US7800228B2 (en) * 2006-05-17 2010-09-21 International Business Machines Corporation Reliable via contact interconnect structure
KR100853098B1 (ko) * 2006-12-27 2008-08-19 동부일렉트로닉스 주식회사 반도체 소자의 금속 배선 및 이의 제조 방법
US7851343B2 (en) * 2007-06-14 2010-12-14 Cree, Inc. Methods of forming ohmic layers through ablation capping layers
US20090102052A1 (en) * 2007-10-22 2009-04-23 Sang Wook Ryu Semiconductor Device and Fabricating Method Thereof
US20090179328A1 (en) * 2008-01-14 2009-07-16 International Business Machines Corporation Barrier sequence for use in copper interconnect metallization
CN101494191B (zh) * 2008-01-24 2011-03-23 中芯国际集成电路制造(上海)有限公司 一种双镶嵌结构的制造方法
US8105937B2 (en) * 2008-08-13 2012-01-31 International Business Machines Corporation Conformal adhesion promoter liner for metal interconnects
US20100099251A1 (en) * 2008-10-22 2010-04-22 Applied Materials, Inc. Method for nitridation pretreatment
KR101277272B1 (ko) 2008-12-08 2013-06-20 한국전자통신연구원 조류인플루엔자 바이러스의 포획 및 억제용 펩타이드 화합물 및 그의 응용
RU2415964C1 (ru) * 2009-10-26 2011-04-10 Государственное образовательное учреждение высшего профессионального образования Московский автомобильно-дорожный институт (Государственный технический университет) Способ низкотемпературного азотирования стальных деталей
CN102420176A (zh) * 2011-06-15 2012-04-18 上海华力微电子有限公司 一种改善半导体晶片翘曲的方法
US8420531B2 (en) * 2011-06-21 2013-04-16 International Business Machines Corporation Enhanced diffusion barrier for interconnect structures
JP5835696B2 (ja) 2012-09-05 2015-12-24 株式会社東芝 半導体装置およびその製造方法
US11443983B2 (en) * 2018-09-24 2022-09-13 Intel Corporation Void-free high aspect ratio metal alloy interconnects and method of manufacture using a solvent-based etchant
CN110970350A (zh) * 2018-09-28 2020-04-07 长鑫存储技术有限公司 包含α-Ta层的扩散阻挡层的制备方法以及复合扩散阻挡层
CN110112096A (zh) * 2019-05-17 2019-08-09 长江存储科技有限责任公司 金属互连结构及其形成方法
US11527476B2 (en) * 2020-09-11 2022-12-13 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structure of semiconductor device
US12315808B2 (en) * 2022-04-19 2025-05-27 Nanya Technology Corporation Semiconductor device with liner structure
US12341062B2 (en) 2022-04-19 2025-06-24 Nanya Technology Corporation Method for fabricating semiconductor device with liner structure
US20240213092A1 (en) * 2022-12-22 2024-06-27 International Business Machines Corporation Octagonal interconnect wiring for advanced logic
US12581937B2 (en) * 2023-07-03 2026-03-17 Rf360 Singapore Pte. Ltd. Integrated device comprising metallization interconnects

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2821598B2 (ja) * 1988-08-23 1998-11-05 ソニー株式会社 半導体集積回路装置の製造方法
US5464792A (en) * 1993-06-07 1995-11-07 Motorola, Inc. Process to incorporate nitrogen at an interface of a dielectric layer in a semiconductor device
US6271120B1 (en) 1995-03-10 2001-08-07 Advanced Micro Devices, Inc. Method of enhanced silicide layer for advanced metal diffusion barrier layer application
JPH09162291A (ja) * 1995-12-06 1997-06-20 Ricoh Co Ltd 半導体装置の製造方法
US5801097A (en) * 1997-03-10 1998-09-01 Vanguard International Semiconductor Corporation Thermal annealing method employing activated nitrogen for forming nitride layers
US6448655B1 (en) * 1998-04-28 2002-09-10 International Business Machines Corporation Stabilization of fluorine-containing low-k dielectrics in a metal/insulator wiring structure by ultraviolet irradiation
US6461675B2 (en) * 1998-07-10 2002-10-08 Cvc Products, Inc. Method for forming a copper film on a substrate
US6265779B1 (en) * 1998-08-11 2001-07-24 International Business Machines Corporation Method and material for integration of fuorine-containing low-k dielectrics
US6146996A (en) 1998-09-01 2000-11-14 Philips Electronics North America Corp. Semiconductor device with conductive via and method of making same
TW520551B (en) * 1998-09-24 2003-02-11 Applied Materials Inc Method for fabricating ultra-low resistivity tantalum films
US6143650A (en) 1999-01-13 2000-11-07 Advanced Micro Devices, Inc. Semiconductor interconnect interface processing by pulse laser anneal
US6156648A (en) * 1999-03-10 2000-12-05 United Microelectronics Corp. Method for fabricating dual damascene
JP2000323476A (ja) * 1999-05-12 2000-11-24 Tokyo Electron Ltd 配線構造およびその製造方法
US6222579B1 (en) * 1999-05-14 2001-04-24 Presstek, Inc. Alignment of laser imaging assembly
US6339258B1 (en) * 1999-07-02 2002-01-15 International Business Machines Corporation Low resistivity tantalum
US6326301B1 (en) * 1999-07-13 2001-12-04 Motorola, Inc. Method for forming a dual inlaid copper interconnect structure
JP2001053077A (ja) * 1999-08-13 2001-02-23 Hitachi Ltd 半導体集積回路装置およびその製造方法
US6355153B1 (en) * 1999-09-17 2002-03-12 Nutool, Inc. Chip interconnect and packaging deposition methods and structures
US6294458B1 (en) * 2000-01-31 2001-09-25 Motorola, Inc. Semiconductor device adhesive layer structure and process for forming structure
US6319766B1 (en) 2000-02-22 2001-11-20 Applied Materials, Inc. Method of tantalum nitride deposition by tantalum oxide densification
US6284657B1 (en) * 2000-02-25 2001-09-04 Chartered Semiconductor Manufacturing Ltd. Non-metallic barrier formation for copper damascene type interconnects
US6657284B1 (en) * 2000-12-01 2003-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Graded dielectric layer and method for fabrication thereof
US6429524B1 (en) * 2001-05-11 2002-08-06 International Business Machines Corporation Ultra-thin tantalum nitride copper interconnect barrier
US6548400B2 (en) * 2001-06-29 2003-04-15 Texas Instruments Incorporated Method of fabricating interlevel connectors using only one photomask step
US6930391B2 (en) * 2002-08-27 2005-08-16 Intel Corporation Method for alloy-electroplating group IB metals with refractory metals for interconnections

Also Published As

Publication number Publication date
KR20050044734A (ko) 2005-05-12
WO2003049161A1 (en) 2003-06-12
TW200304202A (en) 2003-09-16
KR100922420B1 (ko) 2009-10-16
EP1451858A1 (en) 2004-09-01
AU2002362062A1 (en) 2003-06-17
CN1316566C (zh) 2007-05-16
JP4740538B2 (ja) 2011-08-03
CN1599949A (zh) 2005-03-23
US20040063310A1 (en) 2004-04-01
KR20090095680A (ko) 2009-09-09
US7071562B2 (en) 2006-07-04
KR101059968B1 (ko) 2011-08-29
EP1451858B1 (en) 2012-02-22
JP2005512322A (ja) 2005-04-28
US6645853B1 (en) 2003-11-11

Similar Documents

Publication Publication Date Title
TWI265593B (en) Interconnects with improved barrier layer adhesion
KR100892403B1 (ko) 신뢰성 있는 구리 상호연결구조 형성 방법
TWI253113B (en) Method of forming low resistance vias
TW423140B (en) High-performance dual-damascene interconnect structures
KR20030040169A (ko) 반도체 장치 및 그 제조 방법
US6664187B1 (en) Laser thermal annealing for Cu seedlayer enhancement
TW201606934A (zh) 形成互連之方法
US10224275B2 (en) Copper interconnect structures
JP2023516860A (ja) バックエンドオブライン用途のためのルテニウムライナおよびキャップ
CN101138072B (zh) 具有沟道内铜漂移阻挡层的单掩膜mim电容器和电阻器
US9659817B1 (en) Structure and process for W contacts
US6723634B1 (en) Method of forming interconnects with improved barrier layer adhesion
KR100939773B1 (ko) 반도체 소자의 금속배선 및 그의 형성방법
CN101399220A (zh) 金属互连的制造方法
JP4052623B2 (ja) 半導体装置の製造方法
KR100945503B1 (ko) 반도체 소자의 금속배선 형성방법
KR100935193B1 (ko) 반도체 소자의 금속배선 및 그의 형성방법
KR100373364B1 (ko) 금속배선 형성방법
TWI229413B (en) Method for fabricating conductive plug and semiconductor device
KR100808794B1 (ko) 반도체 소자의 제조 방법
JP2001250826A (ja) 半導体集積回路装置およびその製造方法
KR20040002013A (ko) 반도체 소자의 금속배선 형성 방법

Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent