TWI229413B - Method for fabricating conductive plug and semiconductor device - Google Patents

Abstract

A method for fabricating a conductive plug. First, a dielectric layer is formed on a substrate. Next, the dielectric layer is etched to form at least one via hole therein. Subsequently, a conformable titanium layer is formed on the dielectric layer and on the sidewall and the bottom of the via hole. Next, a metal nitride layer is formed on the titanium layer and fills the via hole by atomic layer deposition (ALD). Finally, the excess metal nitride layer and the titanium layer over the via hole are removed. A semiconductor device with the conductive plug is also disclosed.

Description

1229413-— -------- ^ — I ----------- 5. Description of the invention (1) Field of invention: The present invention relates to a semiconductor process and its device, particularly The invention relates to a method for manufacturing a conductive plug and a semiconductor device, so as to simplify the manufacturing steps and increase the reliability of the device. Prior technology:

In the integrated circuit manufacturing technology, 'metallization' refers to the proper connection between different parts of the element or between the various elements through the metal conductive layer according to the required circuit design after the semiconductor element is completed. Among them, the plug (p 1 ug) is used to connect the component with the metal conductive layer or as a connection of each metal conductive layer. Generally speaking, the material of the plug must have the characteristics of low resistance, high melting point, good adhesion, resistance to electromigration and easy processing. The commonly used materials include aluminum, titanium, and tungsten. , And copper.

However, at present, there is no example of a metal that can fully meet the requirements of an ideal plug. Σ, tungsten metal has a high melting point, good resistance to electricity under high density current, migration and good ohmic contact with silicon. However, its adhesion is poor, so in the metallization process, an adhesion layer, such as titanium nitride (TiN), is deposited before the tungsten metal is deposited to prevent the crane metal from peeling in subsequent processes and causing component failure. . Unfortunately, when the integration degree of integrated circuits increases, the size of the contact window or via hole shrinks and the aspect ratio increases (aspect rati0). The adhesion layer must occupy part of the hole volume, plus its step coverage Decade coverage is not good, so it is unavoidable to contact

1229413

Overhangs on the tops of windows or vias cause keyholes, which seriously endangers the reliability of the device. Standing 13th. The figure is a cross-sectional diagram showing the process of traditionally manufacturing tungsten plugs. First, according to Figure 1a, please provide a silicon substrate, on which a semiconductor element (not shown) is formed, such as a transistor. Next, a dielectric layer 102, such as a silicon dioxide layer, is deposited on the Shixi substrate 100, and then a microvia and an etching process are used to form a dielectric hole in the substrate. Next, referring to FIG. 1b, chemical vapor deposition (CVD) is performed on the dielectric layer 102 and

The sidewall and bottom of the via hole 103 conform to form an adhesion layer 104f such as titanium nitride. Next, a tungsten metal nucleation layer (not shown) is formed on the adhesion layer 104, and then a town metal layer 106 is formed on the nucleation layer by CVD, and the via hole 103 is filled. . Due to the small size of the via hole 103, for example, q · 10 microns or less, plus the adhesion layer 104 and the tungsten metal nucleation layer occupy most of the via hole space, and due to the adhesion The step 104 of the layer 104 has poor step coverage and overhanging will occur. As a result, the tungsten metal layer will not be able to fill the via hole 1 〇3 and the via hole 1 〇 smoothly. Generate keyholes in 3

107. Finally, please refer to FIG. 1c, and use a polishing process, such as chemical mechanical polishing (CMP), to remove the excess adhesion layer 104 and tungsten metal layer 106 above the via hole 103, so that A part of the adhesion layer 104a and the tungsten metal layer 106a remain in the via hole 103 for use as the plug 106. However, due to the presence of the keyhole 107, the electricity of the plug 8

0503-9213twf (nl); tsmc2001-1247; spin.ptd Page 7 1229413 V. Description of the invention (3) Poor properties, and during the CMP process, the slurry material (not shown) falls into the keyhole 1 0 7 will cause pollution, thus seriously endangering the reliability of the components. U.S. Patent No. 6,0 37,2 5 2 discloses a method using titanium nitride as a plug. It directly uses thermal chemical vapor deposition (thermal CVD) to form titanium nitride plugs, which simplifies the process without further filling with tungsten metal. However, it is applied to the size of the interstitial hole below 0. 16 microns, and as the size of the interstitial hole continues to shrink, the thermal chemical vapor deposition technology has been unable to successfully fill the interstitial hole completely. Furthermore, U.S. Patent No. 6,203,613 discloses a method for forming a metal-containing thin film by atomic vapor deposition (ALD), which can be applied to the production of a metal barrier layer. Among them, nitrate is used as a precursor for vapor deposition. To form a titanium nitride conductive plug, titanium oxide or a titanium metal organic substance can also be used as a precursor. U.S. Patent No. 68, 9 2 4 discloses a method for forming a thin film by using atomic vapor deposition, which uses _ U compound as a reaction gas for atomic vapor deposition to enable it to form a good chemical adsorption with a semiconductor substrate. However, halides are liable to chemically react with titanium, resulting in deterioration of the film.

SUMMARY OF THE INVENTION In view of this, the purpose of the present invention is to provide a method for manufacturing a conductive plug. The conductor device directly uses a metal barrier material as the conductive plug. The tungsten metal plug does not need to be additionally formed to simplify the process steps. Another object of the present invention is to provide a method for manufacturing a conductive plug.

Q5〇3-9213twf (nl); tsmc2001-1247; spin.ptd Page 8 1229413 V. Description of the invention (4) $ f Conductor device 'It forms a conductive, gate t' by atomic layer deposition (ALD) to provide Better step coverage and hole filling force, thus increasing the reliability of the component. According to the above object, the present invention provides a method for manufacturing a conductive plug. First, a substrate is provided, and a dielectric layer is formed thereon. Next, the ^% layer is etched to form at least one via hole in the dielectric layer. After that, a titanium metal layer is conformally formed on the mesa and the sidewall and bottom of the via hole, and then a js,-atomic layer is redundantly formed on the titanium metal layer to form a metal nitride layer and fill it with "quotation, with. Among them, TiCl4, TDMAT, or TEMAT and NH3, 丄 4, or Ny can be used as the process gas, and the working pressure is about ι0 τ〇π or less. & The titanium metal layer and the metal nitride layer above the via hole can be removed by chemical mechanical polishing. Furthermore, the diameter of the via hole is smaller than 0.08 micrometers.

Furthermore, a titanium metal layer can be formed by physical vapor deposition, and 1 is in a range of 50 to 200 angstroms. According to the above object, the present invention provides a semiconductor device. ^ 置 ^ 3-the substrate, a dielectric layer, and a non-keyhole conductive plug. The electrical layer is disposed on the substrate and has at least one via hole. The conductive plug formed by the atomic product is disposed in the via of the interlayer. Furthermore, the non-keyhole conductive plug further includes a titanium metal layer, which is compliantly placed on the sidewall and bottom of the via hole, and its thickness is within a range of 5 ° from Cang Q. Moreover, the diameter of the via hole is less than 0.8 μm. Furthermore, the conductive plug may be made of titanium nitride, titanium silicon nitride, tantalum nitride, or

1229413 V. Description of the invention (5) Nitrile button silicon. In order to make the above-mentioned objects and features of the present invention and the better ones mentioned below, it is better to introduce π U, which makes it easier to understand the examples of Qian Ping 乂 1 soil κ. Detailed description As the embodiment, the following manufacturing method is described in conjunction with Figures 2a to 2d to illustrate one of the conductive plugs of the embodiment of the present invention. Please refer to Figure 2 & first, 'provide-substrate 2.0, such as a silicon Substrate or other semiconductor substrate on which

This guide i i, t M heart into any required inclusion = two. For example, the term "electron crystal stomach, resistors, logic elements, etc." The term "KI / gate substrate" here includes various coatings that have been formed on semiconductor wafers on the B circle; "the surface of the substrate" — The word system includes the exposed uppermost layer of a semiconducting wafer, such as the surface of a silicon wafer, insulated wires, and the like. Next, a dielectric layer 202 is deposited over the substrate 200 by a conventional deposition technique, such as chemical vapor deposition (CVD). The dielectric layer 202 is composed of a single or multiple dielectric materials used in conventional semiconductor processes. For example, its material can be: · Plasma silicon oxide, low dielectric constant spin-on glass (SOG), tetraethoxy silicon glass (TE0S oxide), phosphorous-doped silica, fluorosilicone glass ( FSG), phosphosilicate glass (PSG), undoped silica glass (HDP-USG) deposited by high-density plasma, silicon oxide (HDP-Si〇2) deposited by high-density plasma, secondary pressure chemical vapor phase Deposition method (SACVD)

0503-9213twf (nl); tsmc200M247; spin.ptd Page 10 1229413 V. Description of the invention (6) Oxidized stone deposited and ozone-tetraethoxy stone burned (Q3 — TgQS) Wait. Thereafter, a photoresist layer 204 is coated on the dielectric layer 202, and a plurality of openings are formed therein through a conventional exposure and development step. Here, for the sake of simplicity, it is represented by a single opening 2005. Next, please refer to Fig. 2b. With the patterned photoresist layer 204 as a mask and the traditional anisotropic etching, such as reactive ion etching (RIE), the etching is performed. The dielectric layer 202 under the opening 2 0 5. In this step, a via hole 205a is formed and a part of the substrate 200 is exposed. In the present invention, the diameter (critical dimension (CD)) of the via hole 2 05 a is less than 0.08 micrometers (" 〇!). Next, referring to FIG. 2c, after removing the photoresist pattern layer 204a, a thin film is formed on the dielectric layer 202 and the sidewalls and bottoms of the via 205a according to conventional deposition techniques to form a thin film. Metal layer 2 〇6. In this embodiment, the material of the metal layer 206 may be titanium metal, and may be formed by physical vapor deposition (PVD), such as sputtering. Furthermore, the thickness of the metal layer 206 is in the range of 50 to 200 angstroms. After that, the key steps of the present invention are performed. By atomic layer deposition (ALD), a metal nitride layer 208 is formed over the thin metal layer 206, such as titanium nitride (TiN), titanium silicon nitride (TiSiN), nitride button (TaN), Or nitride silicon (TaSiN), and completely fill the via hole 205a. In this embodiment, the metal nitride layer 208 is preferably titanium nitride (τ 丨 n) and nitride button (TaN), and the atomic layer deposition process includes the following steps:

i ___ ι 1 IBH 0503-9213twf (nl); tsmc2001-1247; spin.ptd $ 11 pages 1229413 V. Description of the invention (7) ·

First, the above substrate 200 is placed in an atomic layer deposition reaction chamber (not shown). Subsequently, a reaction gas containing titanium metal is introduced into the reaction chamber, for example, selected from one of the following groups: TiCl4, TDMAT (tetrakis- (dimethylamicio) titanium), TEMAT

(tetrakis- (ethylmethylamido) titanium), or reaction gas containing neometals, such as selected from one of the following groups: TaC 15, TBTDET (terbutylimidotris die thy 1 am i do tantalum). Its working pressure is below 10 Torr to form a square metal atomic layer or tantalum metal atomic layer (not shown) on the metal layer 206. Excessive unreacted gas atoms will remain above the metal atomic layer. Next, a purge is performed to remove excess reaction gas. Among them, the gas used for the blowing treatment is argon or nitrogen. After that, a single layer of titanium or a group of metal atomic layers can be formed over the metal layer 206. Next, after completion of the purging treatment, a nitrogen-containing reaction gas such as N H3, N2 H4, or N2 is introduced, and its working pressure is below 10 τ τ r r. It is used to chemically bond with the titanium or tantalum metal atomic layer to form a nitrogen atomic layer (not shown) on it. Similarly, too many unreacted gas atoms will remain above the metal atomic layer.

Then, the blow-off process is performed again. After that, a nitrogen atom layer having an atomic thickness of an earlier layer can be formed on the titanium metal atom layer. In this way, by repeating the above steps, a metal nitride layer 208 is formed over the metal layer 206 and completely fills the via hole 2 05a. Finally, please refer to Figure 2d, using conventional grinding techniques, such as

0503-9213twf (nl); tsmc2001-1247; spin.ptd Page 12 1229413 V. Description of the invention (8) CMP sequentially removes the excess metal nitride layer 208 and metal layer 206 above the dielectric layer 202. The remaining metal layer 216a and the remaining metal nitride layer 208a in the via hole 200a are used as a conductive plug 209 to make electrical contact with the metal connection or semiconductor element in the substrate 200. Similarly, please refer to FIG. 2d, which illustrates a semiconductor device according to an embodiment of the present invention. It includes: a substrate 200, a dielectric layer 202, and a non-keyhole conductive plug 209. As mentioned above, the substrate 200 can be a silicon substrate or other semiconductor substrate, and any desired semiconductor element can be formed thereon. To simplify the diagram, it is only represented by a flat substrate here. The dielectric layer 202 is disposed on the substrate 200 and has at least one interlayer hole 205a, and its diameter is less than 0.08 micrometers. The keyhole-free conductive plug 209 is composed of a titanium metal layer 206a and a metal nitride layer 208a. Among them, the titanium metal layer 2063 is compliantly disposed on the side wall and the bottom of the via hole 205a, and its thickness is in the range of 50 to 200 angstroms. Furthermore, the metal nitride layer 208a is disposed on the titanium metal layer 206a in the interlayer " hole 205 ", which is formed by atomic deposition. Root, the manufacturing method of the conductive plug of the present invention, since the formation of the conductive plug is formed by atomic layer deposition and repeated stacking of a single atomic layer, it has better step coverage, hole filling ability and uniformity. , Can avoid the occurrence of keyholes caused by overhang in the operation to improve the reliable production of components, that is, very suitable for the next-generation process technology with a very small straight ^ ruler ^ or a high aspect ratio via hole in. Moreover, the present invention does not use a halide as a process gas, which can avoid the deterioration of the titanium metal layer. Since a metal barrier material is directly used as a plug, and a metal layer surrounds the metal barrier material, except for hunting, J, prostitution process steps

0503-9213twf (nl); tsmc2001-1247; spin.ptd Page 13 1229413_ 5. Description of the invention (9) In addition, the contact resistance of the plug can also be reduced. In addition, since there are no keyholes, during the grinding process, the grind substance is not easy to remain in the via hole to prevent it from contaminating the component. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make changes and retouches without departing from the spirit and scope of the present invention. The scope of protection shall be determined by the scope of the attached patent application.

0503-9213twf (nl); tsmc2001-1247; spin.ptd Page 14 1229413 Brief description of the drawings Figures 1a to 1c are schematic cross-sectional views showing the traditional process for making tungsten plugs. Figures 2a to 2d are schematic sectional views showing the manufacturing process of a conductive plug according to an embodiment of the present invention. Explanation of symbols: Conventional 10 0 ~ substrate; 10 2 ~ dielectric layer; 103 ~ via hole; 104, 104a ~ adhesion layer; 106, 106a ~ Yan metal layer; 107 ~ keyhole; 1 0 8 ~ insert Stuffed. The present invention 200 ~ substrate; 204 photoresist layer; 2 05a ~ interlayer hole; 208, 208a ~ metal vaporization 202 ~ dielectric layer; 205 opening; 206, 206a ~ metal layer; 2 0 9 ~ plug.

Claims (1)

1229413: Scope of patent application1. Provide a surname engraved on the intermetallic layer; remove the 2 by filling the interlayer originally; 2) such as the application method, which is 3; Law, where the 5 · as the law, where the nitrided stone Shixi No. 6 · as the law, which one with NH3, 7. as the law, where 8. as the law, where the conductive plug The manufacturing method includes the following steps: a substrate on which a dielectric layer is formed; a dielectric layer to form at least one dielectric hole in the dielectric layer and conformance to form a consistent sublayer on the sidewall and bottom of the dielectric hole Deposited on the hole; and above the interstitial hole, please patent the scope of the interstitial hole, and the patent scope is from the physical vapor phase; the patent scope is the patent scope of the titanium metal layer; The titanium metal layer and the metal nitride layer. The conductive plug described in item 1 has a manufacturing diameter of less than 0.8 μm. The manufacturer of the conductive plug according to item 1 is deposited to form the titanium metal layer. The thickness of the conductive plug described in item 1 ranges from 50 to 200 angstroms. The manufacturing method of the conductive plug according to item 1 is titanium nitride, titanium nitride second, tantalum nitride, or one kind. Patent scope of atomic deposition is KK H4, N2. 凊 Patent scope of atomic deposition is patented by the manufacturer of chemical machinery or the conductive plug described in item 1 with one of iCl4, TEMAT, TaCl5, TBTDET as the process. gas. The manufacturer of the conductive plug according to item 6 The working pressure is below 10 Torr: The manufacturer of the conductive plug according to item 1 Grinding to remove the metal layer above the via hole 1229413 6. Scope of patent application and the metal nitride layer. 9. A method for manufacturing a conductive plug, comprising the steps of: providing a substrate on which a dielectric layer is formed; and etching the dielectric layer to form at least one dielectric hole in the dielectric layer; and Atomic layer deposition fills a metal nitride layer in the via hole. 10. The method for manufacturing a conductive plug according to item 9 of the scope of the patent application, further comprising conformingly forming a conductive layer on the sidewall and bottom of the via hole before filling the metal nitride layer. 11. The method for manufacturing a conductive plug according to item 10 of the scope of patent application, wherein the conductive layer is a titanium metal layer. 1 2. The method for manufacturing a conductive plug according to item 10 of the scope of patent application, wherein the conductive layer is formed by physical vapor deposition. 1 3. The method for manufacturing a conductive plug according to item 10 of the scope of the patent application, wherein the thickness of the conductive layer is in the range of 50 to 200 angstroms. 1 4. The method for manufacturing a conductive plug as described in item 9 of the scope of the patent application, wherein the diameter of the via hole is less than 0.8 μm. 1 5. The method for manufacturing a conductive plug according to item 9 of the scope of the patent application, wherein the metal nitride layer is one of titanium nitride, titanium silicon nitride, nitride button, or tantalum silicon nitride. 1 6. The method for manufacturing a conductive plug according to item 9 of the scope of the patent application, wherein the atomic deposition uses TiCl4, TEMAT, TaCl5, TBTDET and N H3, N2 H4, N2 as the process gas. 1 7. The manufacturer of the conductive plug as described in item 16 of the scope of patent application 0503-9213twf (nl); tsmc2001-1247; spin.ptd Page 17 1229413 VI. Patent Application Scope Law 'where the atomic deposition has a working pressure below 10 Torr for semiconductor devices, including ... 18. Substrate and plug System 19 The side of the lock-free hole 20 The metal 21 The metal 22 The interlayer 23 The dielectric layer of the lock-free tantalum silicon is disposed on the substrate and has at least one interlayer / same, with a lock-free conductive plug A plug is disposed in the interlayer hole, wherein the battery is formed by atomic deposition. • As described in item 18 of the scope of the patent application, the conductive plugs of the second and eight countersunk holes of the semiconductor device further include a metal layer, and the compliance is provided on the "layer wall and bottom. As described in the scope of patent application item 19 The half of the body device layer is a metal layer. ^ Β Shaofeng conductor device • For example, the thickness of the layer of the pool covered by item 19 of the patent application ranges from 50 to 200 Angstroms. The diameter of the hole as described in item 18 of the scope of patent application is less than 0.8 micron. • The conductive plug of the semiconductor device hole as described in item 18 of the scope of patent application is titanium nitride, a type of silicon nitride nitrided at 0 Syria, where, where, where • where or nitriding 0503-92131wf (η 1); t smc2001-1247; sp i n.ptd 18th tribute