JP4740538B2 - 半導体デバイスの製造方法 - Google Patents

半導体デバイスの製造方法 Download PDF

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Publication number
JP4740538B2
JP4740538B2 JP2003550266A JP2003550266A JP4740538B2 JP 4740538 B2 JP4740538 B2 JP 4740538B2 JP 2003550266 A JP2003550266 A JP 2003550266A JP 2003550266 A JP2003550266 A JP 2003550266A JP 4740538 B2 JP4740538 B2 JP 4740538B2
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Japan
Prior art keywords
nitrogen
tantalum
layer
opening
copper
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Expired - Lifetime
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JP2003550266A
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English (en)
Japanese (ja)
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JP2005512322A5 (https=
JP2005512322A (ja
Inventor
バン エヌジーオー ミン
エム. ホッパー ドーン
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42Vias, e.g. via plugs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures

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  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
JP2003550266A 2001-12-05 2002-12-04 半導体デバイスの製造方法 Expired - Lifetime JP4740538B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/001,805 US6645853B1 (en) 2001-12-05 2001-12-05 Interconnects with improved barrier layer adhesion
US10/001,805 2001-12-05
PCT/US2002/038820 WO2003049161A1 (en) 2001-12-05 2002-12-04 Interconnects with improved barrier layer adhesion

Publications (3)

Publication Number Publication Date
JP2005512322A JP2005512322A (ja) 2005-04-28
JP2005512322A5 JP2005512322A5 (https=) 2006-01-26
JP4740538B2 true JP4740538B2 (ja) 2011-08-03

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003550266A Expired - Lifetime JP4740538B2 (ja) 2001-12-05 2002-12-04 半導体デバイスの製造方法

Country Status (8)

Country Link
US (2) US6645853B1 (https=)
EP (1) EP1451858B1 (https=)
JP (1) JP4740538B2 (https=)
KR (2) KR101059968B1 (https=)
CN (1) CN1316566C (https=)
AU (1) AU2002362062A1 (https=)
TW (1) TWI265593B (https=)
WO (1) WO2003049161A1 (https=)

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US6992390B2 (en) * 2003-11-07 2006-01-31 International Business Machines Corp. Liner with improved electromigration redundancy for damascene interconnects
KR100515370B1 (ko) * 2003-12-31 2005-09-14 동부아남반도체 주식회사 반도체 소자의 플러그 제조 방법
US6952052B1 (en) * 2004-03-30 2005-10-04 Advanced Micro Devices, Inc. Cu interconnects with composite barrier layers for wafer-to-wafer uniformity
US7605469B2 (en) * 2004-06-30 2009-10-20 Intel Corporation Atomic layer deposited tantalum containing adhesion layer
US7223670B2 (en) 2004-08-20 2007-05-29 International Business Machines Corporation DUV laser annealing and stabilization of SiCOH films
US7087521B2 (en) * 2004-11-19 2006-08-08 Intel Corporation Forming an intermediate layer in interconnect joints and structures formed thereby
US20060113675A1 (en) * 2004-12-01 2006-06-01 Chung-Liang Chang Barrier material and process for Cu interconnect
US7528028B2 (en) * 2005-06-17 2009-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Super anneal for process induced strain modulation
KR100640662B1 (ko) * 2005-08-06 2006-11-01 삼성전자주식회사 장벽금속 스페이서를 구비하는 반도체 소자 및 그 제조방법
KR100687436B1 (ko) * 2005-12-26 2007-02-26 동부일렉트로닉스 주식회사 반도체소자의 구리배선막 형성방법
US20070235876A1 (en) * 2006-03-30 2007-10-11 Michael Goldstein Method of forming an atomic layer thin film out of the liquid phase
US7800228B2 (en) * 2006-05-17 2010-09-21 International Business Machines Corporation Reliable via contact interconnect structure
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US7851343B2 (en) * 2007-06-14 2010-12-14 Cree, Inc. Methods of forming ohmic layers through ablation capping layers
US20090102052A1 (en) * 2007-10-22 2009-04-23 Sang Wook Ryu Semiconductor Device and Fabricating Method Thereof
US20090179328A1 (en) * 2008-01-14 2009-07-16 International Business Machines Corporation Barrier sequence for use in copper interconnect metallization
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US8105937B2 (en) * 2008-08-13 2012-01-31 International Business Machines Corporation Conformal adhesion promoter liner for metal interconnects
US20100099251A1 (en) * 2008-10-22 2010-04-22 Applied Materials, Inc. Method for nitridation pretreatment
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RU2415964C1 (ru) * 2009-10-26 2011-04-10 Государственное образовательное учреждение высшего профессионального образования Московский автомобильно-дорожный институт (Государственный технический университет) Способ низкотемпературного азотирования стальных деталей
CN102420176A (zh) * 2011-06-15 2012-04-18 上海华力微电子有限公司 一种改善半导体晶片翘曲的方法
US8420531B2 (en) * 2011-06-21 2013-04-16 International Business Machines Corporation Enhanced diffusion barrier for interconnect structures
JP5835696B2 (ja) 2012-09-05 2015-12-24 株式会社東芝 半導体装置およびその製造方法
US11443983B2 (en) * 2018-09-24 2022-09-13 Intel Corporation Void-free high aspect ratio metal alloy interconnects and method of manufacture using a solvent-based etchant
CN110970350A (zh) * 2018-09-28 2020-04-07 长鑫存储技术有限公司 包含α-Ta层的扩散阻挡层的制备方法以及复合扩散阻挡层
CN110112096A (zh) * 2019-05-17 2019-08-09 长江存储科技有限责任公司 金属互连结构及其形成方法
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Also Published As

Publication number Publication date
KR20050044734A (ko) 2005-05-12
WO2003049161A1 (en) 2003-06-12
TW200304202A (en) 2003-09-16
KR100922420B1 (ko) 2009-10-16
TWI265593B (en) 2006-11-01
EP1451858A1 (en) 2004-09-01
AU2002362062A1 (en) 2003-06-17
CN1316566C (zh) 2007-05-16
CN1599949A (zh) 2005-03-23
US20040063310A1 (en) 2004-04-01
KR20090095680A (ko) 2009-09-09
US7071562B2 (en) 2006-07-04
KR101059968B1 (ko) 2011-08-29
EP1451858B1 (en) 2012-02-22
JP2005512322A (ja) 2005-04-28
US6645853B1 (en) 2003-11-11

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