TWI249789B - Two-step stripping method for removing via photoresist during the fabrication of partial-via dual damascene structures - Google Patents
Two-step stripping method for removing via photoresist during the fabrication of partial-via dual damascene structures Download PDFInfo
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- TWI249789B TWI249789B TW093111450A TW93111450A TWI249789B TW I249789 B TWI249789 B TW I249789B TW 093111450 A TW093111450 A TW 093111450A TW 93111450 A TW93111450 A TW 93111450A TW I249789 B TWI249789 B TW I249789B
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- layer
- photoresist
- hard mask
- trench
- reflective underlayer
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- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 56
- 238000000034 method Methods 0.000 title claims abstract description 46
- 230000009977 dual effect Effects 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title abstract description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 10
- 239000011261 inert gas Substances 0.000 claims abstract description 6
- 229910052734 helium Inorganic materials 0.000 claims abstract description 5
- 229910052786 argon Inorganic materials 0.000 claims abstract description 4
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 claims abstract 3
- 239000010410 layer Substances 0.000 claims description 99
- 230000003667 anti-reflective effect Effects 0.000 claims description 32
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000002184 metal Substances 0.000 claims description 21
- 239000011229 interlayer Substances 0.000 claims description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- 239000007789 gas Substances 0.000 claims description 8
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- NFFIWVVINABMKP-UHFFFAOYSA-N methylidynetantalum Chemical compound [Ta]#C NFFIWVVINABMKP-UHFFFAOYSA-N 0.000 claims description 6
- 229910003468 tantalcarbide Inorganic materials 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 4
- 239000001307 helium Substances 0.000 claims description 4
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- 230000035484 reaction time Effects 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 4
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 3
- 229910021529 ammonia Inorganic materials 0.000 claims description 2
- 239000004575 stone Substances 0.000 claims description 2
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims description 2
- 230000005496 eutectics Effects 0.000 claims 1
- 239000008267 milk Substances 0.000 claims 1
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- 235000013336 milk Nutrition 0.000 claims 1
- 239000000203 mixture Substances 0.000 claims 1
- 239000002002 slurry Substances 0.000 claims 1
- 238000004140 cleaning Methods 0.000 abstract 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 7
- 239000001301 oxygen Substances 0.000 description 7
- 229910052760 oxygen Inorganic materials 0.000 description 7
- 238000001459 lithography Methods 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 235000014676 Phragmites communis Nutrition 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 125000004432 carbon atom Chemical group C* 0.000 description 1
- 229910000420 cerium oxide Inorganic materials 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 150000002430 hydrocarbons Chemical class 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 210000000056 organ Anatomy 0.000 description 1
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- BFKJFAAPBSQJPD-UHFFFAOYSA-N tetrafluoroethene Chemical group FC(F)=C(F)F BFKJFAAPBSQJPD-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
1249789 玖、發明說明: 【發明所屬之技術領域】 本發明係關於一種雙鑲嵌(dual damascene)製程,尤指一種應用於 部分介層洞(partial-via)雙鑲嵌製程中採兩階段(tw〇—step)去除介 層洞光阻(via photo)的方法,可以有效地避免碳耗竭 (carbon-depletion)以及導線溝渠變形。 【先前技術】 銅雙鑲嵌(dual damascene)技術搭配低介電常數(i〇w—k)介電層為 目前所知對於高積集度、高速(high-Speed)邏輯積體電路晶片製造以 及針對0· 18微米以下的深次微米(deep sub-micro)半導體製程最佳的 金屬内連線解決方案。這是由於銅具有低電阻值(比鋁低3〇%)以及較佳 抗電致遷(electromigration resistance)的特性,而低介電常數材料 則可幫助降低金屬導線之間的RC延遲(RC delay),由此可知,低介電 常數材料搭配銅金屬雙鑲嵌内連線技術在積體電路製程中顯得日益重 要。其中,低介電常數材料由最初的含氟二氧化矽(F_Si〇2)、有機矽玻 璃(organosihcate,0SG),一直演變到目前的超低介電常數(Ultra low-k,ULK)材料(k<2. 5)。 一如忒行業者所知,製作元件最小尺寸在9〇奈米(唧)及以下之微影 技術需使關193nm光阻,而由於i93nm光阻的侧抵:if能力較差, 為此,使用193nm光阻之雙鑲嵌製程往往搭配使用含有金屬層的硬蝕 刻遮罩,以補光阻抗蝕刻能力之不足。金屬層的導入,使得去除光阻 ^侧更加艱辛。這是由於光阻層上往往會有電漿侧所產生的金屬 何生物^要用氧化力較強的氧氣«去除,才㈣底下_餘光阻 一*爭達到所要的表面潔淨度。而由於材料的碳含量比重較 w ’氧化力較_糊電漿會對其造成負面影響。由此可知,傳統的 1249789 又銀敗製私已面®^新的挑戰,需要進·步的改進。 圖一至圖六顯示習知利用193nm光阻所進行之部分介層洞 (partial-via)雙鑲嵌製程六個主要階段之剖面示意圖。如圖一所示 (階段1),半導體基底(未顯示)上沈積一低介電常數(1〇w_k)介電層i, 接著依序形成碳化矽(SiC)層2、金屬層3、矽氧4, 以及抗反射底層(BARC,bottom anti-reflective coating)5。接著塗 佈193nm光阻6,並以微影製程配合光罩在光阻6中定義出導線溝渠開 口 7。193nm光阻6係用以定義導線溝渠結構,因此又將其稱為「溝渠 光阻(Trench Photo)」。金屬層3可以是氮化鈦(TiN)或氮化组(TaN)。 如圖二所示(階段2),繼續透過定義在溝渠光阻6内的導線溝渠開 口 7向下蝕刻,在碳化矽層2、金屬層3以及矽氧層4所構成之堆疊遮 罩中形成溝渠開口 8,蝕刻並停止在碳化矽層2。然後,將溝渠光阻6 去除。 、 接著,如圖三所示(階段3),在溝渠開口 8内填入抗反射底層9, 並在抗反射底層9上形成I93nm光阻層10。由於193ηπι光阻層1〇係用 以定義金屬内連線中的介層洞(via),因此又將其稱為「介層洞光阻 (Via Photo)」。並於光阻層10中利用微影製程定義介層洞(via)開口 11。 # 繼續,如圖四所示(階段4),以介層洞光阻1〇為蝕刻遮罩,透過 介層洞開口 11向下蝕刻抗反射底層9、碳化矽層2,一直蝕刻至部= 的低介電常數(low-k)介電層1停止,形成「部分(partial)」介層; 開口 12。所以稱為「部分」介層洞開口 12是因為介層洞並未穿過整層 的低介電常數(low-k)介電層1。 曰
Be後進行到1¾段5 ’以氧化力強的氧氣電漿去除剩下的介層洞光阻 1249789 〇 層洞光阻10表面上的金屬衍生物,並去除抗反射底層9。然 ^ ’由於ULK等低介電常數材料的破含量比錄高長時間暴露在氧 較強的氧氣電梁環境中,冑對其造成所謂的碳耗竭 (carbon-depleted)層 13,如圖五所示。 請同時參閱圖五以及圖六,圖六中所示的第六階段係利用反應性離 子侧將硬遮罩的溝渠及介制_轉移至低介電常數(lQwk)介電 層1。由於碳耗_ 13中的碳原子已在先前的光阻去除(ph〇t〇resist stopping)步射被消耗掉,使得其結構鬆散,導致在㈣·刻步 驟中產生H賴結構扭曲變形(distortion)之現象。圖六中的虛線 即表示原先預st的導線溝渠結構位置及剖面輪廓,^實際上的導線溝 渠結構位置則已經外擴變形。 【發明内容】 因此,本發明的主要目的在於提供一種應用於部分介層洞 (partial-via)雙鑲嵌製程中採兩階段(two—step)去除介層洞光阻 (via photo)的方法,可以有效地避免碳耗竭(car|3〇n—depieti〇n)以及 導線溝渠變形。 為達上述目的,本發明提供一種一種雙鑲嵌製程中採兩階段去除介 層洞光阻的方法,包含有下列步驟:提供一半導體基底,其上依序形 成有一介電層、一硬遮罩層形成於該介電層上,以及一第一抗反射底 層(BARC)設於該硬遮罩層上,其中該硬遮罩層至少包含有一金屬層; 於該第一抗反射底層上形成一溝渠光阻層,其具有一導線溝渠開口暴 露出部份該第一抗反射底層;透過該導線溝渠開口蝕刻該第一抗反射 底層以及該硬遮罩層,以於該硬遮罩層蝕刻一凹陷溝渠;去除該溝渠 光阻層以及該第一抗反射底層;沈積一第二抗反射底層,並填滿該硬 遮罩層上的該凹陷溝渠;於該第二抗反射底層上形成一介層洞光阻 1249789 層,其具有-介層洞開口暴露出部份該第二抗反射底層;透過該介層 洞開續穿該第二抗反射底層、該硬遮罩層以及侧部份該介電層: 以於該介電層侧—介層洞凹陷;以及以兩階段去除該介層洞光阻 層丄包含有第-步驟:以惰性氣體/四氟甲餅F4)電漿對該介層洞光阻 進打反應時間小於2〇移、的短時間接觸,然後,進行第二步驟:以還原 性氣體電漿去除剩餘之該介層洞光阻。 為了使貝審查委員此更進一步了解本發明之特徵及技術内容,請 參閱以下有關本發明之詳細說明與關。然輯_式僅供參考與說 明用,並非用來對本發明加以限制者。 【實施方式】 曰藉由圖式所舉僅為本發明之較佳實施例,並非用以限制本發 可者。本發明之齡實際應依據本發明巾請專利範圍所主張者 月^閱圖七(a)及⑹,圖七⑷及⑹為本發明較佳實施例方法之示 t明雙鑲嵌製程與前述習知雙鑲程同樣可大致區分為六 \本發明雙鑲嵌製程之階段1至階段4與前述f知雙鑲嵌階段1 步驟相同,因此不再贅述。本發明第—健實關方法僅以 白又Ρ白I又5開始說明,而相同元件者亦沿用同符號或編號。 罩,貪如圖七(a)所示,利用193nm光阻(介層洞光阻)10為蝕刻遮 々、从八’向下钱刻抗反射底層9、碳化销2,—錄刻至部 付的介電芦1位U y 本發明之車形成接觸酬口(Paw1 Vh 0Pening)l2 Ο依據 介電芦1。、:也?,金屬層3為氮化鈦(TiN)或氮化钽(TaN)所構成。 • \ X 、為 CVD 2i摻石反石夕乳層(CVD-type carbon-doped silicon …用材料公司(APPlied Materials Co·)之低介電常數黑鑽 1249789 (black diamond)或類似的超低介電常數⑽)材料。接著,相對 知以氧氣進行對剩餘介制紘㈣灰化(ashing)去除,本^ 為避免習知氧氣對暴露之介電層i構成碳耗竭關題,則改岭 驟進行光阻灰化去除··首先,以惰性氣體(如氦氣、氬氣、氮氣等)化 氟甲烧㈣電Μ剩餘介層洞光阻1〇以及抗反射底層9進行短時間的 接觸。根據本發明之較佳實施例,以2〇〇議氯氣/51〇_四氣甲烧 之組合為例,其反應時間小於2G秒,較佳約為1G秒。顧四氣甲烧 電漿可以有效去除沈麟剩餘介層洞光阻1G表面上的金屬衍生物。若 反應時間拉長至超過20秒,則四氟甲烧⑽)電漿對介電層i開始有碳 耗竭之顧慮。此外,四|^脸不適合由其它含碳氫之祕氣體(如 CH=、C祕等)取代,理由是可能會形成高分子殘留物。接著,以還原 14氣體電漿,例如氮氣/氫氣、氦氣/氫氣或氨氣_去除剩餘的介層 洞光阻10。 以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做 之均等變化與修飾,皆應屬本發明專利之涵蓋範圍。 【圖式簡單說明】 圖式之簡單說明 圖一至圖六顯示習知利用193nm光阻所進行之雙鑲嵌製程剖面示意圖。 圖七(a)及(b)為本發明較佳實施例方法之示意圖。 圖式之符號說明 1 介電層 3 金屬層 5 抗反射底層 7 導線溝渠開口 2 碳化石夕層 4 矽氧層 6 溝渠光阻 8 溝渠開口 1249789 9 抗反射底層 10 介層洞光阻 11 介層洞開口 12 介層洞開口 13 碳耗竭層 11
Claims (1)
1249789 拾、申請專利範圍: 種又級肷製程中採兩階段去除介層洞光阻的方法’包含有下列步驟· 提供一半導體基底,其上依序形成有一介電層、一硬遮罩層形成於該 介電層上’以及一第一抗反射底層(BARC)設於該硬遮罩層上,其中該硬遮 罩層至少包含有一金屬層; 於該第一抗反射底層上形成一溝渠光阻層,其具有一導線溝渠開口暴 露出部份該第一抗反射底層; 透過該導線溝渠開口蝕刻該第一抗反射底層以及該硬遮罩層,以於該 硬遮罩層蝕刻一凹陷溝渠; 去除該溝渠光阻層以及該第一抗反射底層; 沈積一第二抗反射底層,並填滿該硬遮罩層上的該凹陷溝渠; 於該第二抗反射底層上形成一介層洞光阻層,其具有一介層洞開口暴 路出部份該第二抗反射底層; 透過該介層洞開口蝕穿該第二抗反射底層、該硬遮罩層以及蝕刻部份 該介電層,以於該介電層蝕刻一介層洞凹陷;以及 以兩階段去除該介層洞光阻層,包含有第一步驟:以惰性氣體/氟烷 (fluorocarbon)電漿對該介層洞光阻進行反應時間小於20秒的短時間接 觸’然後,進行第二步驟:以還原性(reducing)氣體電聚去除剩餘之該介 層洞光阻。 2·如申請專利範圍第1項所述之雙鑲嵌製程中採兩階段去除介層洞光阻 的方法,其中該硬遮罩層另包含有碳化矽層以及矽氧層,而該金屬層係失 於該碳化矽層以及該矽氧層之間。 3·如申請專利範圍第1項所述之雙鑲嵌製程中採兩階段去除介層洞光阻 的方法,其中該金屬層為氮化鈦(TiN)或氮化钽(TaN)所構成。 12 1249789 4·如申請專利範圍第1項所述之雙鑲嵌製程中採兩階段去除介層洞光阻 的方法,其中該溝渠光阻層為193nm光阻。 5·如申請專利1&圍第1項所述之雙鑲嵌製程巾採碰段去除介層洞光阻 的方法,其中該介層洞光阻層為193nm光阻。 6·如申請專利範圍第1項所述之雙鑲嵌製程中採兩階段去除介層洞光阻 的方法,其中該惰性氣體包含有氦氣、氬氣、氮氣。 7·如申請專利範圍第1項所述之雙鑲嵌製程中採兩階段去除介層洞光阻 的方法’其中遠氣烧(fluorocarbon)包含有四氟甲烧。 8·如申請專利範圍第1項所述之雙鑲嵌製程中採兩階段去除介層洞光阻 的方法,其中該還原性氣體電漿包含有氮氣/氫氣、氦氣/氫氣、氨氣。 9·如申請專利範圍第1項所述之雙鑲嵌製程中採兩階段去除介層洞光阻 的方法,其中該介電層係由超低介電常數(ULK,k<2 5)材料所構成。 10· —種部分介層洞(partial-via)雙鑲嵌製程,包含有下列步驟: 提供-半導體基底,其上依序形成有—介縣、—硬遮罩層形成於該 介電層上,以及一第一抗反射底層(BARC)設於該硬遮罩層上,其中該硬遮 罩層至少包含有一金屬層; ’、 … 於該第-抗反射底層上形成-第—光阻層,其具有_導線溝渠開口暴 露出部份該第一抗反射底層; 、 透過遠導線溝渠開口蝕刻該第一抗反射底層以及該硬遮罩層,以於該 硬遮罩層钱刻一凹陷溝渠; Λ 去除該第一光阻層以及該第一抗反射底層; 沈積一第一抗反射底層,並填滿該硬遮罩層上的該凹陷溝渠; 於该第二抗反射底層上形成一第二光阻層,其具有一介層洞開口暴露 13 1249789 出部份該第二抗反射底層; 該硬遮罩層以及蝕刻部份 透過該介層洞開口蝕穿該第二抗反射底層、 該介電層,以於該介電層蝕刻一介層洞凹陷; 電麟該第二練進行反應時間小於秒 接著以還雜氣體電漿完全去_餘之該介層洞光阻;以及 進行-乾侧製程,經由該介層洞凹陳刻該介電層。 11.如申請專利範圍第10項所述之部分介層洞雙镶絲程其中該硬遮罩 :另包含树化销以及魏層’ _金屬層做於該碳切層以及該石夕 之 。 12二如申凊專利範圍第1〇項所述之部分介層洞雙镶彼製程,其中該金屬層 為氮化鈦(TiN)或氮化组(TaN)所構成。 13·如申凊專利範圍第10項所述之部分介層洞雙镶後製程 光 阻層為193nm光阻。 14·如申印專利犯圍帛10項所述之部分介層洞雙鎮後製程,其中該第二光 阻層為193nm光阻。 如專利耗圍第10項所述之部分介層洞雙鑲後製程,其中該介電層 係由超低介電常數(ULK,k<2· 5)材料所構成。 ==糊範圍第!0項所述巧分她_絲程,騎該惰性氣 體包含有乱乳、氬氣、氮氣。 纖—娜性 14
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US20060148243A1 (en) * | 2004-12-30 | 2006-07-06 | Jeng-Ho Wang | Method for fabricating a dual damascene and polymer removal |
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US7628866B2 (en) * | 2006-11-23 | 2009-12-08 | United Microelectronics Corp. | Method of cleaning wafer after etching process |
US20090011604A1 (en) | 2007-07-05 | 2009-01-08 | Interuniversitair Microelektronica Centrum Vzw (Imec) | Photon induced removal of copper |
KR20100077989A (ko) * | 2008-12-29 | 2010-07-08 | 주식회사 동부하이텍 | 반도체 소자의 금속 배선 형성 방법 |
US8735301B2 (en) * | 2011-05-24 | 2014-05-27 | United Microelectronics Corp. | Method for manufacturing semiconductor integrated circuit |
JP5783890B2 (ja) * | 2011-12-07 | 2015-09-24 | 株式会社日立ハイテクノロジーズ | プラズマ処理方法 |
CN103579083B (zh) * | 2012-07-20 | 2016-04-20 | 中芯国际集成电路制造(上海)有限公司 | 开口的形成方法 |
US20180082967A1 (en) * | 2016-09-21 | 2018-03-22 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
US10443146B2 (en) | 2017-03-30 | 2019-10-15 | Lam Research Corporation | Monitoring surface oxide on seed layers during electroplating |
CN107275196A (zh) * | 2017-06-22 | 2017-10-20 | 中国科学院上海微系统与信息技术研究所 | 一种利用金属/氧化物双层掩膜结构刻蚀SiC的方法 |
US11215918B2 (en) | 2019-07-30 | 2022-01-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of critical dimension control by oxygen and nitrogen plasma treatment in EUV mask |
US11049764B1 (en) | 2019-12-12 | 2021-06-29 | United Microelectronics Corp. | Method for fabricating a semiconductor device |
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US6207583B1 (en) * | 1998-09-04 | 2001-03-27 | Alliedsignal Inc. | Photoresist ashing process for organic and inorganic polymer dielectric materials |
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- 2004-04-23 TW TW093111450A patent/TWI249789B/zh not_active IP Right Cessation
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US20050239286A1 (en) | 2005-10-27 |
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