TWI231958B - Method for determining an endpoint and semiconductor wafer - Google Patents

Method for determining an endpoint and semiconductor wafer Download PDF

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Publication number
TWI231958B
TWI231958B TW090129044A TW90129044A TWI231958B TW I231958 B TWI231958 B TW I231958B TW 090129044 A TW090129044 A TW 090129044A TW 90129044 A TW90129044 A TW 90129044A TW I231958 B TWI231958 B TW I231958B
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TW090129044A
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David Haggart
Walter Glashauser
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Freescale Semiconductor Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)

Description

1231958 A7 B7 五、發明説明（ 發明範圍 本發明廣泛地關於一種決定在半導體晶圓之化學-機械 拋光期間的終點之方法，更特別地係關於一種於含額外層 的半導體晶圓基礎上決定終點之方法。本發明進一步廣泛 地關於一種可使用於化學-機械拋光製程之半導體晶圓， 更特別地係關於一種具有額外層的半導體晶圓，而於此基 礎上可決定其終點。 發明背景 化學-機械拋光或平面化（”CMPn)製程可例如使用於微 電子元件之製造以於半導體晶圓上形成平坦表面。 圖1圖式地闡明一種傳統的拋光設備1 〇。該拋光設備包 括一含拋光墊1 4在上面的拋光平台。晶圓1 6利用晶圓載 體1 8裝載。拋光平台1 2則由傳動裝置組2 〇來裝載。 在操作根據圖1的傳統拋光設備1 〇期間，將晶圓1 6配置 在提供拋光漿體之拋光塾14上。由於晶圓載體is及/或傳 動裝置組2 0的旋轉及/或平移，晶圓1 6及拋光塾1 4會彼 此相對地移動。由於晶圓1 6的面橫過拋光塾1 4表面而移 動，拋光墊1 4及漿體將從晶圓1 6移除材料。 極重要的是可利用化學-機械拋光而將抛光層的厚度達 成在某個範圍中。再者，晶圓之表面必需均勻且平坦的。 正確的厚度很重要，因為它們會影響晶圓於操作時之機能 行為。當使用光刻技術於晶圓上形成圖案時，例如需要平 坦的表面。此類圖案僅有當光刻製程的光可緊緊地聚焦在 某範圍中時才能合適地形成。但是，可信賴的聚焦僅可能 -4 - 本紙張尺度適用中國國家揉準(CNS) A4規格(210 x 297公釐) ---------- 1231958 A7 """ B7 五、發明説明（2 ) 在平坦的表面上形成。 為了獲得正確的拋光製程”終點，•已提議出數種技術。例 如’已建議使用當特別層已移除時之晶圓表面的光學外觀 改變。同樣地，已建議可使用摩擦性質的改變做為終點指 不。然而，這些技術全部都有一些相關的一般問題。例 如’要監示光學外觀就很困難，因為例如利用掃描操作僅 可獲得晶圓表面外觀的平均值；此平均值無法滿足全部的 情況’特別是當晶圓表面上的結構變成小之又小時。再 者’可能發生雖然已移除一層但其光學外觀根本無改變。 類似的問題亦發生在使用摩擦力來測量終點的方法。 另一個終點測量方法揭示於美國6 〇57 6〇2中。該公告建 議在想要的終點厚度上沉積一額外層，其後配置欲拋光的 材料。該額外層具有極低的拋光速率，所以當到達該額外 層時會自動地，，停止拋光。但是，此方法之缺點為該額 外層之不平坦結構，例如由於表面狀態大概無法充分地平 坦化。當應用光刻方法至此晶圓時會導致上述討論的問 題。 如上述所提及，於C Μ P製程中傳統的終點測量方法乃 偵測從一種剛已移除的材料至一種藉由拋光而揭開的材料 之轉變。因此，當無材料轉變時則傳統的方法無法應用， 例如於内廣介電質（I L D )氧化物拋光時《本發明企圖解決 上述提及的問題且提供一種能夠獲得可信賴的終點及準確 的拋光結果之方法及半導體晶圓。 -5- 本紙張尺度遑用中a國家搮準<CNS) Α4規格(210Χ 297公釐)

Claims (1)

  1. A8 B8 C叫屮Jf' f 1231 §^i29〇44號專利中請案 中文申請專利範圍替換本(94年1月） 申請專利範園 1· 一種決定半導體晶圓之化學·機械拋光期間終點之方 法，其步驟包括： 提供半導體晶圓； 於半導體晶圓上先沉積第一層，其中該第一層之第一 部分在第二部分之上； 於第一層上沉積一犧牲層，其物理特性與該第—層之 物理特性不同； 將半導體晶圓拋光以除去犧牲層及第一層之第一部 分； ’ 當拋光到達第一層之第一部分時，偵測於第一層及犧 牲層間物理特性的變化； 根據偵測到的變化決定終點； 於犧牲層上沉積第三層，其物理特性與犧牲層之物理 特性不同；及 拋光去除第三層。 2·如申請專利範圍第丨項所述之方法，其中終點之決定是 實質上與偵測變化同步。 3·如申請專利範圍第1項所述之方法，其中終點之決定是 在偵測到變化之後，而在一預定的時間區間已屆滿時。 4·如申請專利範圍第1項所述之方法，其中終點之決定是 在偵測到變化之後，而在一預定的時間區間已屆滿時， 該時間區間的長度則是在拋光期間決定。 5·如申請專利範圍第1項所述之方法，其中該物理特性為 光學特性。 6·如申請專利範圍第1項所述之方法，其中該物理特性為 本紙張尺度適用中國國家標準(CNS) Α4規格(210 χ 297公釐) 1231958 A8 B8 C8 D8 申請專利範圍 摩擦特性。 7·如申請專利範圍第1項所述之方法，其中該第一層及該 犧牲層具有類似的拋光速率。 8·如申請專利範圍第1項所述之方法，其中該第一層及該 犧牲層具有不同的拋光速率。 9·如申請專利範圍第1項所述之方法，其中該第一層包含 一氧化物。 10.如申請專利範圍第1項所述之方法，其中該犧牲層包含 多晶硬。 u·如申請專利範圍第丨項所述之方法，其中該犧牲層包含 氮化碎。 12·如申請專利範圍第1項所述之方法，其中第一層為一第 一氧化物，犧牲層為多晶矽及第三層為一第二氧化物。 13·如申請專利範圍第1項所述之方法，其中： 沉積第一層更進一步包括沉積第一層於第四層上，其 中第四層是在半導體晶圓上是圖案化並具有第一高度；及 第一層上之第二部份具有第二高度且大於第一高度。 14.如申請專利範圍第1 3項所述之方法，其中該第三層為金 屬而第一層為一氧化物。 15·如申請專利範圍第1 3項所述之方法，其中第三層有一開 口，且沉積第一層更進一步包括沉積第一層於此開口 中。 … -2 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公^ '"""""'
TW090129044A 2000-11-27 2001-11-23 Method for determining an endpoint and semiconductor wafer TWI231958B (en)

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KR (1) KR20040014423A (zh)
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CN1479942A (zh) 2004-03-03
CN1242460C (zh) 2006-02-15
AU2002219124A1 (en) 2002-06-03
JP2004515059A (ja) 2004-05-20
WO2002043129A2 (en) 2002-05-30
KR20040014423A (ko) 2004-02-14
EP1340248A2 (en) 2003-09-03
WO2002043129A3 (en) 2002-10-31
US6593238B1 (en) 2003-07-15

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