AU2002219124A1 - Method for determinating an endpoint during cmp of a semiconductor wafer - Google Patents

Method for determinating an endpoint during cmp of a semiconductor wafer

Info

Publication number
AU2002219124A1
AU2002219124A1 AU2002219124A AU1912402A AU2002219124A1 AU 2002219124 A1 AU2002219124 A1 AU 2002219124A1 AU 2002219124 A AU2002219124 A AU 2002219124A AU 1912402 A AU1912402 A AU 1912402A AU 2002219124 A1 AU2002219124 A1 AU 2002219124A1
Authority
AU
Australia
Prior art keywords
determinating
semiconductor wafer
during cmp
endpoint during
endpoint
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002219124A
Inventor
Walter Glashauser
David Haggart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of AU2002219124A1 publication Critical patent/AU2002219124A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • H01L21/31053Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • H01L21/31053Planarisation of the insulating layers involving a dielectric removal step

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)
AU2002219124A 2000-11-27 2001-11-19 Method for determinating an endpoint during cmp of a semiconductor wafer Abandoned AU2002219124A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/723,151 2000-11-27
US09/723,151 US6593238B1 (en) 2000-11-27 2000-11-27 Method for determining an endpoint and semiconductor wafer
PCT/EP2001/013406 WO2002043129A2 (en) 2000-11-27 2001-11-19 Method for determinating an endpoint during cmp of a semiconductor wafer

Publications (1)

Publication Number Publication Date
AU2002219124A1 true AU2002219124A1 (en) 2002-06-03

Family

ID=24905073

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002219124A Abandoned AU2002219124A1 (en) 2000-11-27 2001-11-19 Method for determinating an endpoint during cmp of a semiconductor wafer

Country Status (8)

Country Link
US (1) US6593238B1 (en)
EP (1) EP1340248A2 (en)
JP (1) JP2004515059A (en)
KR (1) KR20040014423A (en)
CN (1) CN1242460C (en)
AU (1) AU2002219124A1 (en)
TW (1) TWI231958B (en)
WO (1) WO2002043129A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7256435B1 (en) * 2003-06-02 2007-08-14 Hewlett-Packard Development Company, L.P. Multilevel imprint lithography
US7750470B2 (en) * 2007-02-08 2010-07-06 Taiwan Semiconductor Manufacturing Co., Ltd. Methods for planarization of dielectric layer around metal patterns for optical efficiency enhancement
CN101515537B (en) * 2008-02-22 2011-02-02 中芯国际集成电路制造(上海)有限公司 Polishing endpoint detection method capable of improving detection precision
CN103471899B (en) * 2013-08-28 2016-01-20 西安隆基硅材料股份有限公司 Silicon chip processing unit (plant)
US9811077B2 (en) 2014-07-16 2017-11-07 Applied Materials, Inc. Polishing with pre deposition spectrum
WO2016010821A1 (en) * 2014-07-16 2016-01-21 Applied Materials, Inc. Polishing with measurement prior to deposition
US9362186B2 (en) 2014-07-18 2016-06-07 Applied Materials, Inc. Polishing with eddy current feed meaurement prior to deposition of conductive layer
TWI816852B (en) * 2019-08-08 2023-10-01 聯華電子股份有限公司 Method for manufacturing semiconductor structure

Family Cites Families (28)

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US4147435A (en) 1977-06-30 1979-04-03 International Business Machines Corporation Interferometric process and apparatus for the measurement of the etch rate of opaque surfaces
JPS60127403A (en) 1983-12-13 1985-07-08 Anritsu Corp Thickness measuring apparatus
JPH0663756B2 (en) 1987-07-31 1994-08-22 川崎製鉄株式会社 Surface shape measuring device for dull roll
JPH0621774B2 (en) 1987-08-04 1994-03-23 川崎製鉄株式会社 Surface roughness measuring device for non-stationary objects
JP2705842B2 (en) 1989-09-26 1998-01-28 川崎製鉄株式会社 Method and apparatus for measuring surface properties of metal plate
USRE34425E (en) 1990-08-06 1993-11-02 Micron Technology, Inc. Method and apparatus for mechanical planarization and endpoint detection of a semiconductor wafer
US5036015A (en) 1990-09-24 1991-07-30 Micron Technology, Inc. Method of endpoint detection during chemical/mechanical planarization of semiconductor wafers
JP2546753B2 (en) 1991-08-31 1996-10-23 信越半導体株式会社 Method for manufacturing SOI substrate
US5220405A (en) 1991-12-20 1993-06-15 International Business Machines Corporation Interferometer for in situ measurement of thin film thickness changes
JP3289938B2 (en) 1992-01-31 2002-06-10 日本トムソン株式会社 Linear motion rolling guide unit
JPH05216222A (en) 1992-02-05 1993-08-27 Fuji Photo Film Co Ltd Positive type photoresist composition
US5433651A (en) 1993-12-22 1995-07-18 International Business Machines Corporation In-situ endpoint detection and process monitoring method and apparatus for chemical-mechanical polishing
US5413941A (en) 1994-01-06 1995-05-09 Micron Technology, Inc. Optical end point detection methods in semiconductor planarizing polishing processes
US5439551A (en) 1994-03-02 1995-08-08 Micron Technology, Inc. Chemical-mechanical polishing techniques and methods of end point detection in chemical-mechanical polishing processes
JP3098670B2 (en) 1994-03-14 2000-10-16 三菱マテリアル株式会社 Method for controlling polishing surface roughness of semiconductor wafer for bonding
JPH07251371A (en) 1994-03-16 1995-10-03 Sony Corp Polishing method for formation of thin film and polishing device for formation of thin film
US5461007A (en) * 1994-06-02 1995-10-24 Motorola, Inc. Process for polishing and analyzing a layer over a patterned semiconductor substrate
US5552346A (en) 1995-04-27 1996-09-03 Taiwan Semiconductor Manufacturing Co. Planarization and etch back process for semiconductor layers
JP3438446B2 (en) 1995-05-15 2003-08-18 ソニー株式会社 Method for manufacturing semiconductor device
US5798302A (en) * 1996-02-28 1998-08-25 Micron Technology, Inc. Low friction polish-stop stratum for endpointing chemical-mechanical planarization processing of semiconductor wafers
US5647952A (en) 1996-04-01 1997-07-15 Industrial Technology Research Institute Chemical/mechanical polish (CMP) endpoint method
US5663797A (en) * 1996-05-16 1997-09-02 Micron Technology, Inc. Method and apparatus for detecting the endpoint in chemical-mechanical polishing of semiconductor wafers
JP3409984B2 (en) 1996-11-14 2003-05-26 東京エレクトロン株式会社 Semiconductor device and method of manufacturing semiconductor device
US5804490A (en) 1997-04-14 1998-09-08 International Business Machines Corporation Method of filling shallow trenches
US6080655A (en) * 1997-08-21 2000-06-27 Micron Technology, Inc. Method for fabricating conductive components in microelectronic devices and substrate structures thereof
US6045434A (en) * 1997-11-10 2000-04-04 International Business Machines Corporation Method and apparatus of monitoring polishing pad wear during processing
US6344413B1 (en) * 1997-12-22 2002-02-05 Motorola Inc. Method for forming a semiconductor device
US6207533B1 (en) * 1999-10-08 2001-03-27 Chartered Semiconductor Manufacturing Ltd. Method for forming an integrated circuit

Also Published As

Publication number Publication date
JP2004515059A (en) 2004-05-20
CN1242460C (en) 2006-02-15
WO2002043129A2 (en) 2002-05-30
TWI231958B (en) 2005-05-01
KR20040014423A (en) 2004-02-14
US6593238B1 (en) 2003-07-15
WO2002043129A3 (en) 2002-10-31
EP1340248A2 (en) 2003-09-03
CN1479942A (en) 2004-03-03

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