TWI227528B - Method for forming bumps on a wafer and plating tool for performing the method - Google Patents

Method for forming bumps on a wafer and plating tool for performing the method Download PDF

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TWI227528B
TWI227528B TW92121061A TW92121061A TWI227528B TW I227528 B TWI227528 B TW I227528B TW 92121061 A TW92121061 A TW 92121061A TW 92121061 A TW92121061 A TW 92121061A TW I227528 B TWI227528 B TW I227528B
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Taiwan
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wafer
bump
photoresist layer
under
ring
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TW92121061A
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Chinese (zh)
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TW200504885A (en
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Chi-Long Tsai
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Advanced Semiconductor Eng
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Publication of TW200504885A publication Critical patent/TW200504885A/en

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Abstract

A method for forming bumps on a wafer is disclosed. A wafer is provided. An under bump metallurgy layer (UBM) is formed on an active surface of the wafer and is further extended onto lateral of the wafer. A photoresist layer covers partial of the UBM layer on the active surface of the wafer. Then a wafer plating tool having a seal ring and at least a contact pin on its annular internal wall clamps the wafer. The seal ring seals the lateral of the wafer without covering the active surface of the wafer to prevent the UBM layer on lateral of the wafer, back surface of the wafer and the contact pin from being exposed. The contact pin contacts the UBM layer on the lateral of the wafer for completely plating bumps on the active surface of the wafer.

Description

1227528 五、發明說明(1) 【發明所屬之技術領域】 本發明係有關於一種晶圓之凸塊形成方法,特別係有 關於一種全面電鍍晶圓上之凸塊之方法與使用之電鍍治 具。 ° 【先前技術】 習知晶圓之凸塊形成方法係可區分為電鍍 (Electroplating)、蒸鍍(Evaporation)、印刷(Screen1227528 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a method for forming bumps on a wafer, and in particular, to a method for fully plating bumps on a wafer and a plating fixture used therefor. . ° [Prior technology] The conventional method for forming bumps on wafers can be divided into Electroplating, Evaporation, and Printing (Screen

Printing)或打線(Stud Bumping)等方式形成,其中利用 電鍍以形成晶圓上凸塊之方式係為一種可大量量產之方 法,然而在電鍍過程用以固定晶圓之電鍍治具將嚴重影響·· 具有良好凸塊之晶片產出率。 習知在晶圓上凸塊電鍵形成過程中,請參閱第1圖, 習知地一晶圓1 〇係具有一正面11及一背面丨2,該晶圓1 〇正 面11具有一保護層13及複數個銲墊14、14a,一凸塊下金 屬層 20(Under Bump Metallurgy, UBM)係形成於該晶圓 1〇 之正面11,並覆蓋接合該些銲墊14,接著,形成一光阻層 30於該晶圓1〇之正面11之該凸塊下金屬層2〇上,該光阻層 30係經曝光後具有複數個開口 31,該些開口 31係用以顯露 該些銲墊14上之部分凸塊下金屬層2〇,且該光阻層3〇係不 覆蓋至該晶圓1 〇之正面11之該些周邊銲墊丨4a,以供電鍍 時電性導接至該晶圓1 〇之正面丨丨周邊之不被該光阻層3〇覆 蓋之凸塊下金屬層20,在電鍍前,係將該晶圓1〇置於一習 知之電鍍治具50 ’該電鍍治具5〇係由一晶圓承載盤51及一 夾持環52所組成,該夾持環52係形成有一水平向往内延伸Printing or Stud Bumping, etc. The method of forming bumps on a wafer by electroplating is a method for mass production. However, the plating fixture used to fix the wafer during the plating process will seriously affect ·· Wafer yield with good bumps. In the process of forming bump keys on a wafer, please refer to FIG. 1. A wafer 10 has a front surface 11 and a back surface 2. The wafer 10 has a protective layer 13 on the front surface 11. And a plurality of bonding pads 14, 14a, an under bump metallurgy (UBM) 20 is formed on the front surface 11 of the wafer 10, and covers and bonds the bonding pads 14, and then forms a photoresist A layer 30 is on the metal layer 20 under the bump on the front side 11 of the wafer 10. The photoresist layer 30 has a plurality of openings 31 after exposure, and the openings 31 are used to expose the pads 14 The upper part of the bump is under the metal layer 20, and the photoresist layer 30 does not cover the peripheral pads 4a to the front surface 11 of the wafer 10, and is electrically connected to the crystal during power plating. The front side of the circle 〇 丨 丨 The surrounding metal layer 20 under the bump which is not covered by the photoresist layer 30. Before plating, the wafer 10 is placed on a conventional plating fixture 50. The 50 series is composed of a wafer carrier 51 and a clamping ring 52. The clamping ring 52 is formed to extend horizontally and inwardly.

第5頁 1227528 五、發明說明(2) 2板部53,在該延伸板部53之内表面係裝設有一密封 二” 一接觸針55,當該晶圓1〇定位於該晶圓承載盤51, 二爽持環52之密封環54係密封接觸該光阻層3〇,以夾固該 曰曰圓10,該夾持環52之接觸針55係電性接觸在晶圓ι〇之正 面11周邊之不被該光阻層3〇覆蓋之凸塊下金屬層2〇,以對 7塊下金屬層2〇提供陰極電位,習知該接觸針55係位於 該^圓10之正面11邊緣距離晶圓側面約2· 5 mm處,而該密 封環54為避免該接觸針55外露而被電鍍液污染,該密封環 54係應覆蓋至該晶圓丨〇之正面丨丨邊緣距離晶圓侧面約3〜5 mm處,使得位於該晶圓丨〇之正面丨丨之該些周邊銲墊丨上 常因被該密封環54所密封,導致該晶圓丨0周邊之該些周邊Page 5 1227528 V. Description of the invention (2) 2 plate portion 53, a seal 2 "and a contact pin 55 are installed on the inner surface of the extension plate portion 53, when the wafer 10 is positioned on the wafer carrier tray 51. The sealing ring 54 of Ershuang holding ring 52 is in sealing contact with the photoresist layer 30 to clamp the circle 10, and the contact pin 55 of the holding ring 52 is in electrical contact with the front side of the wafer The peripheral metal layer 20 under the bump which is not covered by the photoresist layer 30 at the periphery of 11 is used to provide cathode potential to 7 lower metal layers 20. It is known that the contact pin 55 is located at the edge of the front side 11 of the circle 10 At a distance of about 2.5 mm from the side of the wafer, and to prevent the contact pin 55 from being exposed and contaminated by the plating solution, the sealing ring 54 should cover the front side of the wafer. The edge is away from the wafer. The side is about 3 ~ 5 mm, so that the peripheral pads located on the front side of the wafer 丨 0 are often sealed by the sealing ring 54, which leads to the peripheral edges of the wafer 丨 0

麵*塾14a無法電鍵形成凸塊4〇 ’而造成在晶圓切割後, 良好之晶片僅能被報廢,使得具有凸塊晶片之產生率降 低0 此外,如我國專利公告第461 0 1 5號「晶圓電鍍夾具」 所揭示者,另一種晶圓電鍍夾具係具有一上蓋〔即夾持 環〕,該上蓋之開口係用以露出該晶圓之電鍍區域,然而 該上蓋係覆蓋至該晶圓正面之周緣,造成晶圓正面周緣無 法電鍵形成凸塊’而減少具凸塊之晶片產生效率。 【發明内容】 本發明之主要目的係在於提供一種晶圓之凸塊形成方 法,其係在晶圓固定步驟中,以一晶圓電鍍治具之密封環 密合一晶圓之侧面,該晶圓電鍍治具之接觸針係電性接觸 在該晶圓側面之凸塊下金屬層(Under Bump Metallurgy,Surface * 塾 14a cannot form bumps 40 ′ by electric keys, so that after wafer dicing, good wafers can only be scrapped, reducing the generation rate of wafers with bumps. In addition, such as China Patent Publication No. 461 0 1 5 "Wafer plating fixture" According to the disclosure, another wafer plating fixture has an upper cover (ie, a clamping ring). The opening of the upper cover is used to expose the plating area of the wafer. However, the upper cover covers the wafer. The periphery of the front side of the circle prevents the front side periphery of the wafer from electrically bonding to form bumps, thereby reducing the efficiency of wafers with bumps. [Summary of the Invention] The main purpose of the present invention is to provide a bump forming method for a wafer. In the wafer fixing step, a sealing ring of a wafer electroplating jig is used to closely contact a side surface of a wafer. The contact pins of the circular electroplating jig are in electrical contact with the metal layer under the bump (Under Bump Metallurgy,

12275281227528

ϋΒΜ),使晶圓正面周綾 具有良好凸塊之晶€㈣成以增進 本發明之次_日沾尨+ # h 被使用於-晶圓之供電鍵治*,其係可 環係設有一密封環與至少觸”亥;圓:=:合具之夾持 晶圓侧面之凸塊間传ί;圓固定時電性接觸該 尾卜金屬層,使得晶圓正面周緣之銲巷卜仿 可電鍍形成凸塊’以增進具有良好凸塊之晶片產率。 依本發明之-種晶圓之凸塊形成方法,首&,提 一晶圓,該晶圓具有一正面、一背面及一在該正面與該背 面間之側面,該正面形成有複數個銲墊;一凸塊下金屬層 (Under Bump Metall urgy,UBM)係形成於該晶圓之正 面’且该凸塊下金屬層係延伸至該晶圓之側面;♦後,形 成一光阻層於該晶圓之正面上,該光阻層係覆蓋該晶圓之 正面上之该凸塊下金屬層’且該光阻層係具有複數個開 口,該些開口係用以顯露該些銲墊上之凸塊下金屬層;之 後’以一晶圓電鑛治具固定該晶圓,該晶圓電鍵治具係具 有一 多’該夾持環係設有一密^摩及至少一接觸針, 該密封環係密封該晶圓之ϋ面,該些接觸針係電性接觸該 被密封之晶圓側面之凸塊下金屬層,在電鍍過程中辑數個囑丨 凸塊係形成於該些開口,因此,該光阻層之該些開口係可 不受到該晶圓電鑛治具之遮蓋影響,可設計於該晶圓正面 〔含正面周邊〕之任意位置’以電鍵形成凸塊,並在切割 該晶圓後而增加具凸塊之晶片產生ϋ。(ϋΒΜ), so that the front surface of the wafer has a good bump crystal to improve the second time of the present invention_ 日 日 尨 + # h is used for-wafer power supply keying, which can be provided with a seal The circle and at least touch "Hai; circle: =: pass between the bumps on the side of the clamping wafer; when the circle is fixed, the tail metal layer is electrically contacted, so that the welding lane on the front edge of the wafer can be plated. 'Bump formation' to improve wafer yield with good bumps. According to the present invention, a bump formation method for a wafer, first & mention a wafer, which has a front surface, a back surface and a wafer. A plurality of bonding pads are formed on the side surface between the front surface and the back surface; an under bump metallurgy (UBM) is formed on the front side of the wafer; and the under bump metal layer is extended To the side of the wafer; ♦ After that, a photoresist layer is formed on the front side of the wafer, the photoresist layer covers the metal layer under the bump on the front side of the wafer, and the photoresist layer has A plurality of openings for exposing the metal layer under the bumps on the pads; An electric mining fixture fixes the wafer, the wafer key fixture has a plurality of, the clamping ring system is provided with a dense friction and at least one contact pin, and the sealing ring system seals the face of the wafer. The contact pins are in electrical contact with the metal layer under the bumps on the side of the sealed wafer. During the electroplating process, a number of bumps are formed in the openings. Therefore, the openings in the photoresist layer are not required. Affected by the cover of the wafer electrical and mining jig, it can be designed to form bumps with electrical keys at any position on the front side of the wafer (including the periphery of the front side), and increase the number of wafers with bumps after cutting the wafer. .

第7頁 1227528 ____ 五、發明說明(4) 【實施方式】 參閱所附圖式,本發明將列舉以下之實施例辦明。 依本發明之晶圓之凸塊形成方法,首先請參閱第2 A 圖,提供一晶圓11〇,該晶圓110具有一正面111、一背面 11 2以及一在該正面111與該背面11 2間之環形侧面11 3,該 正面111係形成有一保護層11 4〔passivation layer〕以 及顯露於該保護層11 4之複數個銲墊1 1 5,其中該些銲墊 11 5係包含有至少一周邊銲墊11 5 a,較佳地,該些周邊銲 塾115a與該晶圓110之側面113之間距為不大於5.Omni。 再請參閱第2B圖,利用濺鑛〔sputtering〕或氣相沉鲁_ 積〔vapor evaporation〕技術形成一 &塊下金屬層 120(Under Bump Metallurgy,UBM)於該晶圓11〇 之正面 111,且該凸塊下金屬層120係延伸至該晶圓11〇之側面 11 3,且在此步驟中該凸塊下金屬層1 2 0係全面覆蓋該晶圓 正面111之保護層114與該些銲墊115。 再請參閱第2C圖,如以乾膜貼附或濕式光阻劑旋塗或 印刷等方法形成一光阻層1 30於該晶圓11 0之正面111之該 凸塊下金屬層1 2 0上,並經曝光顯影之後,使該光阻層1 3 〇 係形成有複數個開口 1 31,該些開口 1 31係顯露該些銲堅 114上之凸塊下金屬層120,該些開口 131包含有至少一周修 邊開口 131a,對應於上述之周邊銲墊115a,其係與該晶圓 11 〇之側面11 3之距離係不大於5· 0mm,在本實施例中,該 光阻層1 30係全面覆蓋該晶圓11 0之正面111,且該光阻層 1 30係不覆蓋至該晶圓π 0之侧面11 3。Page 7 1227528 ____ V. Description of the invention (4) [Embodiment] Referring to the attached drawings, the present invention will be enumerated with the following examples. According to the bump forming method of the wafer according to the present invention, first referring to FIG. 2A, a wafer 110 is provided. The wafer 110 has a front surface 111, a back surface 112, and a front surface 111 and a back surface 11. The ring-shaped side surface 11 3 between two, the front surface 111 is formed with a protective layer 11 4 [passivation layer] and a plurality of pads 1 1 5 exposed in the protective layer 11 4, wherein the pads 11 5 include at least A peripheral pad 11 5 a, preferably, the distance between the peripheral pads 115 a and the side surface 113 of the wafer 110 is not greater than 5.Omni. Referring again to FIG. 2B, a & Under Bump Metallurgy (UBM) 120 is formed on the front surface 111 of the wafer by using sputtering or vapor evaporation technology. The metal layer 120 under the bump extends to the side 11 3 of the wafer 110, and in this step, the metal layer 120 under the bump completely covers the protective layer 114 and the protective layer 114 on the front side 111 of the wafer. Those soldering pads 115. Please refer to FIG. 2C again. For example, a photoresist layer 1 30 is formed on the front surface 111 of the wafer 111 by a dry film attachment method or a wet photoresist spin coating or printing method. 2 0, and after exposure and development, the photoresist layer 1 30 is formed with a plurality of openings 1 31, the openings 1 31 are exposed under the bump metal layer 120 on the solder 114, the openings 131 includes at least one trimming opening 131a, which corresponds to the peripheral pad 115a described above, and the distance from the side surface 113 of the wafer 110 is not greater than 5.0 mm. In this embodiment, the photoresist layer The 1 30 series completely covers the front surface 111 of the wafer 110, and the photoresist layer 130 does not cover the side 11 3 of the wafer π 0.

Mil IRH 第8頁 1227528 五、發明說明(5) 請參閱第2D圖,利用一晶圓電鍍治具2〇〇固定該晶圓 11 〇,該晶圓電鍍治具2 0 0係包含有一晶圓承載盤2丨〇及一 夾持環220 ’該晶圓承載盤210係具有一承載面211,用以 承載該晶圓110,該夾持環220結合該晶圓承載盤21〇,用 以夾設固定該晶圓11 0,該夾持環22〇係具有一環形内壁 221〔annular internal wall〕,該夾持環 220 之環形内 壁221係接合有一軟質密封環230及至少一接觸針24〇 ,該 Φ封環2 3 0係設於該環形内壁2 21之較外緣,用以接觸該晶 圓11 0之側面11 3或/及該光阻層丨3 〇之垂直側邊,該接觸針 240係設在該密封環230與該晶圓承載盤21 〇之間,當該晶_ 圓11 0被該晶圓電鍍治具2 0 0固定時,該晶圓11 〇之背面1 j 2 係貼附於該晶圓承載盤21 〇之承載面211,該密封環2 3 〇係 密合該晶圓11 0之側面11 3且不覆蓋該晶圓11 〇之正面丨n , 該接觸針2 4 0係電性接觸該被密封之晶圓側面丨丨3之凸塊下 金屬層1 2 0,因此,利用該晶圓電鍍治具2; 〇 〇可使該被固定 晶圓110之正面111上光阻層130完全顯露,該光阻層13〇之 周邊開口131a當然亦不受該晶圓電鍍治具2〇〇遮蓋影響, 以供全面電鍍。 請參閱第2E圖,將該被固定之晶圓11 〇浸入一電鍍槽 (圖未繪出),由於該凸塊下金屬層120係以該接觸針24〇電_ 性導接成一陰極,以電鍍形成複數個凸塊140於該光阻層 130之該些開口 131〔包含周邊開口 131a〕,該些凸塊14〇 係結合於該些銲塾115上之凸塊下金屬層120,在本實施例 中,該些凸塊140係為電鍍形成之錫鉛合金,由於該晶圓 1227528 五、發明說明(6) ----- 110之正面111周緣未被該密封環23〇所遮蓋,於電鍍過程 中,可針對該光阻層13〇之全部開口131〔包含周邊開口 131a〕進行全面電鍍,使得該晶圓正面lu上之砵有銲墊 115上皆可結合有一凸塊14〇 ,不會有遮蓋電鍍現象導致晶 圓11 0周邊晶片被報廢之問題,以使整個晶圓丨丨〇能切割成 更多具有良好凸塊之晶片。 請參閱第3圖,在電鍍形成凸塊14〇之後,移除該晶圓 電鍵治具2 0 0與清除該光阻層1 3 〇,以凸塊1 4 0為抗钮錄 罩,#刻移除該凸塊下金屬層1 2 〇,使得在該些凸塊丨4 〇下 之凸塊下金屬層120被保留’必要時,經回鲜(Re Uqw)過鲁 程,使該些凸塊1 4 0成球狀。 本發明之保護範圍當視後附之申請專利範圍所界定者 為準,任何熟知此項技藝者,在不脫離本發明之精神和範 圍内所作之任何變化與修改,均屬於本發明之保護範圍。Mil IRH Page 8 1227528 V. Description of the invention (5) Please refer to Figure 2D. A wafer plating fixture 200 is used to fix the wafer 110. The wafer plating fixture 200 includes a wafer. Carrier disk 2 and a clamp ring 220 'The wafer carrier disk 210 has a carrier surface 211 for carrying the wafer 110, and the clamp ring 220 is combined with the wafer carrier disk 21 for clamping. It is assumed that the wafer 110 is fixed, the clamping ring 22o has an annular internal wall 221, and the annular inner wall 221 of the clamping ring 220 is joined with a soft sealing ring 230 and at least one contact pin 24o, The Φ seal ring 2 3 0 is located on the outer edge of the annular inner wall 2 21 and is used to contact the side surface 11 3 of the wafer 11 0 or / and the vertical side of the photoresist layer 丨 3 〇, the contact pin 240 series is provided between the sealing ring 230 and the wafer carrier 21 0. When the crystal circle 110 is fixed by the wafer plating jig 200, the back surface of the wafer 110 is 1 j 2 series Attached to the bearing surface 211 of the wafer carrier disk 21 〇, the sealing ring 2 3 0 is closely adhered to the side surface 11 3 of the wafer 110 and does not cover the front surface of the wafer 11 丨n, the contact pin 24 is electrically contacted with the metal layer 1 2 under the bump of the sealed wafer side 3, so the wafer plating fixture 2 is used; 〇〇 can be fixed The photoresist layer 130 on the front surface 111 of the wafer 110 is completely exposed, and the peripheral opening 131a of the photoresist layer 13 is of course not affected by the cover of the wafer plating fixture 200 for full plating. Referring to FIG. 2E, the fixed wafer 110 is immersed in a plating bath (not shown in the figure). Since the metal layer 120 under the bump is electrically connected to the cathode with the contact pin 24, a cathode is formed. A plurality of bumps 140 are formed on the openings 131 (including peripheral openings 131a) of the photoresist layer 130 by electroplating. The bumps 14 are bonded to the metal layer 120 under the bumps 115 on the solder pads 115. In the embodiment, the bumps 140 are tin-lead alloys formed by electroplating. Since the wafer 1227528 V. Description of the Invention (6) ----- 110, the peripheral edge of the front surface 111 is not covered by the sealing ring 23o. During the electroplating process, all the openings 131 (including the peripheral openings 131a) of the photoresist layer 13 can be fully plated, so that a bump 14 can be bonded to a pad 115 on the wafer front lu. There will not be any problem of scrapping the peripheral wafers around the wafer due to the phenomenon of covering plating, so that the entire wafer can be cut into more wafers with good bumps. Please refer to FIG. 3, after the bumps 140 are formed by electroplating, the wafer key bond fixture 200 is removed and the photoresist layer 13 is removed, and the bumps 140 are used as anti-button recording covers. # 刻Remove the metal layer under the bump 1 2 0, so that the metal layer 120 under the bump under the bump 丨 4 is retained. 'If necessary, the process is performed by Re Uqw to make the bumps. Block 1 40 is spherical. The protection scope of the present invention shall be determined by the scope of the appended patent application. Any changes and modifications made by those skilled in the art without departing from the spirit and scope of the present invention shall fall within the protection scope of the present invention. .

第10頁 1227528 圊式簡單說明 【圖式簡單 第 1 圖 第2A至2E圖 第 3 圖 說明】 :習知在晶 圓電鍍治 •依據本發 在凸塊形 :依據本發 具有凸塊 圓之凸塊電 具固定之晶 明之晶圓之 成過程中之 明之晶圓之 之晶圓之局 鍍形成過程 圓之局部截 凸塊形成方 局部截面示 凸塊形成方 部截面示意 ,被習知晶 面示意圖; 法,一晶圓 意圖;及 法,所製成 圖。 元件符號簡單說明: 10 晶 圓 11 正面 12 13 保 護層 14 銲墊 背 面 ⑩ 20 凸 塊 下 金屬 層 14a 周 邊銲墊 30 光 阻 層 31 開口 40 50 晶 圓 電 鍍治 具 凸 塊 51 晶 圓 承 載盤 52 夾持環 53 延 伸板部 54 密 封 環 55 接觸針 110 晶 圓 111 正面 112 背 面 113 側 面 114 保護層 115 銲 墊 115a 周邊銲墊 120 凸 塊 下 金屬 層 鲁 130 光 阻 層 131 開口 131a 周 邊開D 140 凸 塊 200 晶 圓 電 鍍治 具 210 晶 圓 承 載盤 211 承載面Page 10 1227528 Simple description of the pattern [simple figure 1 figure 2A to 2E figure 3 figure description]: Known in wafer electroplating • According to the hair in the bump shape: according to the hair with the bump circle The process of forming the crystal-clear wafer with the bumper fixture fixed is the process of the local plating of the wafer-clear wafer. The local cross-section of the bump is formed. The local cross-section shows the cross-section of the bump formation square, and the crystal plane is known. ; Law, a wafer intention; and law, the drawing. Simple description of the component symbols: 10 wafer 11 front 12 13 protective layer 14 back of solder pads 20 metal layer under bump 14a peripheral pad 30 photoresist layer 31 opening 40 50 wafer plating fixture bump 51 wafer carrier tray 52 Clamping ring 53 Extension plate portion 54 Sealing ring 55 Contact pin 110 Wafer 111 Front surface 112 Back surface 113 Side surface 114 Protective layer 115 Solder pad 115a Peripheral pad 120 Under bump metal layer 130 Photoresist layer 131 Opening 131a Peripheral opening D 140 Bump 200 wafer plating jig 210 wafer carrier tray 211 bearing surface

1227528 圖式簡單說明 220 夾持環 221 環形内壁 230 密封環 240 接觸針1227528 Schematic illustration 220 Clamping ring 221 Ring inner wall 230 Sealing ring 240 Contact pin

lil·!lil ·!

Claims (1)

1227528 — 【申請專利範圍】 1、 一種晶圓之凸塊形成友法,包含: &供一晶圓,該晶圓具有一正面、一背面及一在該正 面與該背面間之側面,該正面形成有複數個銲墊; 形成一凸塊下金屬層(Under Bump Metallurgy,UBM) 於該晶圓之正面,且該凸塊下金屬層係由該晶圓之正面 延伸至該晶圓之側面; 形成一光阻層於該晶圓之正面上,該光阻層係覆蓋該 B曰圓之正面上之該凸塊下金屬層,且該光阻層係具有複 數個開口,該些開口係用以顯露該些銲墊上之凸塊下金 屬層; 固定該晶圓於一晶圓電^渔^,該晶圓電鍍治具係具 有一夾持環,該夾持環係設有一密封環及至少一接觸 針,該密封環係密封該晶圓之剌面,該接觸針係電性接 觸該被密封之晶圓側面之凸塊下金屬層;及 電鍍形成複數個凸塊於該些開口。 2、 如申請專利範圍第1項所述之晶圓之凸塊形成方法, 其中在形成一光阻層之步驟中,該光阻層係全面覆蓋該 晶圓之正面。 3、 如申請專利範圍第1項所述之晶圓之凸塊形成方法,_ 其中該光阻層係具有至少一周邊開口,該周邊開口係設 於該晶圓之正面且與該晶圓之侧面之距離係不大於 5.Omm 〇 4、 如申請專利範圍第3項所述之晶圓之凸塊形成方法,1227528 — [Scope of patent application] 1. A bump forming method for a wafer, including: & for a wafer, the wafer having a front surface, a back surface, and a side surface between the front surface and the back surface, the A plurality of bonding pads are formed on the front surface; an under bump metallurgy (UBM) is formed on the front side of the wafer, and the under metal bump layer extends from the front side of the wafer to the side of the wafer Forming a photoresist layer on the front side of the wafer, the photoresist layer covering the metal layer under the bump on the front side of the circle B, and the photoresist layer having a plurality of openings, the openings are It is used to expose the metal layer under the bumps on the solder pads; the wafer is fixed on a wafer; the wafer electroplating jig has a clamping ring, and the clamping ring is provided with a sealing ring and At least one contact pin, the sealing ring seals the front surface of the wafer, the contact pin electrically contacts the metal layer under the bump on the side of the sealed wafer; and electroplating forms a plurality of bumps at the openings. 2. The bump formation method for a wafer as described in item 1 of the scope of the patent application, wherein in the step of forming a photoresist layer, the photoresist layer completely covers the front side of the wafer. 3. The bump forming method for a wafer as described in the first item of the scope of the patent application, wherein the photoresist layer has at least one peripheral opening, and the peripheral opening is provided on the front side of the wafer and connected to the wafer. The distance on the side is not greater than 5.0 mm. The bump forming method of the wafer as described in item 3 of the scope of patent application. __ 申請專利範圍 其中在晶 密封環覆 i、一種晶 係形成有 UBM)與一 之一側面 一晶圓 一夾持 圓,該爽 一密封 該晶圓之 至少~ 进封環與 晶圓側面 圓電鍍 一凸塊 光阻層 ’ 该晶 承載盤 環,其 持環係 環,其 側面且 接觸針 該晶圓 之凸塊 步驟中 電鍍凸 治具, 下金屬 ,其中 圓電鍍,用以 係裝設 具有一 係設於 不覆蓋 ,其係 承載盤 下金屬 ,該光阻層之周邊開口係不被該 塊於該周邊開口。 用以固定一晶圓,該晶圓之正面 層(Under Bump Metallurgy, 該凸塊下金屬層係延伸至該晶圓 治具係包含有: 承載該晶圓; 於該晶圓承載盤,用以固定該晶 環形内壁; 忒夾持環之環形内壁,用以密封 該晶圓之正面;及 設於該夾拍:搭:& _ 之間,=環形内壁且在該 層。 乂電性接觸該被密封之__ The scope of the application for patents includes a crystal sealing ring covering i, a crystal system formed with UBM) and one side of a wafer and a clamping circle, which cools at least the wafer ~ enter the sealing ring and the side circle of the wafer Electroplating a bump photoresist layer 'The crystal bears the disk ring, its holding ring system ring, and the side and contacts the pins of the wafer in the step of plating the plating fixture, the lower metal, which is a circular plating, is used for the installation The photoresist layer has a metal opening under the cover, and the peripheral opening of the photoresist layer is not opened by the block at the peripheral. It is used to fix a wafer, and the front layer of the wafer (Under Bump Metallurgy, the metal layer under the bump extends to the wafer fixture system includes: carrying the wafer; on the wafer carrier disk, for Fix the inner ring-shaped inner wall of the crystal; 环形 The inner ring-shaped inner wall of the clamping ring is used to seal the front side of the wafer; and it is arranged on the clip: between: & _, = the inner ring-shaped wall and in this layer. 乂 Electrical contact Should be sealed Hi 第14頁Hi Page 14
TW92121061A 2003-07-31 2003-07-31 Method for forming bumps on a wafer and plating tool for performing the method TWI227528B (en)

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