TW583492B - Manufacturing method for LCD panel with high aspect ratio - Google Patents

Manufacturing method for LCD panel with high aspect ratio Download PDF

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TW583492B
TW583492B TW092109176A TW92109176A TW583492B TW 583492 B TW583492 B TW 583492B TW 092109176 A TW092109176 A TW 092109176A TW 92109176 A TW92109176 A TW 92109176A TW 583492 B TW583492 B TW 583492B
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layer
liquid crystal
crystal display
manufacturing
thin film
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TW092109176A
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TW200422745A (en
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Guo-Chau Liang
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Hannstar Display Corp
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Priority to US10/752,502 priority patent/US20040209389A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1288Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13458Terminal pads
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78663Amorphous silicon transistors
    • H01L29/78669Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136231Active matrix addressed cells for reducing the number of lithographic steps
    • G02F1/136236Active matrix addressed cells for reducing the number of lithographic steps using a grey or half tone lithographic process

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Description

(-1) (-1)583492 玖、發明說明 (發明說明應敛明:發明所屬之技術領域、先前技術、内各、只施方式及圖式簡單說明) 頁域 本發明揭示一種液晶顯示面板之高開口率之製造方 法’特別係關於一種可減少光罩數量及增進可靠度之高開 口率液晶顯示面板製造方法。 先别技術 液晶顯示面板包含一具有複數個薄膜電晶體之透明基 板及一彩色濾光基板,該兩個基板平行疊放且四周以膠材 密封,其中間密封之空間則充滿液晶分子。如圖1所示, 該透明基板π之表面包含薄膜電晶體線路區1及位於週 圍之外引腳接合區2。 藉由第一道光蚀刻製程 (photo-etching process ; PEP)於 透明基板11上定義形成閘極金屬導線121及122。再分 別沈積絕緣層1 3、非晶碎層 (amorphous silicon layer) 1 4及 I虫刻阻擋層(etching stopper) 15於該透明基板11上,並 完成第二道光蝕刻製程。在此處,該絕緣層1 3及蝕刻 阻擋層1 5係由例如氮矽化合物(SNX)所構成。隨後, 進行第三道光蝕刻製程,即將N +非晶矽層1 6及源/ 沒極金屬層丨7沈積在該透明基板1 1上,並進行曝光、 顯影與蝕刻,而定義出源/汲極金屬層1 7之線路圖 型。至此薄膜電晶體3之相關結構已經完成。然而, 為了保護薄膜電晶體3及其他相關線路,可以再沈積 一氮矽化合物層1 3 1。 接著,於薄膜電晶體3之相關結構上沈積一保護層 H:\HU\LGC\_·晶㈣專卿2565 D〇c -5- 583492 (〇) mmm- 丨獲變變圓驛戀_!纏 1 8,並進行第四道光蝕刻製程。該保護層1 8可以是有 機透明材料或S i N x,但為了達到高開孔率故需要將保 護層1 8的表面平坦化,所以高開孔率製程乃選用有機 透明材料作為該保護層1 8,或以S N x加上有機透明材 料來形成保護層1 8。經過曝光、顯影與蝕刻後,於該 保護層1 8上形成複數個通孔1 2 4與1 2 5,其中由通孔 1 2 4露出之金屬導線1 2 2係作為外引腳接合墊1 2 3。最 後,定義一透明導電層1 9於該保護層1 8表面及通孔 125内,以作為像素電極(pixelelectode)。 圖 2係顯示習知形成有薄膜電晶體之透明基板與膠框 之相對位置的上視圖。該外引腳接合墊1 2 3位於透明基板 1 1之周圍,係用於和驅動元件之外引腳進行電性連接。 透明基板11與彩色濾光基板(圖未示出)之間是藉由膠 框4 0完成内部液晶分子之充填及密封。 該膠框4 0形成於保護層1 8之上方,一般膠框4 0係選 用硬度較高之環氧樹脂(epoxy ),如圖3所示。保護層 1 8若使用一般相對硬度低之丙晞酸醋(Acrylate)材料, 則容易於受到外力時產生裂縫,會造成液晶分子由裂 缝滲出。另一方面,在後續外引腳接合之接合製程 時,需要在外引腳接合區2上先塗佈一層異向性導電 膠層(Anisptropic Conductive Film ; ACF ) 3 1,如圖 4 所示。然 因通孔124太深,故會造成異向性導電膠層中之導電 粒子3 1 1與外引腳接合墊1 2 3接觸不良的電性問題。 為解決上述問題,另一習知技術係先將金屬導線 1 2 2 ’形成於透明基板1 1 ’之表面,如圖5 ( a )所示。再將 HAHU\LGC\瀚宇彩晶台灣專利\82565.DOC -6- 583492 Ο) mmm c' :, 絕緣層1 3 ’及氮矽化合物層1 3 Γ蝕刻出接觸窗,以露出 金屬導線1 2 2 ’作為外引腳接合墊1 2 3 ’,又,氮矽化合 物層1 3 Γ亦可視實際製程所需而省略。之後,定義保 護層1 8 ’於外引腳接合區2 ’以外之面積,如此膠框4 0 就可黏著在硬度較保護層1 8 ’高之絕緣層1 3 ’或氮矽化 合物層1 3 1 ’上,如圖5 ( b )所示。雖然上述方法改善了 裂缝的問題,但卻需要多一道光蝕刻製程。而且在形 成保護層1 8 ’之同時,因外引腳接合墊1 2 3 ’呈外露狀態 故會造成污染,所以還需要額外增加一道電漿蝕刻之 步驟將污染物去除。 習知方法均不能有效解決接合裂缝、污染和製程簡 化的問題,因此並不能滿足市場的需求。 發明内容 本發明之主要目的係提供一液晶顯示面板之高開 口率之製造方法,其係利用半調光蝕刻製程(half-tone PEP)將保護層形成於透明基板上,使得膠框可直接與 絕緣層黏合,並在製程中可減少使用一道光罩。 本發明之第二目的係提供一種液晶顯示面板之高 開口率之製造方法,外引腳接合墊係在保護層形成後 才外露,因此不需要清除外引腳接合墊上污染之步 驟。 本發明之第三目的係提供一種液晶顯示面板之高 開口率之製造方法,可增進驅動元件與外引腳接合墊 結合之可靠性。 為了達到上述目的,本發明提供一種液晶顯示面板之高 HAHU\LGC\瀚宇彩晶台灣專利\82565.DOC -7- (2)
開口率之製造方法,其係在一具有複數個薄膜電晶體之透 明基板上形成一保護層,再利用半調光罩完成曝光製程。 該透明基板之周圍具有外引腳接合區,經過顯影後該外引 腳接5 S之保護層有大部分會被去除。再以蚀刻製程使得 外引腳接合區之絕緣層的頂部外露,並在該絕緣層上形成 複數個通孔,該金屬線將外露於該通孔處以形成外引腳接 合墊。最後將預定圖型之透明導電層形成在該保護層上, 該透明導電層進入該保護層之通孔與該薄膜電晶體相連 接。 實施方式 圖6(a)〜(d)係本發明之液晶顯示面板之製造方法之第 實施例之步驟不意圖。首先,於圖6(a)之透明基板61上 先藉由第一道光蝕刻製程定義形成閘極金屬導線62丨及 622。在此處,該閘極金屬導線621及622可以由例如:絡、 鉬、鈕、鉬化姮、鉬化鎢、鋁、矽化鋁或銅等材質構成。 再分別將絕緣層6 3、非晶梦層6 4及钱刻阻擒層6 5定義形成 於該透明基板6 1上,而完成第二道光蝕刻製程。在此處, 該絕緣層6 3及蝕刻阻擔層6 5係由氮化矽、氧化碎(Si〇x ) 或氮氧化矽(SiOxNy)等絕緣材料所構成。隨後,進行第 三道光蝕刻製程,以定義形成既定圖案之N+非晶碎層66 及源/没極金屬層6 7於該透明基板6 1上。至此薄膜電晶體 6 c之相關結構已經完成’且該薄膜電晶體6 ^係一三層 (tri-layer)結構之薄膜電晶體。 進行第四組光蝕刻製程時,需要先在透明基板6丨上形 成一氮矽化合物層6 3 1及保護層6 8,亦即於薄膜電晶體 HAHIALGO瀚宇彩曰曰日台灣專柳挪. -8- 583492
(3) 線路區6 a及外引聊接合區6 b均覆蓋一氮石夕化合物層6 3 1 及保護層6 8,其中,氮矽化合物層6 3 1可視實際製程所 需而省略。該保護層6 8係一有機絕緣及透明之材料,例 如:丙晞酸酿類之塑膠材料。 如圖6(b)所示,取用一半調光罩進行保護層68之曝光步 騾。該步驟係利用半調光罩使該保護層68於顯影後產生不 同既定厚度之表面,以分別於薄膜電晶體線路區6 a及外引 腳接合區6b產生開口 625及624。一般而言,半調光罩係利 用透明之石英(quartz)作為底材,然後將一鉻層附著在石 英上,該鉻層具有類似灰階效果之複數個微細開口。藉由 二值化(binary)微細開口之佈置圖型即可改變曝光深度, 並於顯影後得到各種表面形狀之光阻層。本發明即係使用 光阻層作為該保護層6 8,而達到一次曝光顯影步驟即可形 成不同既定厚度光阻之效果。 圖6(c)係圖6(b)在施行蝕刻步驟後之結果。保護層68的 厚度乃形成為不同之既定厚度,同時在原先開口 624處形 成一通孔以露出外引腳接合塾6 2 3。在薄膜電晶體線路區 6a原先之開口 625則因蝕刻而深入擴大為開口 625,,並使 得源/汲極金屬層6 7外露於該開口 6 2 5,處。 最後’參考圖6 (d)所示,形成並定義一透明導電層(例 如ITO導電層)69於該保護層68表面及開口 625,内。 圖7係本發明之外引腳接合區6 b與膠框4 〇,之位置關係 之上視圖,該膠框40,直接黏著於絕緣層63之頂部,因此 有足夠之支擇強度可以固定膠框4 〇,。除了外露之絕緣層 63外’其他部分仍是由保護層68所覆蓋。
HAHU\LGC\激宇彩晶台灣專利\82565.DOC -9- 583492 (4) 發明_:精 圖8顯示本發明之背通道蝕刻(Back-Channel Etch ; BCE) 結構之薄膜電晶體之示意圖。背通蝕刻結構與前述三層結 構之差異在於沒有蝕刻阻擋層,而是將N +非晶矽層 66’ 與源/汲極金屬層 671分別形成於非晶矽層64上。其餘 步騾皆與第一實施例一致,同樣藉由半調光罩將保護層 68’定義於薄膜電晶體線路區6a1及外引腳接合區6b’之結 構上。最後,再定義形成透明導電層 6V於該保護層 68’ 上。在形成保護層 6 8'之前,可先沈積一氮矽化合物層 63 1'。 本創作之技術内容及技術特點巳揭示如上,然而熟悉本 項技術之人士仍可能基於本創作之教示及揭示而作種種 不背離本創作精神之替換及修飾。因此,本創作之保護範 圍應不限於實施例所揭示者,而應包括各種不背離本創作 之替換及修飾,並為以下之申請專利範圍所涵蓋。 圖式簡單說明 本創作將依照後附圖式來說明,其中: 圖1係習知之薄膜電晶體液晶顯示面板之透明基板之 結構7f意圖, 圖 2係習知薄膜電晶體液晶顯示面板之透明基板與膠 框之位置關係的上視圖; 圖3係圖2之側面結構之示意圖; 圖 4係異向性導電膠與習知薄膜電晶體液晶顯TF面板 之透明基板之示意圖; 圖 5 (a)〜5(b)係另一習知薄膜電晶體液晶顯示面板之透 HAHU\LGC\瀚宇彩晶台灣專利\82565.DOC -10- 583492
(5) 明基板之製程步驟之示意圖; 圖 6(a)〜6(d)係本發明之薄膜電晶體液晶顯示面板之透 明基板之製程步驟之第一實施例之示意圖; 圖7係本發明之薄膜電晶體液晶顯示面板之透明基 板與膠框之位置關係的上視圖;及 圖 8係本發明之薄膜電晶體液晶顯示面板之透明基板 之第二實施例之結構示意圖。 元件符號說明 1 薄膜電晶體線路區 2、2' 外引腳接合區 3 薄膜電晶體 1卜 11 f 透明基板 12 1 ^ 122 、122’ 金屬 導線 123 、123 ’ 外引腳接合墊 124 、125 通孔 13 絕 緣 層 13 1 ^ 131 ’ 氮矽化合物層 14 非晶 矽層 15 1 虫 刻 阻擋層 16 N+非 晶矽層 17 源 / 汲極金屬層 18 ^ 1 8? 保護層 19 透 明 導電層 3 1 異向 性導電膠層 3 11 導電粒子 40、 40 » 膠框 6a ' 6 af 薄膜電晶體線路區 6b、 6bf 外引腳接合區6c、 6 c f 薄膜電晶體 61 透明 基板 621 ^ 622 金屬導線 623 外引腳接合墊 624 、625 、625’ 開’ 63 絕緣 層 63 1 氮矽化合物層 H:\HU\LGC\瀚宇彩晶台灣專利\82565.DOC -11- 583492 6 3 1’ 氮矽化合物層 64 非晶矽層 65 蝕刻 阻檔層 6 6' 66’ N+非晶矽層 61、61' 源/汲極金屬層 68、68! 保護層 69 ^ 69’ 透明導電層 _環_嘗 H:\HU\LGC\瀚宇彩晶台灣專利\82565.DOC -12-

Claims (1)

  1. 583492 拾、申請專利範圍 1. 一種液晶顯示面板之高開口率之製造方法,包含下 列步驟: 提供一已形成有薄膜電晶體之透明基板,該透明 基板之周圍具有外引腳接合區,該外引腳接合區係 由一絕緣層覆蓋在金屬導線上所構成; 形成一保護層於該薄膜電晶體和外引腳接合區 之上; 利用一半調光罩對該保護層施行一微影步騾,以 去除位於該外引腳接合區之上既定部分之保護 層’並露出部分該絕緣層;及 對該保護層及上述露出之該絕緣層進行蝕刻,以 使得該絕緣層之頂部外露於該保護層,並於該絕緣 層中產生複數個通孔使該金屬導線外露。 2.如申請專利範圍第1項所述之液晶顯示面板之高開口 率之製造方法,其中該薄膜電晶體上方之該保護層因
    該蝕刻製程而形成至少一個通孔。 3 .如申請專利範圍第1項所述之液晶顯面板之南開 口率之製造方法,其更包含下列步驟: 形成一透明導電層於該保護層表面及該通孔 内,以使得該透明導電層與該薄膜電晶體電性相 連。 4.如申請專利範圍第1項所述之液晶顯不面板之南開 口率之製造方法,其中該薄膜電晶體為一個三層結 構之薄膜電晶體。 583492 5 .如申請專利範圍第1項所述之液晶顯示面板之高開 口率之製造方法,其中該薄膜電晶體為一背通道蝕 刻結構之薄膜電晶體。 6. 如申請專利範圍弟1項所述之液晶顯不面板之南開 口率之製造方法,其中外露之該金屬導線係作為外 引腳接合墊。 7. 如申請專利範圍第1項所述之液晶顯示面板之高開 口率之製造方法,其中該保護層為透明絕緣之有機 材料。 _ 8. 如申請專利範圍第7項所述之液晶顯示面板之高開 口率之製造方法,其中該有機材料為丙婦酸酯。 9. 如申請專利範圍弟1項所述之液晶顯不面板之向開 口率之製造方法,其更包含下列步驟: 於該絕緣層外露之該頂部與一密封該液晶顯示 ’ 面板之膠框相互黏合。 10. 如申請專利範圍第1項所述之液晶顯不面板之向 開口率之製造方法,其更包含下列步騾: _ 形成一氮矽化合物層於該絕緣層和該保護層之 間。
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US20060180569A1 (en) * 2005-02-15 2006-08-17 Chang Hsi-Ming Method of manufacturing step contact window of flat display panel
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CN103325792A (zh) * 2013-05-23 2013-09-25 合肥京东方光电科技有限公司 一种阵列基板及制备方法、显示装置
CN105093748A (zh) * 2015-08-13 2015-11-25 武汉华星光电技术有限公司 液晶面板及其阵列基板
CN110473895B (zh) * 2018-05-09 2022-01-18 京东方科技集团股份有限公司 一种oled显示基板及其制作方法、显示装置

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