TW464951B - Method for fabricating a semiconductor structure having a stable crystalline interface with silicon - Google Patents

Method for fabricating a semiconductor structure having a stable crystalline interface with silicon Download PDF

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Publication number
TW464951B
TW464951B TW089124893A TW89124893A TW464951B TW 464951 B TW464951 B TW 464951B TW 089124893 A TW089124893 A TW 089124893A TW 89124893 A TW89124893 A TW 89124893A TW 464951 B TW464951 B TW 464951B
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Taiwan
Prior art keywords
semiconductor structure
manufacturing
item
forming
patent application
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TW089124893A
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English (en)
Inventor
Zhiyi Jimmy Yu
Jun Wang
Ravindranath Droopad
Jamal Ramdani
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Motorola Inc
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/16—Oxides
    • C—CHEMISTRY; METALLURGY
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    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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    • H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
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    • H01L21/31691—Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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  • Chemical Vapour Deposition (AREA)

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6435 ! A7 ______B7_____ 五、發明說明（1 ) 本申請案已於1999年12月17曰在美國提出爲專利申請案 09/465,622 。 發明之領域 本發明大致關於一種製造半導體結構之方法，此結構包 括在珍基材與氧化物或其他氮化物之間之晶性驗土金屬氮 化物爲主界面，而且更特別地，關於一種製造包括驗土金 屬、矽、與氮之原子層之界面之方法〇 ' 發明之背景 對於許多之裝置應用’例如，用於非揮發性.高密度記憶 體與邏輯裝置之鐵電性或高介電常數氧化物？爲了後續單 晶性薄膜在矽上之外延生長，最希望有序及安定矽（si)表面 。在Si表面上建立有序過渡層爲重要的，特別是對於單晶 性氧化物之後續生長，例如，鈣鈦礦。 —些人報告這些氧化物’如BaO與BaTi03，在Si(100)上之 生長乃基於BaSiz(立方體）樣本，藉由在大於85i〇°c之溫度使 用反應性外延性，將Ba之四分之一單層沈積於以（1〇〇)上。 例如’參見：R.McKee等人之Appl: Phys. Lett. 59(7)，第 782-784 頁（1991年 8 月 12) ; R.McKee 等人之 Appl. Phys. Lett， 63(20) ’ 第 2818-2820頁（1993年 11月 15 日）；R.McKee等人之 Mat. Res. Soc. Symp_ Proc.，Vol. 21，第 131-135 頁（1991); R.A. McKee, F.J.Walker 與 M.F.Chisholm 之"Crystalline Oxides on Silicon · The First Five Monolayers" > Phys. Rev. Lett 81(14) ’ 3014-7(1998 年 10月 5 曰），美國專利 5,225,031 ’ 1993年7 月 6 日頒發’發明名稱 ”pr〇cess f〇r Dep0Siting an --------------裝i—ίί訂---------線 {請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 4 6 4； A7 B7 五、發明說明（） Oxide Epitaxially onto a Silicon Substrate and Structures Prepared with the Process11 ;及美國專利 5,482,003，1996年 1 月 9 日頒發，發明名稱”Process for Depositing Epitaxial Alkaline Earth Oxide onto a Substrate and Structures Prepared with the Process"。然而，此提議結構之原子程度 模擬顯示，其在高溫不易穩定。 一^.完..成SrTi03使用SrO緩衝層在矽（100)上之生長。 T.Tambo 等人之 JpnJ.Appl.Phys•，第 37 卷（1998)，第 4454-4459頁。然而’ SrO缓衝層太厚（100人），因而限制電晶體膜 之應用，及在生長時無法維持晶性》 此外’ SrTi03已使用Ti之厚金屬氧化物緩衝層（60-120A) 在矽上生長。B.K.Moon等人之Jpn.J.Appl.Phys.，第33卷 (1994)，第1472-1477頁。這些厚緩衝層限制電晶體之應用。 因此，需要一種製造含矽之薄、穩定晶性界面之方法。 圖式之簡要説明 ^ 圖I-2描述其上具有依照本發明形成之界面之清潔半導體 基材之横切面圖； 圖3-6描述其上具有依照本發明由氮化矽層形成之界面之 半導體基材之橫切面圖；及 圖7-8描述依照本發明在圖ι_6描述之結構上形成之鹼土金 屬氮化物層氮化物層之橫切面圖。 圖9-12描述依照本發明在圖之結構上形成之鈣鈦礦之 橫切面圖。 圖13描述'依照本發明之圖12之層的具體實施例之原子結 --------------裝— (請先閱讀背面之注意事項再填寫本頁) JK. --線. 本紙張尺度適用1f7國國家標準（CNS)A4規格（210 X 297公釐） 4 6 4 A7 B7 五、發明說明（3 ) 構之側視圖。 圖14描述界面沿圖13之視線AA之上視圖。· 圖15描述沿圖13之視線AA之上視圖，其包括界面與基材 之相鄰原子層。 較佳具體實施例之詳細説明 爲了在發（Si)基材與一或更多層之單晶性氧化物或氮化物 之間形成新穎之界面，可使用各種方法。許多提供之實例 均以具有清潔表面之Si基材，及在表面上具有氮化矽（Si：jN4 等）之Si基材開始。s“N4爲非晶性而非單晶性，而且爲了在 基材上生長額外單晶性材料之目的，希望提供單晶性氮化 物作爲界面。 現在回到圖式中，其中同樣之元素全部以同樣之數字代 表。圖1與圖2描述包括Si基材10之半導體結構，其具有清 潔表面12。清潔（2x1)表面12可以任何晋知清潔步驟得到， 例如，在大於或等於85(TC之溫度將Si02熱脱附，或藉由在 超高眞空中，在大於或等於300Ό之溫度，自氫終止Si(lxl) 表面去除氫》氫終止爲已知之方法，其中氫在表面12鬆弛 地键結至矽原子之擺盪键，而完成結晶結構。結晶材料之 界面Η可藉由在具有小於或等於1χ1〇-6毫巴之队分壓之生長 槽中，在低於或等於900eC之溫度，同時或循序地將控制量 之金屬、Si '與活化氮供應（如圖1之箭頭所示）至表面12而 凡成。應用於表面12以形成界面μ之金屬可爲任何金屬， 仁疋在較佳具體實施例中包含驗土金屬，如鋇（Ba)或魏（以）。 至於Ba、Si、與活性氮形式BaSiN2作爲界面14之應用， -6- f紙張尺度適用中職家標準（CNS)A4規格（210 X 297公笼) — ^»—1^,^; ^........ — | ' ·- ------- -裝 ----- 訂--- - „ 線 (請先閱讀背面之注意事項再填寫本頁> 4 6 4 9 5 1 A7 B7 五、發明說明（ 使用反射高能電子繞射（RHEED)技術監視生長，其在此技 藝中詳細記載，而且其可原地使用，即，在生長槽内實行 暴露步驟時。RHEED技術用以偵檢或感應表面結晶結構， 及在本方法中，藉由形成BaSiN2之原子層而快速地改變成 強且尖銳之光線。當然應了解，一旦提供及依照特定之製 造方法’則未必要在所有之基材上實行RHEED技術。 界面14之新穎原子結構敘述於以下之段落。 齊 'έ I才 熟悉此技藝者應了解，這些方法所示之溫度及壓力推薦 用於所述之特定具體實施例，但是本發明不限於特定之溫 度或壓力範園。 或者’在形成界面14時，可隨金屬、矽、與氮供應氧以形 成混合物/冬對氧之比例可大幅變化，佴是較佳爲約80%。 參考圖3-6’另—種方法包含形成其上具有表面12、及氮 化石夕層16之Si基材1〇。氮化矽層16可故意以此技藝已知之 控制方式形成，例如’藉由將活性氮應用（箭頭，)於表面12上 。氣化硬層亦可在超高眞空中使用矽與活性氮而形成於Si 基材上。例如，參見1999年5月25日頒予R.Droopad等人之 美國專利5,907,792，發明名稱 "Method of Forming a Silicon Nitnde Layer1'。新穎界面14可如下形成於,個建議之具體 實施例至少之一：藉由在超高眞空下，在700-90(TC將鹼土 金屬應用於氮化矽層16之表面18。更特別地，將Si基材10 及非晶性氮化矽層16加熱至低於氮化矽層16之昇華溫度之 溫度°其可在分子束外延槽中完成，或者Si基材10可在製 備令至少部份地加熱’然後將其轉移至生長槽及完成加熱 (請先閱讀背面之注意事項再填寫本頁) 丨裝 I n n 一OJ ϋ n n ί 1 IV ϋ I I · -I n ^ n 1111 f · 本紙張尺度適用中關家標準（CNS)A4規格（21Q χ 297公楚） 46495 1
五、發明說明（5 ) 經濟部智慧时產笱員!.肖象h乍土 。一旦將Si基材1〇適當地加熱及適當地降低生長槽中之壓 力，si基材ίο之其上具有氮化矽層16之表12暴露於金屬束 ’較佳爲驗土金屬’如圖5所描述。在較佳具體實施例中， 束爲Ba或Sr，其由電阻性加熱散逸管或由e_束蒸發來源產 生。Ba結合氮化矽，而且將氮化矽層16轉化成爲包含結晶 形式之BaSiNs之界面14。或者，可在低溫將提供驗土金屬 於表面，在超高眞空中在700_I000»C將結果退火。在另—個 具體實施例中，氧可随氮供應以形成界面14，圭成結晶形 式之BaSitN^Ol。 一旦形成界面14，一或更多層單晶性之氧化物、氮化物 、或其組合可形成於界面14之表面上。然而，選用之驗土 金屬氧化物層，如BaO或SrO，可置於界面14與單晶性氧化 物之間。此鹼土金屬氧化物提供低介電常數（對於如記憶體 電池爲有利的），而且亦防止氧自單晶性氧化物移動至以基 材 10。 （ 參考圖7與8，鹼土金屬氮化物層22之形成可藉由在低於 或等於7〇〇C及在小於或等κ1χ1(Γ5毫巴之分壓下，同時 或交替應用於鹼土金屬與活性氮之界面14之表面20而完成 。例如，此鹼土金屬氮化物層22可包含50-500Α之厚度。 參考圖9-12，單晶性氧化物層26，如鹼土金屬鈣欽礦，可 藉由在低於或等於70(TC及在小於或等於^切-5毫巴之氧分 壓下，同時或交替應用鹼土金屬氧化物、氧、與過渡金屬 (如鈦），而形成於界面14之表面20或鹼土金屬氮化物層22之 表面24上。例如，此單晶性氧化物層26可包含5〇_1〇〇〇人之 本1氏張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注舍？事項再填寫本頁) -裝 訂· 線· k: r_ 6 495 1 A7 B7五、發明說明（6 ) 厚度，而且晶格實質上符合底下之界面14或鹼土金屬氮化 物層22。應了解，在其他具體實施例中，單晶性氧化物層 %可包含一或更多層。 參考圖13 ,其顯示Si基材1〇、界面14、與鹼土金屬氧化物 層26乏原子组態之側視圖（以<?1〇>方向觀看）。爲了描述之 目的，所示之纽態以相對大小由大至小包含鳃原乎3〇、矽 原子32、氮原子34、與鈦原子36 ^ Si基材1〇僅包含矽原子 32。界面U包含金屬原子（其在較佳具體實施例描述爲锶原 子30)、矽原子32、及氮原子34。鹼土金屬氮層％包含鳃原 子3〇、氮（或氮與氧之組合）原子34 '與鈦原子％。 參考圖14,界面沿圖13之视線八八之上視圖顯示鳃、矽、 與氮原子30、32、34之配置。 參考圖15，沿圖13之視線AA之上視圖顯示界面14及以基 材10之上原子層11。 對於此討論，單層等於6.8x1〇m個原子/平方公分，及原子 層爲一個原子厚。可見到圖式中所示之界面14包含單—原 子層，但是可爲超過一個原子層，而Si基材1〇及鹼土金屬 氮層可爲許多個原子層。注意圖13，顯^^堇4個原子層之以 基材10及僅兩個原子層之鹼土金屬氮化物層％。界面丨斗包 含一半單層之鹼土金屬、一半平層之矽、及單層之氮。各 鳃原子30與Si基材1〇中之4個矽原子32實質上同等地間隔。 界面14中之矽原子u實質上爲—條線，而且在<11〇>方向在 鹼土金屬原子之間同等地間隔。Si基材1〇中之上原子層中 I各矽原子32键結界面14中之氮原子34,而且界面14中之 mi >lliln —^1 Λ I — J ϊ (請先閱讀背面之注意事項再填寫本頁)
J 訂----Ϊ- 線. -Γ .
本®时國國家標準（CN—規格⑽X 297公£7 7 46495 t A7 B7 五、發明說明（ 各矽原子32鍵結界面14中之2個氮原子34。界面14之氮原予 之二維鍵結配位滿足此種界面結構，其大爲降低界面14之 總量，因此增強其龜定性。界面14在以基材1〇之（〇〇1)表面 上以2x 1組％包含數列魏、妙、與氮原子3 〇、3 2、3 4，其在 <Ϊ10>方向爲lx及在<11〇>方向爲2χβ界面14具有2xl重組。 在此已敘述一種製造含矽10之薄、結晶界面14之方法。 界面14可包含單一原子層。藉薄界面14得到較佳之電晶體 應用’因爲未如壞重叠氧化'層對si基材之電連接，及因 爲界面14由於原子在處理中較易維持其晶度而較爲穩定。 此鹼土金屬- Si -氮爲主界面亦可作爲抗氧及其他元素之擴散 屏障。 (請先之注意事項再填寫本頁) i!---- 訂----- 經濟部智慧財產局員工消費合作社印製 -10 - 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）

Claims (1)

  1. 4S4SS ί A8B8C8D8 六、申請專利範圍 1， 一種製造半導體結構之方法，其包含步驟： 提供具有表面之矽基材； 在矽基材之表面上形成包含矽、氮、或氮與氧之混多 物、及金屬之單原子層；及 在界面上形成一或更多層單晶性氧化物。 2·根據申請專利範園第1項之饗造半導體結構之方法，其中 界面包含矽、氮'氧、與金屬之單原子層。 根據申請專利範圍第i項之製造半導體結構之方法，其中 材料包含氮化物、氧化物 '及氮化物與氧化物之混合物。 根據申請專利範圍第丨項之製造半導體結構之方法，其中 形成界面步騍包括形成2x1重組。 根據申請專利範園第1項之製造半導體結構之方法 形成界面步驟包括形成具2χΐ重纽之表面。 根據申請專利範園第1項之製造半導體結構之方法 形成界面步驟包括在超高眞空系統中形成界面。 根據申請專利範園第1項之製造牟導體結構之方法， 形成界面步骤包括在化學蒸氣沈積系統中形成界面其中 根據申請專利範圍第1項之製造半導體結構之方1 。 形成界面步驟包括在物理蒸氣沈積系統中形其中 9·根據申請專利範圍第1項之製造半導體結構之戈1西。 形成界面步驟包含形成包含矽、氮、氣 3 單原子層。 10·根據申請專利範園第1項之蓼造半導體結椹夕士_ 含步驟： —〜—？法 3. 4. 5. 6. 8. -11 - 本紙張尺細中規格⑵Ο x 297公笼） --------------裝--- (請先閱讀背面之注意事項再填窝本頁) 其中 其中 方法.，其中 、與鹼土金屬之
    訂 線. 46495 1 as ___§__ 六、申請專利範圍 形成一半單層之鹼土金屬； 形成一半單層之矽：及 形成單層之氮a 11. 根據申請專利範圍第1項之製造半導體結構之方法，其中 形成界面步驟包含形成一或更多個氧與氮之混合物之單 層之步驟。 12. 根據申請專利範圍第1項之製造半導體結構之方法，其中 單晶性材料包含氧化物、氮化物、或氧化物與氮化物之 混合物。 13_根據申請專利範圍第1項之製造半導體結構之方法，其中 單晶性材料包含一或更多層之氧化物 '氮化物、或氧化 物與氮化物之混合物。 14. 根據申請專利範園第1項之製造半導體結構之方法，其中 單晶性材料包含鹼土金屬氧化物β 15. 根據申請專利範圍第丨項之製造半導體結構之方法，其中 單晶性材料包含鈣鈇礦。 ' 16. 根據申請專利範圍第J項之製造半導體結構之方法，其中 形成界面步驟包含形成包含矽、氮、與鹼土金屬之單原 子層a I7·根據申請專利範圍第16項之製造半導體結構之方法，其 中驗土金屬選自鋇與勰。 I8· ~種製造半導體結構之方法，其包含步驟： 提供具有表面之硬基材； 在發基材之表面上形成氮化砍、氧化砂、或氮化發與 --—- -12 - 本紙張尺度適用準（CNS)A4-規格（210 X 297公釐"5-------- HHWi.il. :_j. .1 . 1 1 I ill — — — — —III ^ ill· — —— — ^·ϊιϊιίί {猜先閱讀背面之注意事項再填寫本頁) 4649S 1 AS B8 C8 D8 六、申請專利範圍 氧化砂之i昆合物之—； 在氮化♦、氧化矽、或氮化矽與氧化妙之混合物上提 供驗土金屬；及 將半導體結構加熱以形成包含相鄰石夕基材表面之單原 子層之界面。 19·根據t 4專利㈣第ι8項之製造半導體結構之方法，其 中加熱步驟包括形成具有2χ1重組之界面。 八 20.根據申請專利範圍第18項之製造半導體結構之方法，其 中提供驗土金屬及料導體結構加熱之步驟在超高眞空 系統中完成。 21 ·根據申凊專利範園第i 8項之製造半導體結構之方法，其 中提供鹼土金屬及將丰導體結構加熱之步騍在化學蒸氣 沈積系統中完成。 22. 根據申請專利範圍第18項之製造半導體結構之方法，其 中提供鹼土金屬及將半導體結構加熱之步驟在物理蒸氣 沈積系統中完成。 1 23. 根據申請專利範圍第18項之製造半導體結構之方法，其 中加熱步驟包括形成具有矽、氮 '氧、與鹼土金屬之單 原子層之界面。 24. 根據申請專利範圍第18項之製造半導體結構之方法，其 中加熱步驟包括形成界面步驟，其包含步骤： 形成一半單屢之驗土金屬； 形成一半單層之矽；及 形成單層之氮。 1 13- 本紙張尺度適用中國國家襟準（CNS)A4規格（210 X 297公釐） 4640S1 0900008 ABaD 六、申請專利範圍 25•根據中請專利_第18項之製造半導體 中加熱步骤5括形成界面步驟，其包含步驟： 形成一半單層之鹼土金屬； 形成一半單層:之矽；及 形成單層之氮與氧。 26. 根據申請專利範圍第18项之製造半導體結構 中加熱步驟包括形成-或更多個單敎氧與氮之、其 27. 根據申請專利範園第18項之製造半導體結構之^法物立 中加熱步驟包括形成具有硬、氮'與驗土金屬之單原； 層之界面。 平原于 28. 根據申請專利範圍第27項之製造半導體結構之方法 中鹼土金屬選自鋇與鳃β 29. 一種製造半導體結構之方法，其包含步驟： 提供具有表面之矽基材； 在矽基材之表面上提供鹼土金屬；及 提供矽與氮以與矽基材表面难成包含單原 丨子界面之界 面。 30. 根據申請專利範圍第29項之製造半導體結構之方法，提 供珍與it以形成界面之步驟亦包括提供氣。 31. 根據申請專利範園第29項之製造半導體結構之方法，其 中提供脍土金屬及提供矽與氮之步驟在超高眞空系統中 完成。 32·根據申請專利範圍弟29項之製造半導體結構之方法，龙 中提供鹼土金屬及提供矽與氮之步驟在化學蒸氣沈積系 其 其 — II--裝·-- (請先閱讀背面之注意事項再填窝本頁) 訂- ;線. -14 _ 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 4 6 4 9 5 1 A8 撰 D8 六、申請專利範圍 * ' 統中完成。 33.根據申請專利範圍第29項之製造半導體結構之方法，其 — — — — —— — — — — III — I I (請先閱讀背面之注意事項再填寫本頁) 中提供鹼土金屬及提供矽與氮之步驟在物理蒸氣沈玄 統中完成。 k 34·根據申請專利範圍第29項之製造半導體結構之方法，其 中提供矽與氮之步骤包含步驟： 形成一半單層之鹼土金屬； 形成一半單層之矽；及 形成單層之氮。 35_根據中請專利範園第29項之製造半導體結構之方法，其 中形成界面步驟包含形成—或更多個單層之氧與氮之混 合物之步碟D 36.根據申請專利範圍第29項之製造半導體結構之方法，其 中提供矽與氮步驟包含形成矽、氮、與鹼土金屬之單原 子層。 ^ --線· 37·根據申請專利範圍第％項之製造半導體結嘁之方法，其 中驗土金屬選自鎖與總。 38. 根據申請專利範圍第29項之製造半導體結構之方法，其 中提供矽與氮步驟包含形成具有2x1重組之界面。 39. 根據申請專利範圍第3〇項之製造半導體結構之方法，其 中提供矽與氮步驟包含步驟： 形成一半單層之鹼土金屬； 形成一半單層之矽；及 形成單層之氮與氧。 _____ -15- 本紙張尺度適用中國固·豕:標準(CNS)A4規格⑵〇 χ 297·^ 464951 儲_S六、申請專利範圍 40.根據申請專利範圍第8項之製造半導體結構之方法，其中 加熱步驟包括形成具有2x1重組之界面。 -16- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） !1·裝 ilrij 訂！ 1線 (請先閱讀背面之注意事項再填寫本頁)
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EP1108805B1 (en) 2004-05-26
DE60011022T2 (de) 2005-05-25
CN1301038A (zh) 2001-06-27
US6291319B1 (en) 2001-09-18
KR100676213B1 (ko) 2007-01-30
EP1108805A1 (en) 2001-06-20

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