TW356601B - Method for making memory cell of self-aligning field plate and structure of the same - Google Patents

Method for making memory cell of self-aligning field plate and structure of the same

Info

Publication number
TW356601B
TW356601B TW086112555A TW86112555A TW356601B TW 356601 B TW356601 B TW 356601B TW 086112555 A TW086112555 A TW 086112555A TW 86112555 A TW86112555 A TW 86112555A TW 356601 B TW356601 B TW 356601B
Authority
TW
Taiwan
Prior art keywords
layer
forming
nitride
oxide
etching
Prior art date
Application number
TW086112555A
Other languages
English (en)
Inventor
Xie-Lin Wu
Original Assignee
Tsmc Acer Semiconductor Mfg Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tsmc Acer Semiconductor Mfg Corp filed Critical Tsmc Acer Semiconductor Mfg Corp
Priority to TW086112555A priority Critical patent/TW356601B/zh
Priority to US08/990,117 priority patent/US5913118A/en
Priority to US09/122,813 priority patent/US6255682B1/en
Application granted granted Critical
Publication of TW356601B publication Critical patent/TW356601B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW086112555A 1997-08-28 1997-08-28 Method for making memory cell of self-aligning field plate and structure of the same TW356601B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW086112555A TW356601B (en) 1997-08-28 1997-08-28 Method for making memory cell of self-aligning field plate and structure of the same
US08/990,117 US5913118A (en) 1997-08-28 1997-12-12 Method of manufacturing trench DRAM cells with self-aligned field plate
US09/122,813 US6255682B1 (en) 1997-08-28 1998-07-27 Trench DRAM cells with self-aligned field plate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086112555A TW356601B (en) 1997-08-28 1997-08-28 Method for making memory cell of self-aligning field plate and structure of the same

Publications (1)

Publication Number Publication Date
TW356601B true TW356601B (en) 1999-04-21

Family

ID=21626953

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086112555A TW356601B (en) 1997-08-28 1997-08-28 Method for making memory cell of self-aligning field plate and structure of the same

Country Status (2)

Country Link
US (2) US5913118A (zh)
TW (1) TW356601B (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6027976A (en) * 1997-12-18 2000-02-22 Advanced Micro Devices, Inc. Process for making semiconductor device having nitride at silicon and polysilicon interfaces
KR100353470B1 (ko) * 1998-10-28 2002-11-18 주식회사 하이닉스반도체 반도체소자의 제조방법
US6825544B1 (en) * 1998-12-09 2004-11-30 Cypress Semiconductor Corporation Method for shallow trench isolation and shallow trench isolation structure
US6265260B1 (en) 1999-01-12 2001-07-24 Lucent Technologies Inc. Method for making an integrated circuit capacitor including tantalum pentoxide
US6297086B1 (en) * 1999-03-11 2001-10-02 International Business Machines Corporation Application of excimer laser anneal to DRAM processing
US6242357B1 (en) * 1999-05-06 2001-06-05 Mosel Vitelic Inc. Method for forming a deep trench capacitor of a DRAM cell
US6188096B1 (en) * 1999-06-09 2001-02-13 International Business Machines Corporation DRAM cell capacitor having increased trench capacitance
TW479297B (en) * 2001-03-27 2002-03-11 Nanya Technology Corp Etching process using stacked hardmask layers
US6900133B2 (en) * 2002-09-18 2005-05-31 Applied Materials, Inc Method of etching variable depth features in a crystalline substrate
US7005338B2 (en) * 2002-09-19 2006-02-28 Promos Technologies Inc. Nonvolatile memory cell with a floating gate at least partially located in a trench in a semiconductor substrate
US6939781B2 (en) * 2003-06-27 2005-09-06 Freescale Semiconductor, Inc. Method of manufacturing a semiconductor component that includes self-aligning a gate electrode to a field plate
US7232719B2 (en) * 2005-03-28 2007-06-19 Promos Technologies Inc. Memories having a charge storage node at least partially located in a trench in a semiconductor substrate and electrically coupled to a source/drain region formed in the substrate
JP2007043069A (ja) 2005-07-08 2007-02-15 Seiko Epson Corp 半導体装置および半導体装置の製造方法
US7271056B2 (en) * 2005-07-12 2007-09-18 United Microelectronics Corp. Method of fabricating a trench capacitor DRAM device
US7723201B2 (en) * 2006-01-09 2010-05-25 International Business Machines Corporation Structure and method for making on-chip capacitors with various capacitances
US7981800B1 (en) 2006-08-25 2011-07-19 Cypress Semiconductor Corporation Shallow trench isolation structures and methods for forming the same
US20090004868A1 (en) * 2007-06-29 2009-01-01 Doyle Brian S Amorphous silicon oxidation patterning
US8133781B2 (en) * 2010-02-15 2012-03-13 International Business Machines Corporation Method of forming a buried plate by ion implantation

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047815A (en) * 1988-08-18 1991-09-10 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device having a trench-stacked capacitor
US5111259A (en) * 1989-07-25 1992-05-05 Texas Instruments Incorporated Trench capacitor memory cell with curved capacitors
JPH03173174A (ja) * 1989-11-30 1991-07-26 Toshiba Corp 半導体記憶装置
JP2992066B2 (ja) * 1990-09-14 1999-12-20 大日本印刷株式会社 化粧材、化粧材の製造方法及び化粧材の製造に使用するエンボス版
US5202279A (en) * 1990-12-05 1993-04-13 Texas Instruments Incorporated Poly sidewall process to reduce gated diode leakage
JP3146316B2 (ja) * 1991-05-17 2001-03-12 日本テキサス・インスツルメンツ株式会社 半導体装置及びその製造方法
JPH06163851A (ja) * 1991-06-07 1994-06-10 Texas Instr Japan Ltd 半導体装置及びその製造方法
JP2652108B2 (ja) * 1991-09-05 1997-09-10 三菱電機株式会社 電界効果トランジスタおよびその製造方法
KR940006681B1 (ko) * 1991-10-12 1994-07-25 금성일렉트론 주식회사 스택트렌치 셀 및 그 제조방법
JP3037509B2 (ja) * 1992-08-04 2000-04-24 新日本製鐵株式会社 半導体記憶装置の製造方法
US5422294A (en) * 1993-05-03 1995-06-06 Noble, Jr.; Wendell P. Method of making a trench capacitor field shield with sidewall contact
US5442584A (en) * 1993-09-14 1995-08-15 Goldstar Electron Co., Ltd. Semiconductor memory device and method for fabricating the same dynamic random access memory device construction

Also Published As

Publication number Publication date
US6255682B1 (en) 2001-07-03
US5913118A (en) 1999-06-15

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