TW331017B - Manufacturing and checking method of semiconductor substrate - Google Patents

Manufacturing and checking method of semiconductor substrate

Info

Publication number
TW331017B
TW331017B TW086101197A TW86101197A TW331017B TW 331017 B TW331017 B TW 331017B TW 086101197 A TW086101197 A TW 086101197A TW 86101197 A TW86101197 A TW 86101197A TW 331017 B TW331017 B TW 331017B
Authority
TW
Taiwan
Prior art keywords
manufacturing
semiconductor substrate
thermal process
process engineering
checking method
Prior art date
Application number
TW086101197A
Other languages
English (en)
Inventor
Moriya Miyashita
Masanobu Ogino
Tadahide Hoshi
Masakun Numano
Hidekazu Samata
Original Assignee
Toshiba Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Co Ltd filed Critical Toshiba Co Ltd
Application granted granted Critical
Publication of TW331017B publication Critical patent/TW331017B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
TW086101197A 1996-02-15 1997-02-01 Manufacturing and checking method of semiconductor substrate TW331017B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2797096 1996-02-15

Publications (1)

Publication Number Publication Date
TW331017B true TW331017B (en) 1998-05-01

Family

ID=12235749

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086101197A TW331017B (en) 1996-02-15 1997-02-01 Manufacturing and checking method of semiconductor substrate

Country Status (3)

Country Link
US (1) US5951755A (zh)
KR (1) KR970063618A (zh)
TW (1) TW331017B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109075076A (zh) * 2016-04-27 2018-12-21 环球晶圆日本股份有限公司 硅晶片

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11307747A (ja) * 1998-04-17 1999-11-05 Nec Corp Ｓｏｉ基板およびその製造方法
WO2001056071A1 (fr) * 2000-01-26 2001-08-02 Shin-Etsu Handotai Co., Ltd. Procede de production d'une tranche epitaxiale de silicium
KR100881511B1 (ko) * 2001-07-10 2009-02-05 신에쯔 한도타이 가부시키가이샤 실리콘웨이퍼의 제조방법, 실리콘 에피텍셜 웨이퍼의제조방법 및 실리콘 에피텍셜 웨이퍼
JP4615161B2 (ja) * 2001-08-23 2011-01-19 信越半導体株式会社 エピタキシャルウエーハの製造方法
JP2005051040A (ja) * 2003-07-29 2005-02-24 Matsushita Electric Ind Co Ltd 半導体装置の製造方法及び半導体基板
JP2006032799A (ja) * 2004-07-20 2006-02-02 Shin Etsu Handotai Co Ltd シリコンエピタキシャルウェーハおよびその製造方法
JP2006040972A (ja) * 2004-07-22 2006-02-09 Shin Etsu Handotai Co Ltd シリコンエピタキシャルウェーハおよびその製造方法
JP2006294691A (ja) * 2005-04-06 2006-10-26 Toshiba Corp 半導体基板及び半導体装置とその製造方法
KR101313326B1 (ko) * 2006-12-29 2013-09-27 에스케이하이닉스 주식회사 후속 열처리에 의해 산소 침전물로 되는 유핵의 분포가제어된 실리콘 웨이퍼 및 그 제조방법
US8173535B2 (en) * 2009-12-21 2012-05-08 Omnivision Technologies, Inc. Wafer structure to reduce dark current
KR101302588B1 (ko) * 2012-01-03 2013-09-03 주식회사 엘지실트론 웨이퍼의 처리 방법
WO2015003022A1 (en) * 2013-07-01 2015-01-08 Solexel, Inc. High-throughput thermal processing methods for producing high-efficiency crystalline silicon solar cells
JP6156188B2 (ja) 2014-02-26 2017-07-05 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
JP6610056B2 (ja) * 2015-07-28 2019-11-27 株式会社Ｓｕｍｃｏ エピタキシャルシリコンウェーハの製造方法
US10410880B2 (en) * 2017-05-16 2019-09-10 Atomera Incorporated Semiconductor device including a superlattice as a gettering layer
DE102017213587A1 (de) * 2017-08-04 2019-02-07 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium und Verfahren zur Herstellung der Halbleiterscheibe

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2650704B1 (fr) * 1989-08-01 1994-05-06 Thomson Csf Procede de fabrication par epitaxie de couches monocristallines de materiaux a parametres de mailles differents
JPH0897159A (ja) * 1994-09-29 1996-04-12 Handotai Process Kenkyusho:Kk エピタキシャル成長方法および成長装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109075076A (zh) * 2016-04-27 2018-12-21 环球晶圆日本股份有限公司 硅晶片
CN109075076B (zh) * 2016-04-27 2023-03-24 环球晶圆日本股份有限公司 硅晶片

Also Published As

Publication number Publication date
KR970063618A (ko) 1997-09-12
US5951755A (en) 1999-09-14

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees