TW329526B - Test circuit for RAM - Google Patents
Test circuit for RAMInfo
- Publication number
- TW329526B TW329526B TW086111736A TW86111736A TW329526B TW 329526 B TW329526 B TW 329526B TW 086111736 A TW086111736 A TW 086111736A TW 86111736 A TW86111736 A TW 86111736A TW 329526 B TW329526 B TW 329526B
- Authority
- TW
- Taiwan
- Prior art keywords
- output
- ram
- circuit
- address
- output data
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/20—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits using counters or linear-feedback shift registers [LFSR]
Landscapes
- Tests Of Electronic Circuits (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8245194A JPH1092194A (ja) | 1996-09-17 | 1996-09-17 | メモリテスト回路 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW329526B true TW329526B (en) | 1998-04-11 |
Family
ID=17130028
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086111736A TW329526B (en) | 1996-09-17 | 1997-08-15 | Test circuit for RAM |
Country Status (5)
Country | Link |
---|---|
US (1) | US6108803A (zh) |
JP (1) | JPH1092194A (zh) |
KR (1) | KR100364830B1 (zh) |
TW (1) | TW329526B (zh) |
WO (1) | WO1998012705A1 (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100329767B1 (ko) * | 1998-12-24 | 2002-05-09 | 박종섭 | 테스트시간을줄이기위한원형버퍼및그제어방법 |
JP2001101898A (ja) * | 1999-09-30 | 2001-04-13 | Ando Electric Co Ltd | アドレス制御回路 |
KR20030083488A (ko) * | 2002-04-23 | 2003-10-30 | 삼성전자주식회사 | 집적 회로의 동작 테스트 방법 |
US6886119B2 (en) * | 2002-09-04 | 2005-04-26 | Agere Systems Inc. | Method and apparatus for improved integrated circuit memory testing |
US7747901B2 (en) * | 2005-07-20 | 2010-06-29 | Texas Instruments Incorporated | Auxiliary link control commands |
KR101196492B1 (ko) * | 2008-05-21 | 2012-11-01 | 가부시키가이샤 어드밴티스트 | 패턴 발생기 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4429389A (en) * | 1981-05-26 | 1984-01-31 | Burroughs Corporation | Test pattern address generator |
JPH0754346B2 (ja) * | 1987-02-05 | 1995-06-07 | 株式会社日立製作所 | メモリicの試験パターン発生装置 |
US4876685A (en) * | 1987-06-08 | 1989-10-24 | Teradyne, Inc. | Failure information processing in automatic memory tester |
JPH0812230B2 (ja) * | 1988-09-06 | 1996-02-07 | 株式会社日立製作所 | Ic試験装置 |
JPH02202640A (ja) * | 1989-02-01 | 1990-08-10 | Seiko Epson Corp | パターン発生装置 |
EP0382246A3 (en) * | 1989-02-09 | 1991-09-11 | Nec Corporation | Bit addressing system |
JP2568268B2 (ja) * | 1989-02-23 | 1996-12-25 | 沖電気工業株式会社 | データ列発生回路及びその回路を用いたメモリテスト装置 |
JPH033200A (ja) * | 1989-05-30 | 1991-01-09 | Nec Corp | 半導体記憶装置 |
US5321701A (en) * | 1990-12-06 | 1994-06-14 | Teradyne, Inc. | Method and apparatus for a minimal memory in-circuit digital tester |
US5386523A (en) * | 1992-01-10 | 1995-01-31 | Digital Equipment Corporation | Addressing scheme for accessing a portion of a large memory space |
-
1996
- 1996-09-17 JP JP8245194A patent/JPH1092194A/ja not_active Withdrawn
-
1997
- 1997-07-24 KR KR10-1998-0703541A patent/KR100364830B1/ko not_active IP Right Cessation
- 1997-07-24 US US09/066,339 patent/US6108803A/en not_active Expired - Fee Related
- 1997-07-24 WO PCT/JP1997/002565 patent/WO1998012705A1/ja active IP Right Grant
- 1997-08-15 TW TW086111736A patent/TW329526B/zh active
Also Published As
Publication number | Publication date |
---|---|
KR19990067519A (ko) | 1999-08-25 |
WO1998012705A1 (fr) | 1998-03-26 |
KR100364830B1 (ko) | 2003-05-01 |
US6108803A (en) | 2000-08-22 |
JPH1092194A (ja) | 1998-04-10 |
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