TW301031B - - Google Patents

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Publication number
TW301031B
TW301031B TW085105066A TW85105066A TW301031B TW 301031 B TW301031 B TW 301031B TW 085105066 A TW085105066 A TW 085105066A TW 85105066 A TW85105066 A TW 85105066A TW 301031 B TW301031 B TW 301031B
Authority
TW
Taiwan
Prior art keywords
plasma
item
diffusion barrier
barrier layer
patent application
Prior art date
Application number
TW085105066A
Other languages
English (en)
Chinese (zh)
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW301031B publication Critical patent/TW301031B/zh

Links

Classifications

    • H10P14/20—
    • H10W20/048—
    • H10W20/033—

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
TW085105066A 1995-03-20 1996-04-29 TW301031B (cg-RX-API-DMAC10.html)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/407,353 US5605724A (en) 1995-03-20 1995-03-20 Method of forming a metal conductor and diffusion layer

Publications (1)

Publication Number Publication Date
TW301031B true TW301031B (cg-RX-API-DMAC10.html) 1997-03-21

Family

ID=23611686

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085105066A TW301031B (cg-RX-API-DMAC10.html) 1995-03-20 1996-04-29

Country Status (5)

Country Link
US (1) US5605724A (cg-RX-API-DMAC10.html)
EP (1) EP0738002A3 (cg-RX-API-DMAC10.html)
JP (1) JPH08260131A (cg-RX-API-DMAC10.html)
KR (1) KR970067597A (cg-RX-API-DMAC10.html)
TW (1) TW301031B (cg-RX-API-DMAC10.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7859385B2 (en) 2004-09-21 2010-12-28 Nantero, Inc. Resistive elements using carbon nanotubes

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6699530B2 (en) 1995-07-06 2004-03-02 Applied Materials, Inc. Method for constructing a film on a semiconductor wafer
US6365495B2 (en) 1994-11-14 2002-04-02 Applied Materials, Inc. Method for performing metallo-organic chemical vapor deposition of titanium nitride at reduced temperature
US20020033533A1 (en) * 1994-11-14 2002-03-21 Marvin Liao Interconnect structure for use in an integrated circuit
US6155198A (en) * 1994-11-14 2000-12-05 Applied Materials, Inc. Apparatus for constructing an oxidized film on a semiconductor wafer
US6291343B1 (en) 1994-11-14 2001-09-18 Applied Materials, Inc. Plasma annealing of substrates to improve adhesion
US5913144A (en) * 1996-09-20 1999-06-15 Sharp Microelectronics Technology, Inc. Oxidized diffusion barrier surface for the adherence of copper and method for same
US5909637A (en) * 1996-09-20 1999-06-01 Sharp Microelectronics Technology, Inc. Copper adhesion to a diffusion barrier surface and method for same
KR100510917B1 (ko) * 1996-11-22 2005-11-09 트리콘 이큅먼츠 리미티드 장벽층형성방법
GB2319532B (en) 1996-11-22 2001-01-31 Trikon Equip Ltd Method and apparatus for treating a semiconductor wafer
GB2319533B (en) * 1996-11-22 2001-06-06 Trikon Equip Ltd Methods of forming a barrier layer
CA2191260A1 (en) * 1996-11-26 1998-05-26 Luc Ouellet Stabilization of the interface between tin and a1 alloys
US5856237A (en) * 1997-10-20 1999-01-05 Industrial Technology Research Institute Insitu formation of TiSi2/TiN bi-layer structures using self-aligned nitridation treatment on underlying CVD-TiSi2 layer
KR100494648B1 (ko) * 1997-12-30 2005-09-30 주식회사 하이닉스반도체 스텝커버리지가향상된알루미늄증착방법
US6482734B1 (en) 1998-01-20 2002-11-19 Lg Semicon Co., Ltd. Diffusion barrier layer for semiconductor device and fabrication method thereof
JP3606095B2 (ja) * 1998-10-06 2005-01-05 セイコーエプソン株式会社 半導体装置の製造方法
KR20030089756A (ko) * 2002-05-18 2003-11-28 주식회사 하이닉스반도체 삼원계 확산배리어막의 형성 방법 및 그를 이용한구리배선의 형성 방법
KR100480756B1 (ko) * 2002-08-02 2005-04-06 한국화학연구원 산화알루미늄 박막 제조 방법
DE10240106A1 (de) * 2002-08-30 2004-03-11 Infineon Technologies Ag Ausbildung einer elektrischen Verbindung zwischen Strkturen in einem Halbleitersubstrat
KR100895404B1 (ko) * 2002-12-30 2009-05-06 주식회사 하이닉스반도체 반도체소자의 금속배선 형성방법
US9147736B2 (en) * 2013-03-01 2015-09-29 Taiwan Semiconductor Manufacturing Company, Ltd. High-K film apparatus and method
CN103898457B (zh) * 2014-03-27 2016-06-08 江苏科技大学 TiWN硬质纳米结构薄膜及制备方法
CN104109831A (zh) * 2014-06-13 2014-10-22 江苏科技大学 TiWCN 硬质薄膜及制备方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03104220A (ja) * 1989-09-19 1991-05-01 Fujitsu Ltd 半導体装置の製造方法
JPH03153077A (ja) * 1989-11-10 1991-07-01 Seiko Epson Corp 半導体装置
JPH03157965A (ja) * 1989-11-15 1991-07-05 Nec Corp 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7859385B2 (en) 2004-09-21 2010-12-28 Nantero, Inc. Resistive elements using carbon nanotubes

Also Published As

Publication number Publication date
KR970067597A (ko) 1997-10-13
JPH08260131A (ja) 1996-10-08
EP0738002A2 (en) 1996-10-16
EP0738002A3 (en) 1998-04-15
US5605724A (en) 1997-02-25

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees