TW290693B - - Google Patents

Info

Publication number
TW290693B
TW290693B TW085105238A TW85105238A TW290693B TW 290693 B TW290693 B TW 290693B TW 085105238 A TW085105238 A TW 085105238A TW 85105238 A TW85105238 A TW 85105238A TW 290693 B TW290693 B TW 290693B
Authority
TW
Taiwan
Application number
TW085105238A
Original Assignee
Samsug Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsug Electronics Co Ltd filed Critical Samsug Electronics Co Ltd
Application granted granted Critical
Publication of TW290693B publication Critical patent/TW290693B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders
TW085105238A 1995-05-12 1996-05-01 TW290693B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950011749A KR0142962B1 (ko) 1995-05-12 1995-05-12 계급적 컬럼선택라인구조를 가지는 반도체 메모리 장치

Publications (1)

Publication Number Publication Date
TW290693B true TW290693B (zh) 1996-11-11

Family

ID=19414325

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085105238A TW290693B (zh) 1995-05-12 1996-05-01

Country Status (6)

Country Link
US (1) US5715209A (zh)
JP (1) JPH08339687A (zh)
KR (1) KR0142962B1 (zh)
DE (1) DE19618781B4 (zh)
GB (1) GB2300737B (zh)
TW (1) TW290693B (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100230412B1 (ko) * 1997-03-08 1999-11-15 윤종용 멀티 뱅크를 갖는 반도체 메모리장치
US5822268A (en) * 1997-09-11 1998-10-13 International Business Machines Corporation Hierarchical column select line architecture for multi-bank DRAMs
US5949732A (en) * 1997-09-11 1999-09-07 International Business Machines Corporation Method of structuring a multi-bank DRAM into a hierarchical column select line architecture
US5923605A (en) * 1997-09-29 1999-07-13 Siemens Aktiengesellschaft Space-efficient semiconductor memory having hierarchical column select line architecture
KR100252053B1 (ko) * 1997-12-04 2000-05-01 윤종용 칼럼 방향의 데이터 입출력선을 가지는 반도체메모리장치와불량셀 구제회로 및 방법
JP2000040358A (ja) * 1998-07-21 2000-02-08 Mitsubishi Electric Corp 半導体記憶装置
JP2000187984A (ja) * 1998-12-24 2000-07-04 Matsushita Electric Ind Co Ltd 半導体記憶装置及び副ワード線駆動信号発生回路
US6288964B1 (en) 1999-07-23 2001-09-11 Micron Technology, Inc. Method to electrically program antifuses
DE10260647B3 (de) * 2002-12-23 2004-08-26 Infineon Technologies Ag Integrierter Halbleiterspeicher, insbesondere DRAM-Speicher, und Verfahren zum Betrieb desselben
JP2006134469A (ja) 2004-11-05 2006-05-25 Elpida Memory Inc 半導体記憶装置
KR20110100464A (ko) * 2010-03-04 2011-09-14 삼성전자주식회사 반도체 메모리 장치
US8964496B2 (en) 2013-07-26 2015-02-24 Micron Technology, Inc. Apparatuses and methods for performing compare operations using sensing circuitry
KR102468863B1 (ko) * 2016-02-26 2022-11-18 에스케이하이닉스 주식회사 반도체 메모리 장치

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2654548B2 (ja) * 1987-10-02 1997-09-17 株式会社日立製作所 半導体記憶装置
JP2825291B2 (ja) * 1989-11-13 1998-11-18 株式会社東芝 半導体記憶装置
JPH03181094A (ja) * 1989-12-08 1991-08-07 Hitachi Ltd 半導体記憶装置
JP2880547B2 (ja) * 1990-01-19 1999-04-12 三菱電機株式会社 半導体記憶装置
KR950004853B1 (ko) * 1991-08-14 1995-05-15 삼성전자 주식회사 저전력용 블럭 선택 기능을 가지는 반도체 메모리 장치
JPH0574165A (ja) * 1991-09-10 1993-03-26 Nec Corp 半導体記憶装置
JP3304531B2 (ja) * 1993-08-24 2002-07-22 富士通株式会社 半導体記憶装置
JPH07130163A (ja) * 1993-11-01 1995-05-19 Matsushita Electron Corp 半導体メモリ
US5535172A (en) * 1995-02-28 1996-07-09 Alliance Semiconductor Corporation Dual-port random access memory having reduced architecture

Also Published As

Publication number Publication date
GB2300737B (en) 1997-07-02
KR960042734A (ko) 1996-12-21
US5715209A (en) 1998-02-03
KR0142962B1 (ko) 1998-08-17
GB9609788D0 (en) 1996-07-17
GB2300737A (en) 1996-11-13
JPH08339687A (ja) 1996-12-24
DE19618781B4 (de) 2004-07-08
DE19618781A1 (de) 1996-11-14

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