TW288182B - Process of IC with high packing density - Google Patents

Abstract

A process of IC with high packing density comprises of: (1) forming one thin film to be etched on silicon substrate; (2) coating first photoresist on the above thin film; (3) after first photoresist mask exposure and development making first photoresist be with window pattern, and the min. width of the window is resolution of aligned exposure plus two times alignment tolerance; (4) baking first photoresist with pattern; (5) coating second photoresist on the above thin film, meanwhile opening window of first photoresist is also filled by the second photoresist; (6) after second photoresist exposure the second photoresist mask is by shifting first photoresist mask a distance equal to line width, i.e. light translucidus area and untranslucidus area is contrast to first photoresist mask, and after developing line width between first photoresist pattern and second photoresist pattern is alignment tolerance which is far less than resolution limit of alignment exposure; (7) by the above two times photoresist imaging process, making line width of photoresist pattern be min., avoiding being constrained to resolution limit of alignment exposure, and therefore achieving effect of device with high packing density.