TW258832B - Process of flash EEPROM - Google Patents

Process of flash EEPROM

Info

Publication number
TW258832B
TW258832B TW84100089A TW84100089A TW258832B TW 258832 B TW258832 B TW 258832B TW 84100089 A TW84100089 A TW 84100089A TW 84100089 A TW84100089 A TW 84100089A TW 258832 B TW258832 B TW 258832B
Authority
TW
Taiwan
Prior art keywords
masking material
semiconductor substrate
forming
field oxide
flash eeprom
Prior art date
Application number
TW84100089A
Other languages
Chinese (zh)
Inventor
Yeun-Ding Horng
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW84100089A priority Critical patent/TW258832B/en
Application granted granted Critical
Publication of TW258832B publication Critical patent/TW258832B/en

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  • Non-Volatile Memory (AREA)

Abstract

A process of flash EEPROM, that is applicable to the first-type semiconductor substrate to implement flash EEPROM, includes the following steps: (1) forming masking material along one first direction on the above semiconductor substrate to confine bit line of the above flash EEPROM; (2) with the above masking material as mask implementing oxidization to form field oxide on the above semiconductor substrate to make the above masking material across on the above field oxide; (3) with the above field oxide as mask implanting the second dopant into the above the first semiconductor substrate through the above masking material to form the above bit line; (4) with the above masking material as mask removing the above field oxide and leave field oxide under the above masking material to form trench reaching to the above semiconductor substrate; (5) removing the above masking material; (6) implementing oxidization, then forming tunnel oxide on semiconductor substrate in the above trench, simultaneously forming separating oxide on the above bit line; (7) forming floating gate on the above tunnel oxide and field oxide; (8) forming gate dielectric layer on the above floating gate; (9) forming control gate along the second direction with preset angle to the above first direction and on the above gate dielectric layer to become bit line of the above flash EEPROM.
TW84100089A 1995-01-07 1995-01-07 Process of flash EEPROM TW258832B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW84100089A TW258832B (en) 1995-01-07 1995-01-07 Process of flash EEPROM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW84100089A TW258832B (en) 1995-01-07 1995-01-07 Process of flash EEPROM

Publications (1)

Publication Number Publication Date
TW258832B true TW258832B (en) 1995-10-01

Family

ID=51401798

Family Applications (1)

Application Number Title Priority Date Filing Date
TW84100089A TW258832B (en) 1995-01-07 1995-01-07 Process of flash EEPROM

Country Status (1)

Country Link
TW (1) TW258832B (en)

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees