TW202220366A - Motor drive circuit and motor module - Google Patents

Abstract

Provided is a motor drive circuit capable of carrying out switching of PWM phases by limiting the occurrence of long continuous on (or off) times immediately after switching of a PWM signal phase. The motor drive circuit 100 comprises a first input terminal P, a second input terminal N, a capacitor C, three series units 112, and a signal generation part 120. The PWM signal includes a positive phase PWM signal PS and a negative phase PWM signal NS. The PWM signal additionally has a connecting pulse set AS before and after a phase switch timing tsw and between the positive phase PWM signal PS and the negative phase PWM signal NS. The connecting pulse set AS has a connecting on pulse AS on and a connecting off pulse AS off. The connecting on pulse AS on has a connecting on period AT on. The connecting off pulse AS off has a connecting off period AT off. The connecting on period AT on is shorter than an on period of one cycle of a PWM cycle before the phase switch or after the phase switch.

Description

Motor drive circuit and motor module

The present invention relates to a motor driving circuit and a motor module.

As a driving method of a three-phase motor, a two-phase modulation method is known (for example, Patent Document 1). The inverter device described in Patent Document 1 includes a control means for holding command values of two phases other than one of the three phases, which are turned on or off, from two phases that are 180 degrees different from each other and equal in amplitude and frequency. The triangular fundamental waves are compared respectively, and pulse width modulation (Pulse Width Modulation, PWM) control is performed on the respective on and off of the corresponding switching elements. The control means switches one of the triangular fundamental waves, which is compared with the command value of one of the three phases held on or off, to the other of the triangular fundamental waves. This makes it possible to reduce the current flowing into and out of the capacitor (capacitor) compared to the case where the command values of the two phases other than one of the three phases held on or off are compared with the same triangular fundamental wave for PWM control. ripple current). [PRIOR ART DOCUMENT] [PATENT DOCUMENT]

[Patent Document 1] Japanese Patent Laid-Open No. 2006-197707

[The problem to be solved by the invention]

However, in the inverter device described in Patent Document 1, the switching of the phase of the PWM signal is limited to the case where the switched phase is kept on or off. That is, the triangular fundamental wave used in the generation of the PWM waveform of each phase is fixed to one of the two triangular fundamental waves whose phases are different by 180 degrees during the period in which the phase is switched, and the triangular fundamental wave is not switched during the switching. . Furthermore, when the output voltage pattern shown in FIG. 4( b ) is given in Patent Document 1, since the motor connected to the output is an inductive load, the current waveform is delayed with respect to the voltage waveform. At this time, in a part of the rotation angle section, if the two phases being switched are PWM controlled by triangular waves whose phases are different by 180 degrees, the reverse current of the current from the inverter to the capacitor will occur, and the effect of reducing the ripple current of the capacitor will be weakened. . Depending on the situation, the total capacitor ripple current may also increase compared to the case where the same triangular wave is used. In order to suppress this, it is necessary to make the phases of the PWM signals of the two phases being switched different in the rotation angle section in which the reverse current of the current from the inverter to the capacitor does not occur, and to switch the same PWM signal in the rotation angle section in which the reverse flow occurs. phase. However, in the inverter device described in Patent Document 1, when the phase of the PWM signal is switched while the switched phase is held on or off, there is a possibility that a long period of time may occur immediately after the phase of the PWM signal is switched. On (or off) duration.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a motor drive circuit and a motor module that can perform switching of PWM phases while suppressing a long ON (or OFF) duration immediately after switching. [Means of Solving Problems]

The exemplary motor drive circuit of the present invention controls the drive of a three-phase motor in a two-phase modulation manner. The motor drive circuit includes a first input terminal, a second input terminal, a capacitor, three series bodies and a signal generating part. A first voltage is applied to the first input terminal. A second voltage lower than the first voltage is applied to the second input terminal. The capacitor is connected between the first input terminal and the second input terminal. The three series bodies connect two semiconductor switching elements in series. The signal generating unit generates a PWM signal to be input to each of the three series bodies. The PWM signal includes a positive-phase PWM signal and a negative-phase PWM signal. The phase of the inverting PWM signal is different from the phase of the non-inverting PWM signal. The signal generating unit switches the phase of the PWM signal at a phase switching timing. The PWM signal further has a connected pulse group between the positive-phase PWM signal and the negative-phase PWM signal and before and after the phase switching timing. The connected pulse wave group has connected on pulse waves and connected off pulse waves. The connected on pulse waves have a connected on period. The disconnection pulse wave has a disconnection period. The phase-on period is shorter than the on-period of one cycle of the PWM period before or after the phase switching.

An exemplary motor module of the present invention includes the motor drive circuit described above, and a three-phase motor. The three-phase motor is driven by the motor drive circuit. [Effect of invention]

According to the exemplary invention, the switching of the PWM phase can be performed while suppressing the generation of a long on (or off) duration immediately after the phase of the PWM signal is switched.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same reference numerals are attached to the same or corresponding parts in the drawings, and the description will not be repeated.

A motor according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2 . FIG. 1 is a block diagram of a motor module 200 according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing the inverter unit 110 .

As shown in FIG. 1 , the motor module 200 includes a motor driving circuit 100 and a three-phase motor M. The three-phase motor M is driven by the motor drive circuit 100 . The three-phase motor M is, for example, a brushless DC (Direct Current, DC) motor. The three-phase motor M has a U-phase, a V-phase, and a W-phase.

The motor driving circuit 100 controls the driving of the three-phase motor M in a two-phase modulation manner. The motor driving circuit 100 includes an inverter unit 110 and a signal generating unit 120 .

The motor drive circuit 100 includes three output terminals 102 . The three output terminals 102 include an output terminal 102u, an output terminal 102v, and an output terminal 102w. The three output terminals 102 output three-phase output voltages and three-phase output currents to the three-phase motor M. Specifically, the output terminal 102u outputs the U-phase output voltage Vu and the U-phase output current Iu to the three-phase motor M. The output terminal 102v outputs the V-phase output voltage Vv and the V-phase output current Iv to the three-phase motor M. The output terminal 102w outputs the W-phase output voltage Vw and the W-phase output current Iw to the three-phase motor M.

As shown in FIG. 2 , the motor driving circuit 100 includes a first input terminal P, a second input terminal N, a capacitor C, and three series bodies 112 . More specifically, in the present embodiment, the motor drive circuit 100 includes an inverter unit 110 , and the inverter unit 110 includes a first input terminal P, a second input terminal N, a capacitor C, and three series bodies 112 . The inverter unit 110 further includes a DC voltage source B. Furthermore, the DC voltage source B may be located outside the inverter unit 110 .

The first voltage V1 is applied to the first input terminal P. As shown in FIG. The first input terminal P is connected to the DC voltage source B.

The second voltage V2 is applied to the second input terminal N. The second input terminal N is connected to the DC voltage source B. The second voltage V2 is lower than the first voltage V1.

The capacitor C is connected between the first input terminal P and the second input terminal N.

Regarding the three series bodies 112, two semiconductor switching elements are connected in series. The semiconductor switching element is, for example, an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT). Furthermore, the semiconductor switching element can also be other transistors such as field effect transistors. The three serial bodies 112 include a serial body 112u, a serial body 112v, and a serial body 112w. The three series bodies 112 are connected in parallel with each other. One end of each of the three series bodies 112 is connected to the first input terminal P. As shown in FIG. The other end of each of the three series bodies 112 is connected to the second input terminal N. As shown in FIG. These semiconductor switching elements are connected in parallel with the first input terminal P side (upper side in the drawing) as the cathode and the second input terminal N side (lower side in the drawing) as the anode, respectively. When a field effect transistor is used as the semiconductor switching element, a parasitic diode can also be used as the rectifying element.

The three series bodies 112 each have a first semiconductor switching element and a second semiconductor switching element. Specifically, the series body 112u includes a first semiconductor switching element Up and a second semiconductor switching element Un. The series body 112v has a first semiconductor switching element Vp and a second semiconductor switching element Vn. The series body 112w has a first semiconductor switching element Wp and a second semiconductor switching element Wn.

The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are connected to the first input terminal P. As shown in FIG. In other words, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are semiconductor switching elements on the high voltage side.

The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are connected to the second input terminal N. In other words, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are semiconductor switching elements on the low voltage side.

The first semiconductor switching element and the second semiconductor switching element are connected at the connection point 114 . Specifically, the first semiconductor switching element Up and the second semiconductor switching element Un are connected at the connection point 114u. The first semiconductor switching element Vp and the second semiconductor switching element Vn are connected at the connection point 114v. The first semiconductor switching element Wp and the second semiconductor switching element Wn are connected at the connection point 114w.

The respective connection points 114 of the three series bodies 112 are connected to the three output terminals 102 . Specifically, the connection point 114u of the series body 112u is connected to the output terminal 102u. The connection point 114v of the series body 112v is connected to the output terminal 102v. The connection point 114w of the series body 112w is connected to the output terminal 102w.

A PWM signal is input to the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp. The PWM signal is output from the signal generating unit 120 . Hereinafter, in this specification, the PWM signal input to the first semiconductor switching element Up may be described as "UpPWM signal". In addition, the PWM signal input to the first semiconductor switching element Vp may be described as "VpPWM signal". The PWM signal input to the first semiconductor switching element Wp is sometimes described as "WpPWM signal". The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are switched on and off at a predetermined PWM cycle. For example, the first semiconductor switching element Up, the first semiconductor switching element Vp and the first semiconductor switching element Wp are respectively turned on when the UpPWM signal, the VpPWM signal and the WpPWM signal are at a high level. On the other hand, the first semiconductor switching element Up, the first semiconductor switching element Vp and the first semiconductor switching element Wp are respectively turned off when the UpPWM signal, the VpPWM signal and the WpPWM signal are at a low level.

A PWM signal is input to the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn. The PWM signal is output from the signal generating unit 120 . Hereinafter, in this specification, the PWM signal input to the second semiconductor switching element Un may be described as "UnPWM signal". In addition, the PWM signal input to the second semiconductor switching element Vn may be described as "VnPWM signal". The PWM signal input to the second semiconductor switching element Wn is sometimes described as "WnPWM signal". The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are switched on and off at a predetermined PWM cycle. For example, the second semiconductor switching element Un, the second semiconductor switching element Vn and the second semiconductor switching element Wn are respectively turned on when the UnPWM signal, the VnPWM signal and the WnPWM signal are at HIGH level. On the other hand, the second semiconductor switching element Un, the second semiconductor switching element Vn and the second semiconductor switching element Wn are respectively turned off when the UnPWM signal, the VnPWM signal and the WnPWM signal are at a low level.

As shown in FIG. 1 , the signal generating unit 120 includes a carrier generating unit 122 , a voltage command value generating unit 124 , and a comparing unit 126 . The signal generating unit 120 is a hardware circuit, including a processor like a central processing unit (CPU), an application specific integrated circuit (ASIC), and the like. Furthermore, the processor of the signal generation unit 120 functions as the carrier generation unit 122 , the voltage command value generation unit 124 , and the comparison unit 126 by executing the computer program stored in the memory device.

The signal generation unit 120 controls the inverter unit 110 . Specifically, the signal generating unit 120 controls the inverter unit 110 by generating a PWM signal and outputting the PWM signal. More specifically, the signal generating unit 120 generates a PWM signal to be input to each of the three series bodies 112 .

The carrier generation unit 122 generates a carrier signal. The carrier signal is, for example, a triangular wave. Furthermore, the carrier signal can also be a sawtooth wave.

The voltage command value generating unit 124 generates a voltage command value. The voltage command value corresponds to the voltage value output from the motor drive circuit 100 . That is, the voltage command value generation unit 124 generates voltage values corresponding to the output voltage Vu, the output voltage Vv, and the output voltage Vw as the voltage command value.

The comparison unit 126 generates a PWM signal by comparing the carrier signal with the voltage command value.

The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1 to 3 . FIG. 3 is a diagram showing a PWM signal according to the embodiment of the present invention. In FIG. 3 , the PWM signal of one phase among the three-phase PWM signals is shown. In FIG. 3 , the non-inverting PWM period PT is a period in which the non-inverting PWM signal PS is output. In addition, the inversion PWM period NT is a period in which the inversion PWM signal NS is output. In addition, the continuous pulse wave group period AT is a period during which the continuous pulse wave group AS is output. Regarding the current waveform, the effect of the switching of the other phases on the current ripple is ignored, and only the switching ripple component caused by the switching of the phase is extracted and illustrated.

As shown in FIG. 3 , the PWM signal includes a positive-phase PWM signal PS and a negative-phase PWM signal NS. The phase of the inverted PWM signal NS is different from that of the non-inverted PWM signal PS. In this embodiment, the phase of the inversion PWM signal NS and the non-inverting PWM signal PS are shifted by 180 degrees.

The signal generating unit 120 generates a PWM signal by comparing the carrier signal CAS with the voltage command value V. The signal generating unit 120 switches the phase of the PWM signal at the phase switching timing tsw. Here, the signal generating unit 120 switches the phase of the PWM signal from the positive phase to the reverse phase at the phase switching timing tsw. That is, before the phase switching timing tsw, the phase of the PWM signal is positive. On the other hand, after the phase switching timing tsw, the phase of the PWM signal is inverted. In this embodiment, the phase switching timing tsw is the timing of the peak of the carrier signal CAS. In this embodiment, the carrier signal CAS is a triangular wave.

The signal generation unit 120 changes the voltage command value V at the phase switching timing tsw. Here, the signal generation unit 120 changes the voltage command value from V to 1-V. The comparison unit 126 compares the voltage command value with the carrier signal CAS to generate a PWM signal. Specifically, when the phase of the PWM signal is positive, when the carrier signal CAS is greater than or equal to the voltage command value, the PWM signal is turned off. On the other hand, the comparison part 126 compares the voltage command value with the carrier signal CAS, and turns on the PWM signal when the carrier signal CAS is smaller than the voltage command value. On the other hand, when the phase of the PWM signal is reversed, when the carrier signal CAS is greater than or equal to the voltage command value, the PWM signal is turned on. On the other hand, the comparing part 126 compares the voltage command value with the carrier signal CAS, and when the carrier signal CAS is smaller than the voltage command value, turns off the PWM signal. In this way, the signal generation unit 120 changes the phase of the PWM signal by changing the voltage command value and the method of the determination processing of the comparison unit 126 .

The PWM signal further has a connected pulse group AS between the positive-phase PWM signal PS and the negative-phase PWM signal NS and before and after the phase switching timing tsw. The connected pulse group AS has a connected on-pulse ASon and a connected off-pulse ASoff. The continuous-on pulse wave ASon has a continuous-on period ATon. The disconnection pulse wave ASoff has a disconnection period AToff. The connected pulse wave group AS is located within a time range of one PWM period before and after the phase switching timing tsw.

The continuous on-period ATon is shorter than the on-period of one cycle of the PWM period before or after the phase switching. In the present embodiment, the continuous on-period ATon is shorter than the on-period Ton of one cycle of the PWM cycle before the phase switching. Specifically, the phase-on period ATon is the length of 1/2 of the on-period Ton of one cycle of the PWM cycle before the phase switching. That is, ATon=Ton/2.

The PWM signal has a connected pulse group AS between the positive-phase PWM signal PS and the negative-phase PWM signal NS and before and after the phase switching timing tsw. Therefore, for one of the phases in the PWM control, the switching of the PWM phase can be performed while suppressing a long on (or off) duration immediately after the phase of the PWM signal is switched. As a result, it is possible to suppress the torque fluctuation or noise caused by the unexpected increase or decrease of the phase current immediately after the phase of the PWM signal is switched, and to reduce the ripple current of the capacitor.

In addition, the continuous pulse wave group AS is located within a time range within one PWM cycle before and after the phase switching timing tsw. Therefore, the switching of the PWM phase can be performed while suppressing the generation of a long ON (or OFF) duration immediately after the phase switching of the PWM signal which is likely to generate a long ON (or OFF) duration. As a result, it is possible to suppress a torque ripple or noise due to an unexpected increase or decrease of the phase current, and to reduce the capacitor ripple current.

In addition, the connection off period AToff is shorter than the off period of one cycle of the PWM cycle before or after the phase switching. Therefore, it is possible to suppress the occurrence of an unexpected increase or decrease of the phase current, which may cause torque ripple or noise, and to reduce the capacitor ripple current. In the present embodiment, the connection off period AToff is shorter than the off period Toff of one cycle of the PWM cycle before the phase switching. Specifically, the connection-off period AToff is the length of 1/2 of the off-period Toff of one cycle of the PWM cycle before the phase switching. That is, AToff=Toff/2.

In addition, the ratio of the connection-on period ATon to the connection-off period AToff is the same as the ratio of the ON period Ton to the OFF period Toff in one cycle of the PWM cycle before or after the phase switching. Therefore, like the current waveform shown in FIG. 3 , the fluctuation of the average current before and after the phase switching can be suppressed, and the torque fluctuation and noise of the motor can be further suppressed. Furthermore, the ratio of the ON period ATon to the OFF period AToff may be slightly different from the ratio of the ON period Ton to the OFF period Toff in one cycle of the PWM cycle before or after the phase switching.

In addition, the connection-off period AToff precedes the connection-on period ATon, and the ratio of the off period to the period of the connected pulse group AS is the same as the ratio of the off period to the PWM period before the phase switching. In addition, the ratio of the on-period to the period of the connected pulse group AS is the same as the ratio of the on-period after the phase switching to the PWM period. Therefore, like the current waveform shown in FIG. 3 , the current value at the end of the continuous pulse wave group AS period almost matches the current wave peak value before the phase switching. Therefore, the fluctuation of the average current before and after the phase switching can be suppressed, and the torque fluctuation and noise of the motor can be further suppressed. Furthermore, the ratio of the off period to the period of the connected pulse group AS may be slightly different from the ratio of the off period before the phase switching to the PWM period. In addition, the ratio of the on-period to the period of the connected pulse group AS may be slightly different from the ratio of the on-period after the phase switching to the PWM period.

In addition, the cycle of the continuous pulse wave group AS is 1/2 of the PWM cycle before the phase switching or after the phase switching. That is, AT=T/2. Therefore, the fluctuation of the average current before and after the phase switching can be suppressed, and the torque fluctuation and noise of the motor can be further suppressed.

Furthermore, the connected on-pulse waves ASon may also have a plurality of pulse waves. The capacitor ripple current can be reduced even when there are multiple pulses connected to the on-pulse ASON.

Furthermore, the connected and disconnected pulse waves ASoff may have a plurality of pulse waves. The capacitor ripple current can be reduced even when the connected off pulse ASoff has multiple pulses.

According to the above configuration, even if the switching between the normal-phase PWM and the reverse-phase PWM is performed for the switching phase, the fluctuation of the average current can be suppressed, and the torque ripple and noise of the motor can be suppressed. Therefore, it is possible to perform an operation of applying reverse-phase PWM in the rotation angle section in which the capacitor ripple current can be more suppressed when reverse-phase PWM is applied to one of the two phases being switched, and if applicable Inverse-phase PWM produces a reverse current to the capacitor instead and degrades the capacitor ripple current. In the rotation angle range where the capacitor ripple current is degraded, the application of normal-phase PWM, etc., effectively suppresses the capacitor ripple current and suppresses the capacitor heat generation, and realizes the miniaturization and low power consumption of the capacitor. cost. At the same time, torque ripple and noise of the motor accompanying the switching of the normal-phase PWM and the reverse-phase PWM can be suppressed. In the two-phase modulation method, for example, in the case of switching the modulation method in which the non-switching phase is fixed to the ON period and the OFF period in units of an electrical rotation angle of 60 degrees, the current waveforms may be opposite to each other. The voltage waveform is delayed, resulting in a rotation angle section in which the capacitor ripple current is degraded if the inversion PWM is applied. Therefore, by using this embodiment to switch the PWM phase of the phase being switched so that the PWM phases of the two phases to be switched become the same phase only in such a rotation angle section, the torque ripple of the motor can be suppressed. or noise and suppress capacitor ripple current. In addition, in the two-phase modulation method, when the non-switching phase is fixed only in the on mode or only in the off mode, the rotation angle at which the capacitor ripple current is reduced if the inverse PWM is applied The interval and the rotation angle interval in which the capacitor ripple current is degraded by applying the reverse-phase PWM are repeated in units of an electrical rotation angle of 60 degrees. Therefore, the present embodiment is used to switch the switching phase so that the PWM phases of the two phases switched in the former rotation angle interval are different, and the PWM phases of the two phases switched in the latter rotation angle interval become the same phase. The PWM phase of the phase can be suppressed, thereby suppressing the torque fluctuation or noise of the motor and suppressing the ripple current of the capacitor. The switching timing of the non-inverting PWM and the inverting PWM may be based on the zero-crossing point of the motor current.

Next, with reference to FIGS. 1 , 2 and 4 , the switching of the PWM signal from the reverse phase to the normal phase according to the embodiment of the present invention will be described. FIG. 4 is a diagram showing a PWM signal according to the embodiment of the present invention.

As shown in FIG. 4 , the signal generating unit 120 switches the phase of the PWM signal from the reverse phase to the normal phase at the phase switching timing tsw.

Similar to the PWM signal shown in FIG. 3 , the PWM signal has a connected pulse group AS between the positive-phase PWM signal PS and the negative-phase PWM signal NS and before and after the phase switching timing tsw. Therefore, the switching of the PWM phase can be performed while suppressing the generation of a long ON (or OFF) duration immediately after the phase switching of the PWM signal which is likely to generate a long ON (or OFF) duration. As a result, generation of torque ripple and noise can be suppressed, and capacitor ripple current can be reduced.

The continuous on-period ATon is the length of 1/2 of the on-period Ton of one cycle of the PWM cycle before the phase switching. That is, ATon=Ton/2.

The connection-off period AToff is the length of 1/2 of the off-period Toff of one cycle of the PWM cycle before the phase switching. That is, AToff=Toff/2.

In addition, the connection-on period ATon precedes the connection-off period AToff, and the ratio of the on-period to the period of the connected pulse group AS is the same as the ratio of the on-period to the PWM period before the phase switching. In addition, the ratio of the off period to the period of the connected pulse group AS is the same as the ratio of the off period after the phase switching to the PWM cycle. Therefore, like the current waveform shown in FIG. 4 , the fluctuation of the average current before and after the phase switching can be suppressed, and the torque fluctuation and noise of the motor can be further suppressed. Furthermore, the ratio of the on period to the period of the connected pulse group AS may be slightly different from the ratio of the on period before the phase switching to the PWM period. In addition, the ratio of the off period to the period of the connected pulse group AS may be slightly different from the ratio of the off period after the phase switching to the PWM period.

Like the current waveform shown in FIG. 4 , when the phase is switched from the reverse phase to the normal phase, the fluctuation of the average current before and after the phase switching can be suppressed, and the torque fluctuation and noise of the motor can be further suppressed.

3 and 4, the phase switching timing tsw is the timing of the peak of the carrier signal CAS, but the phase switching timing tsw may be shifted from the timing of the peak of the carrier signal CAS.

1, 2 and 5, the PWM signal according to the embodiment of the present invention will be described. FIG. 5 is a diagram showing a PWM signal according to the embodiment of the present invention.

As shown in FIG. 5 , in addition to the positive-phase PWM signal PS, the negative-phase PWM signal NS and the connected pulse group AS, the PWM signal also has a front pulse group BS and a back pulse group CS. The previous pulse wave group BS is located before the connected pulse wave group AS. The post pulse wave group CS is located after the connected pulse wave group AS.

The previous pulse wave group BS has a previous on-pulse wave BSon and a previous off-pulse wave BSoff. The pre-on pulse wave BSon has a pre-on period BTon. The previous off pulse wave BSoff has a previous off period BToff. The period of the previous pulse wave group BS is the same as that of the PWM signal that is earlier than it, that is, the same as the normal-phase PWM signal PS in this embodiment.

The post-pulse group CS has post-on pulse waves CSon and post-off pulse waves CSoff. The post-on pulse wave CSon has a post-on period CTon. The post-off pulse wave CSoff has a post-off period CToff. The period of the latter pulse wave group CS is the same as that of the PWM signal further back, that is, the same as the inverted PWM signal NS in this embodiment.

The phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS.

The signal generating unit 120 adjusts the pulse lengths of at least two of the consecutive pulse wave group AS, the former pulse wave group BS, and the latter pulse wave group CS. In this embodiment, the signal generating unit 120 adjusts the pulse lengths of the consecutive pulse wave group AS and the subsequent pulse wave group CS.

In this embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of turn on accompanying the switching is delayed by the time t. Therefore, the signal generating unit 120 adjusts the on-connection period ATon and the post-on period CTon so as to compensate for the delay time t. More specifically, the signal generation unit 120 increases the voltage command value from 1-V in such a manner that the successive on-period ATon and the post-on period CTon are respectively extended by t/2 compared with the case where the voltage command value is set to 1-V. The value of the V offset is set as the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to time t/2 in terms of pulse wavelength.

At this time, the disconnection period AToff becomes Toff/2+t because the ON timing associated with the switching is delayed by the time t. That is, AToff=Toff/2+t.

In addition, the turn-on delay time t of ATon during the continuous ON period, and the turn-off (turn off) due to the deviation of the voltage command value is also delayed by t/2, so it becomes Ton/2−t/2. That is, ATon=Ton/2−t/2.

In addition, the post-off period CToff is shortened by the time t due to the offset of the voltage command value, and becomes Toff-t. That is, CToff=Toff-t.

In addition, the post-on period CTon is delayed by t/2 due to the deviation of the voltage command value, and becomes Ton+t/2. That is, CTon=Ton+t/2.

The signal generating unit 120 adjusts at least two of the following on-period ATon, the previous on-period BTon, and the subsequent on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the continuous-on period ATon and the post-on period CTon. The sum of the adjustment value of ATon during the continuous on-period, the adjustment value of the previous on-period BTon, and the adjusted value of the subsequent on-period CTon is 0. In the present embodiment, when the adjustment value of the successive on-period ATon is t1a, the adjustment value of the previous on-period BTon is t1b, and the adjustment value of the subsequent on-period CTon is t1c, t1a=- t/2, t1b=0, t1c=t/2. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the connection off period AToff, the previous off period BToff, and the subsequent off period CToff. In the present embodiment, the signal generating unit 120 adjusts the connection-off period AToff and the post-off period CToff. The sum of the adjustment value of AToff during the disconnection period, the adjustment value of BToff in the preceding disconnection period, and the adjustment value of CToff in the succeeding disconnection period is 0. When the adjustment value of the connection-off period AToff is t2a, the adjustment value of the previous OFF period BToff is t2b, and the adjustment value of the subsequent OFF period CToff is t2c, t2a=t, t2b=0, t2c=-t. Therefore, t2a+t2b+t2c=0.

As described with reference to FIGS. 1 , 2 and 5 , the signal generating unit 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave group AS, the former pulse wave group BS, and the latter pulse wave group CS. Furthermore, compared with the PWM signal shown in FIG. 3, the total time of each of the ON time and the ON time does not change. Therefore, the variation of the average current accompanying the switching operation can be suppressed. Furthermore, in the example shown in FIG. 3 , at the instant of the phase switching timing tsw, the current amplitude becomes ΔI/2, and the current waveform temporarily shifts to the high side during the continuous pulse group AS period. However, in the example shown in FIG. 5 , the current The deviation of the waveform is suppressed. Therefore, the fluctuation of the average current accompanying the switching operation can be further suppressed. As the value of t, for example, by setting it to 2% to 10% of the period of the carrier signal CAS, the fluctuation of the average current can be effectively suppressed.

Next, with reference to FIG. 1 , FIG. 2 and FIG. 6 , the switching of the PWM signal from the reverse phase to the normal phase according to the embodiment of the present invention will be described. FIG. 6 is a diagram showing a PWM signal according to the embodiment of the present invention.

As shown in FIG. 6 , the signal generating unit 120 switches the phase of the PWM signal from the reverse phase to the normal phase at the phase switching timing tsw. As in the embodiment shown in FIG. 5 , the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS.

In this embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of the turn-off accompanying the switching is delayed by the time t. Therefore, the signal generating unit 120 adjusts the disconnection period AToff and the subsequent disconnection period CToff to compensate for the delay time t. More specifically, the signal generation unit 120 shifts the voltage command value from V by t/2 in the connection-off period AToff and the post-off period CToff, respectively, compared to the case where the voltage command value is set to V by t/2. The value is set to the voltage command value.

At this time, the connection-on period ATon becomes Ton/2+t due to the delay time t from the timing of the off-time accompanying the switching. That is, ATon=Ton/2+t.

In addition, the turn-off delay time t in the connection-off period AToff is delayed by t/2, and the turn-on is also delayed by t/2 due to the deviation of the voltage command value, so it becomes Toff/2−t/2. That is, AToff=Toff/2−t/2.

In addition, the post-on period CTon is shortened by the time t due to the deviation of the voltage command value, and becomes Ton−t. That is, CTon=Ton-t.

In addition, the post-off period CToff is delayed by t/2 due to the deviation of the voltage command value, and becomes Toff+t/2. That is, CToff=Toff+t/2.

The signal generating unit 120 adjusts at least two of the following on-period ATon, the previous on-period BTon, and the subsequent on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the continuous-on period ATon and the post-on period CTon. The sum of the adjustment value of ATon during the continuous on-period, the adjustment value of the previous on-period BTon, and the adjusted value of the subsequent on-period CTon is 0. In the present embodiment, when the adjustment value of the successive on-period ATon is t1a, the adjustment value of the previous on-period BTon is t1b, and the adjustment value of the subsequent on-period CTon is t1c, t1a=t , t1b=0, t1c=-t. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the connection off period AToff, the previous off period BToff, and the subsequent off period CToff. In the present embodiment, the signal generating unit 120 adjusts the connection-off period AToff and the post-off period CToff. The sum of the adjustment value of AToff during the disconnection period, the adjustment value of BToff in the preceding disconnection period, and the adjustment value of CToff in the succeeding disconnection period is 0. When the adjustment value of the connection off period AToff is t2a, the adjustment value of the previous off period BToff is t2b, and the adjustment value of the subsequent off period CToff is t2c, t2a=-t/2, t2b =0, t2c=t/2. Therefore, t2a+t2b+t2c=0.

As described with reference to FIGS. 1 , 2 and 6 , the signal generating unit 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave group AS, the former pulse wave group BS, and the latter pulse wave group CS. Furthermore, compared with the PWM signal shown in FIG. 4, the total time of each of the ON time and the ON time does not change. Therefore, the variation of the average current accompanying the switching operation can be suppressed. Furthermore, in the example shown in FIG. 4 , at the instant of the phase switching timing tsw, the current amplitude becomes ΔI/2, and the current waveform temporarily shifts to the low side during the continuous pulse group AS period. However, in the example shown in FIG. 6 , the current The deviation of the waveform is suppressed. Therefore, the fluctuation of the average current accompanying the switching operation can be further suppressed. As the value of t, for example, by setting it to 2% to 10% of the period of the carrier signal CAS, the fluctuation of the average current can be effectively suppressed.

Furthermore, in the example described with reference to FIG. 5 , the signal generating unit 120 shifts the voltage command value by converting the pulse wavelength to a value corresponding to time t/2, but the voltage command value may be converted by converting the pulse wavelength to A value shift corresponding to time t.

1, FIG. 2 and FIG. 7, the PWM signal according to the embodiment of the present invention will be described. FIG. 7 is a diagram showing a PWM signal according to the embodiment of the present invention.

In this embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of turning on accompanying the switching is delayed by the time t. Therefore, the signal generating unit 120 adjusts the on-connection period ATon and the post-on period CTon so as to compensate for the delay time t. More specifically, the signal generation unit 120 biases the voltage command value from 1-V so that the on-phase ON period ATon and the post-ON period CTon are respectively extended by t compared with the case where the voltage command value is set to 1-V. The shifted value is set as the voltage command value. That is, the signal generating unit 120 shifts the voltage command value by a value corresponding to the time t in conversion of the pulse wavelength.

At this time, the disconnection period AToff becomes Toff/2+t due to the delay time t from the ON timing of the switching. That is, AToff=Toff/2+t.

In addition, the turn-on of ATon is delayed by time t during the ON period, and the turn-off of ATon is delayed by t due to the deviation of the voltage command value, so it becomes Ton/2. That is, ATon=Ton/2.

In addition, the post-off period CToff is shortened by the time t due to the deviation of the voltage command value, and becomes Toff-t. That is, CToff=Toff-t.

In addition, CTon becomes Ton in the post-on period. That is, CTon=Ton.

In the present embodiment, the signal generation unit 120 does not adjust the successive on-period ATon, the previous on-period BTon, and the subsequent on-period CTon.

The signal generating unit 120 adjusts at least two of the connection off period AToff, the previous off period BToff, and the subsequent off period CToff. In the present embodiment, the signal generating unit 120 adjusts the connection-off period AToff and the post-off period CToff. The sum of the adjustment value of AToff during the disconnection period, the adjustment value of BToff in the preceding disconnection period, and the adjustment value of CToff in the succeeding disconnection period is 0. When the adjustment value of the connection-off period AToff is t2a, the adjustment value of the previous OFF period BToff is t2b, and the adjustment value of the subsequent OFF period CToff is t2c, t2a=t, t2b=0, t2c=-t. Therefore, t2a+t2b+t2c=0.

As described with reference to FIGS. 1 , 2 and 7 , the signal generating unit 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave group AS, the former pulse wave group BS, and the latter pulse wave group CS. Furthermore, compared with the PWM signal shown in FIG. 4, the total time of each of the ON time and the ON time does not change. Therefore, the variation of the average current accompanying the switching operation can be suppressed. Furthermore, in this example, as the value of t, for example, by setting 5% to 20% of the period of the carrier signal CAS, the fluctuation of the average current can be effectively suppressed.

Furthermore, in the examples described with reference to FIGS. 5 to 7 , the signal generating unit 120 adjusts the on-connection period ATon and the post-on period CTon in a manner of compensating for the delay time t, but the signal generating unit 120 may also compensate for the delay time. t way to adjust the front turn-on period BTon.

1, 2 and 8, the PWM signal according to the embodiment of the present invention will be described. FIG. 8 is a diagram showing a PWM signal according to the embodiment of the present invention.

In this embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of turning on accompanying the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the pre-on period BTon so as to compensate for the delay time t in advance. More specifically, the signal generation unit 120 makes the voltage command value a value shifted from V to the voltage command value by extending the previous ON period BTon by t compared to the case where the voltage command value is set to V. More specifically, the signal generating unit 120 makes the voltage command value offset from V by t/2 in advance of the turn-on time of the previously turned-on pulse wave BSON and delay of the turn-off time of the previous turn-on pulse wave Bson by t/2. The value of is set as the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to time t/2 in terms of pulse wavelength.

At this time, the pre-off period BToff is shortened by the time t/2 due to the deviation of the voltage command value, and becomes Toff-t/2. That is, BToff=Toff-t/2.

In addition, the pre-on period BTon is turned on by an early time t/2 and off by a delay time t/2 due to a shift in the voltage command value, and thus becomes Ton+t. That is, BTon=Ton+t.

In addition, the connection-off period AToff is Toff/2+t/2 because of the off-delay time t/2, and the time-on-time of the switch-on is delayed by the time t. That is, AToff=Toff/2+t/2.

In addition, the continuous ON period ATon becomes Ton/2−t due to the ON delay time t. That is, ATon=Ton/2-t.

The signal generating unit 120 adjusts at least two of the following on-period ATon, the previous on-period BTon, and the subsequent on-period CTon. In the present embodiment, the signal generating unit 120 adjusts the successive on-period ATon and the previous on-period BTon. The sum of the adjustment value of ATon during the continuous on-period, the adjustment value of the previous on-period BTon, and the adjusted value of the subsequent on-period CTon is 0. In the present embodiment, when the adjustment value of the successive on-period ATon is t1a, the adjustment value of the previous on-period BTon is t1b, and the adjustment value of the subsequent on-period CTon is t1c, t1a=- t, t1b=t, t1c=0. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the connection off period AToff, the previous off period BToff, and the subsequent off period CToff. In the present embodiment, the signal generating unit 120 adjusts the continuous disconnection period AToff and the previous disconnection period BToff. The sum of the adjustment value of AToff during the disconnection period, the adjustment value of BToff in the preceding disconnection period, and the adjustment value of CToff in the succeeding disconnection period is 0. When the adjustment value of the connection-off period AToff is t2a, the adjustment value of the preceding OFF period BToff is t2b, and the adjustment value of the subsequent OFF period CToff is t2c, t2a=t/2, t2b= -t/2, t2c=0. Therefore, t2a+t2b+t2c=0.

As described with reference to FIGS. 1 , 2 and 8 , the signal generating unit 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave group AS, the former pulse wave group BS, and the latter pulse wave group CS. Furthermore, compared with the PWM signal shown in FIG. 4, the total time of each of the ON time and the ON time does not change. Therefore, the variation of the average current accompanying the switching operation can be suppressed.

5 to 8, the phase switching timing tsw is delayed from the timing of the peak of the carrier signal CAS, but the phase switching timing tsw may be earlier than the timing of the peak of the carrier signal CAS.

1, 2 and 9, the PWM signal according to the embodiment of the present invention will be described. FIG. 9 is a diagram showing a PWM signal according to the embodiment of the present invention.

In this embodiment, the phase switching timing tsw is advanced by the time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of the turn-on accompanying the switching is advanced by the time t. Therefore, the signal generation unit 120 adjusts the pre-on period BTon so as to adjust the advance time t. More specifically, the signal generation unit 120 makes the voltage command value a value shifted from V to the voltage command value by shortening t in the previous ON period BTon compared to the case where the voltage command value is set to V. In more detail, the signal generating section 120 delays the on-time of the previously-on pulse wave BSON by t/2, and advances the off-time of the previous-on pulse wave BSON by t/2, so that the voltage command value is shifted from V The value of is set as the voltage command value. That is, the signal generating unit 120 shifts the voltage command value by a value equivalent to time t/2 when converted into a pulse wavelength.

At this time, the pre-off period BToff becomes Toff+t/2 due to the off delay time t/2. That is, BToff=Toff+t/2.

In addition, the pre-on period BTon is turned on by a delay time t/2 and is turned off early by a time t/2 due to a shift in the voltage command value, and thus becomes Ton−t. That is, BTon=Ton-t.

In addition, the connection-off period AToff is Toff/2−t/2 because the turn-off time t/2 is advanced, and the turn-on time accompanying the switching is advanced by the time t. That is, AToff=Toff/2−t/2.

In addition, the continuous-on period ATon becomes Ton/2+t due to the turn-on advance time t. That is, ATon=Ton/2+t.

The signal generating unit 120 adjusts at least two of the following on-period ATon, the previous on-period BTon, and the subsequent on-period CTon. In the present embodiment, the signal generating unit 120 adjusts the successive on-period ATon and the previous on-period BTon. The sum of the adjustment value of ATon during the continuous on-period, the adjustment value of the previous on-period BTon, and the adjusted value of the subsequent on-period CTon is 0. In the present embodiment, when the adjustment value of the successive on-period ATon is t1a, the adjustment value of the previous on-period BTon is t1b, and the adjustment value of the subsequent on-period CTon is t1c, t1a=t , t1b=-t, t1c=0. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the connection off period AToff, the previous off period BToff, and the subsequent off period CToff. In the present embodiment, the signal generating unit 120 adjusts the continuous disconnection period AToff and the previous disconnection period BToff. The sum of the adjustment value of AToff during the disconnection period, the adjustment value of BToff in the preceding disconnection period, and the adjustment value of CToff in the succeeding disconnection period is 0. When the adjustment value of the connection off period AToff is t2a, the adjustment value of the previous off period BToff is t2b, and the adjustment value of the subsequent off period CToff is t2c, t2a=-t/2, t2b =t/2, t2c=0. Therefore, t2a+t2b+t2c=0.

As described with reference to FIGS. 1 , 2 and 9 , the signal generating unit 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave group AS, the former pulse wave group BS, and the latter pulse wave group CS. Furthermore, compared with the PWM signal shown in FIG. 4, the total time of each of the ON time and the ON time does not change. Therefore, the variation of the average current accompanying the switching operation can be suppressed.

Furthermore, in the examples described with reference to FIGS. 3 to 9 , the carrier signal CAS is a triangular wave, but the carrier signal CAS may also be a sawtooth.

1, 2 and 10, the PWM signal according to the embodiment of the present invention will be described. FIG. 10 is a diagram showing a PWM signal according to the embodiment of the present invention.

As shown in FIG. 10, in this embodiment, the carrier signal CAS is a sawtooth wave. Here, the signal generating unit 120 switches the phase of the PWM signal from the positive phase to the reverse phase at the phase switching timing tsw.

The PWM signal includes a positive-phase PWM signal PS, a negative-phase PWM signal NS, a connected pulse wave group AS, a pre-pulse wave group BS, and a post-pulse wave group CS.

In order to suppress the fluctuation of the average current accompanying the switching operation of the phase of the PWM signal, it is preferable to make the current Ia when the preceding on-pulse wave BSON is turned on and the current Ib when the subsequent on-pulse wave CSon is turned on to match as much as possible. That is, it is preferable to set the continuous on period ATon so that the current decreases by ΔI during the period of time 2Toff from the turning off of the preceding on pulse wave BSon to the turning on of the subsequent on pulse wave CSon.

The current increases by ΔI when it is turned on for time Ton, and decreases by ΔI when it is turned off for time Toff. Therefore, ATon is preferably set to ATon=Toff×Ton/T as T=Ton+Toff.

In the case where ATon=Toff×Ton/T is set, the off period from the pulse wave BSon on the front to the pulse wave CSon on the back is 2Toff−ATon=Toff×(1+Toff/T). The current rise during the ON period is ΔI×ATon/Ton=ΔI·Toff/T. The current during the OFF period is reduced to ΔI×Toff×(1+Toff/T)/Toff=ΔI+ΔI·Toff/T. Therefore, the difference between the current increase in the ON period and the current decrease in the OFF period, that is, the current decrease from the turn-off of the preceding ON pulse wave BSON to the ON of the succeeding ON pulse wave CSon becomes ΔI. Therefore, the current Ia at the time of turning on of the preceding on-pulse wave BSON can be matched with the current Ib at the time of turning on the subsequent on-pulse wave CSon. As a result, the fluctuation of the average current accompanying the switching operation of the phase of the PWM signal can be suppressed.

At the phase switching timing tsw, the signal generation unit 120 makes the voltage command value a value shifted from the voltage command value by 1-V so that the phase-on period ATon becomes Toff×Ton/T.

Next, with reference to FIGS. 1 , 2 and 11 , the switching of the PWM signal from the reverse phase to the normal phase according to the embodiment of the present invention will be described. FIG. 11 is a diagram showing a PWM signal according to the embodiment of the present invention.

As shown in FIG. 11, in this embodiment, the carrier signal CAS is a sawtooth wave. Here, the signal generating unit 120 switches the phase of the PWM signal from the reverse phase to the normal phase at the phase switching timing tsw.

The PWM signal includes a positive-phase PWM signal PS, a negative-phase PWM signal NS, a connected pulse wave group AS, a pre-pulse wave group BS, and a post-pulse wave group CS.

In the present embodiment, the continuous on-pulse wave ASon of the continuous pulse wave group AS is connected to the subsequent on-pulse wave CSon of the subsequent pulse wave group CS.

In order to suppress the fluctuation of the average current accompanying the switching operation of the phase of the PWM signal, it is preferable to make the current Ic when the preceding on-pulse BSON is turned on and the current Id when the subsequent on-pulse CSon turn on as much as possible. That is, it is preferable to set the continuous-on period ATon so that the current decreases by ΔI during the period from the turn-off of the pre-on pulse wave BSon to the turn-on of the post-on pulse wave CSon.

The current increases by ΔI when it is turned on for time Ton, and decreases by ΔI when it is turned off for time Toff. Therefore, ATon is preferably set to ATon=Ton-TonToff/T as T=Ton+Toff.

In the case where ATon=Ton−TonToff/T is set, the off period from when the pulse wave BSon is turned on before and when the pulse wave CSon is turned on after is Toff+TonToff/T. The current rise during the ON period is ΔI×ATon/Ton=ΔI−ΔI·Toff/T. The current during the OFF period is reduced to ΔI×(Toff+TonToff/T)/Toff=ΔI+ΔI·Ton/T. Therefore, the difference between the current increase in the ON period and the current decrease in the OFF period, that is, the current decrease from the turn-off of the preceding ON pulse wave BSON to the ON of the succeeding ON pulse wave CSon becomes ΔI. Therefore, the current Ic when the pre-on pulse wave BSON is turned on can be made to match the current Id when the post-on pulse wave CSon is turned on. As a result, the fluctuation of the average current accompanying the switching operation of the phase of the PWM signal can be suppressed.

At the phase switching timing tsw, the signal generating unit 120 shifts the voltage command value from V as the voltage command value so that the connection-on period ATon becomes Ton-TonToff/T.

Furthermore, in the examples described with reference to FIGS. 3 to 11 , the voltage command value is changed, but the voltage command value may be constant.

1, 2 and 12, the PWM signal according to the embodiment of the present invention will be described. FIG. 12 is a diagram showing a PWM signal according to the embodiment of the present invention.

As shown in FIG. 12, in this embodiment, the voltage command value is constant. In the present embodiment, the phase of the carrier signal CAS is changed at the phase switching timing tsw. Specifically, at the phase switching timing tsw, the carrier signal CAS is switched from the mountain portion to the valley portion. Therefore, the comparison process of the carrier signal CAS and the voltage command value of the comparing unit 126 of the signal generating unit 120 does not need to be switched between the normal phase and the reverse phase. For example, if the carrier signal is larger than the voltage command value, it is turned off, and if the carrier signal is larger than the voltage command value, it is turned on, and the normal phase and the reverse phase can be processed uniformly. Therefore, in the switching process of the phase of the PWM signal, the calculation can be simplified.

Furthermore, in the example described with reference to FIG. 12 , as in the examples described with reference to FIGS. 5 to 9 , the phase switching timing tsw may be shifted from the timing of the peak portion of the carrier signal CAS.

Furthermore, in the examples described with reference to FIGS. 3 to 9 and FIG. 12 , the carrier signal CAS is a triangular wave. In the examples described with reference to FIGS. 10 and 11 , the carrier signal CAS is a sawtooth, but the carrier signal CAS may also be a triangular wave. With the sawtooth, the triangular wave and the sawtooth are switched at the phase switching timing tsw. For example, the carrier signal CAS can also be set as a triangular wave in the case of normal phase, and the carrier signal CAS can be set as a sawtooth wave in the case of reverse phase. Alternatively, the carrier signal CAS can be set as a sawtooth wave in the case of positive phase, and the carrier signal CAS can be set as a triangular wave in the case of reverse phase.

The embodiments of the present invention have been described above with reference to the drawings ( FIGS. 1 to 12 ). However, this invention is not limited to the said embodiment, It can implement in various forms in the range which does not deviate from the summary. In the drawings, each component is mainly schematically shown for easy understanding, but the thickness, length, number, etc. of each component shown in the drawings are different from actual ones for the convenience of drawing. In addition, the material, shape, size, etc. of each component shown in the above-described embodiment are examples, and are not particularly limited, and various changes can be made within a range that does not substantially deviate from the effects of the present invention.

100: Motor drive circuit 110: Inverter unit 102, 102u, 102v, 102w: Output terminals 112, 112u, 112v, 112w: Series body 114, 114u, 114v, 114w: Connection point 120: Signal generation unit 122: Carrier generation Unit 124: Voltage command value generating unit 126: Comparing unit 200: Motor module AS: Connected pulse wave group ASoff: Connected off pulse wave ASon: Connected on pulse wave AT: Connected pulse wave group period AToff: Connected off period ATon: Connect-on period B: DC voltage source BS: Pre-pulse group BSoff: Pre-off pulse BSON: Pre-on pulse BToff: Pre-off period BTon: Pre-on period C: Capacitor CAS: Carrier signal CS: Post-pulse group CSoff: Post-off pulse CSon: Post-on pulse CToff: Post-off period CTon: Post-on period D: Rectifier elements Iu, Iv, Iw: Output current M: Three-phase motor N : Second input terminal NS: Inverted PWM signal NT: Inverted PWM period P: First input terminal PS: Non-inverting PWM signal PT: Non-inverting PWM period T: PWM period Toff: Off period Ton: On period Un, Vn, Wn: Second semiconductor switching element Up, Vp, Wp: First semiconductor switching element V1: First voltage V2: Second voltage t: Time tsw: Phase switching timing

FIG. 1 is a block diagram of a motor module according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing an inverter unit. FIG. 3 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 4 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 5 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 6 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 7 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 8 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 9 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 10 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 11 is a diagram showing a PWM signal according to the embodiment of the present invention. FIG. 12 is a diagram showing a PWM signal according to the embodiment of the present invention.

AS: Linked pulse group

ASoff: connected disconnected pulse

ASon: Connected Pulse

AT: During the continuous pulse group

AToff: During disconnection

ATon: During the connection

CAS: carrier signal

NS: Inverted PWM signal

NT: Inverted PWM period

PS: positive phase PWM signal

PT: Non-inverting PWM period

T: PWM period

Toff: During disconnection

Ton: During the ON period

tsw: Phase switching timing

Claims (13)

A motor driving circuit controls the driving of a three-phase motor by means of two-phase modulation, and includes: a first input terminal to which a first voltage is applied; a second input terminal to which a second voltage lower than the first voltage is applied; a capacitor connected to the first input terminal and the second input terminal between; three series bodies, which are formed by connecting two semiconductor switching elements in series; and a signal generating part, which generates a pulse width modulation signal input to each of the three series bodies, and the pulse width modulation signal includes a positive A phase PWM signal and an inverse PWM signal, the phase of the inverse PWM signal is different from that of the non-inverting PWM signal, and the signal generating unit performs the phase switching timing The switching of the phase of the pulse width modulation signal, the pulse width modulation signal further has between the positive phase pulse width modulation signal and the reverse phase pulse width modulation signal and before and after the phase switching timing. A connected pulse wave group, the connected pulse wave group has: a connected on pulse wave with a connected on period; The ON period of one cycle of the switched PWM cycle is shorter. The motor drive circuit of claim 1, wherein The connected pulse wave group is located in a time range within one cycle of the pulse width modulation before and after the phase switching timing. The motor drive circuit of claim 1 or claim 2, wherein The disconnection period is shorter than the disconnection period of one cycle of the PWM period before or after the phase switching. The motor drive circuit of any one of claim 1 to claim 3, wherein The ratio of the connection-on period to the connection-off period is the same as the ratio of the ON period to the OFF period of one cycle of the PWM cycle before or after the phase switching. The motor drive circuit of any one of claim 1 to claim 3, wherein The connected on period precedes the connected off period, and the ratio of the on period to the period of the connected pulse group is the same as the on period before phase switching in the PWM period. The ratio of the off period to the period of the connected pulse group is the same as the ratio of the off period after the phase switching to the pulse width modulation period. The motor drive circuit of any one of claim 1 to claim 3, wherein The connection-off period precedes the connection-on period, and the ratio of the off-period to the period of the connected pulse group is the same as the off-period before the phase switching in the PWM period. The ratio is the same, and the ratio of the on-period to the period of the connected pulse group is the same as the ratio of the on-period after the phase switching to the pulse width modulation period. The motor drive circuit of any one of claim 1 to claim 6, wherein The period of the connected pulse wave group is 1/2 of the period of the pulse width modulation before or after the phase switching. The motor drive circuit of any one of claim 1 to claim 7, wherein The pulse width modulation signal further includes: a front pulse wave group, located before the connected pulse wave group; and a rear pulse wave group, located after the connected pulse wave group, and the front pulse wave group has: a front-connected pulse wave group A pulse wave having a preceding on-period; and a preceding off-pulse wave having a preceding off-period, the rear pulse wave group having: a rear-on pulse wave having a rear-on period; and a rear-off pulse wave having During the post-off period, the signal generating unit adjusts the pulse wavelengths of at least two of the connected pulse wave group, the pre-pulse wave group and the post-pulse wave group. The motor drive circuit of claim 8, wherein The signal generation unit adjusts at least two of the continuous-on period, the previous on-period, and the subsequent on-period, the adjustment value of the continuous on-period, the adjustment of the previous on-period The sum of the value and the adjusted value during the post-switch-on period is zero. The motor drive circuit of claim 8 or claim 9, wherein The signal generating unit adjusts at least two of the disconnection period, the preceding disconnection period, and the rear disconnection period, the adjustment value of the disconnection period, and the adjustment of the preceding disconnection period The sum of the value and the adjusted value during the post-disconnection period is zero. The motor drive circuit of any one of claim 1 to claim 10, wherein The connected pulse waves have a plurality of pulse waves. The motor drive circuit of any one of claim 1 to claim 11, wherein The connected and disconnected pulse waves have a plurality of pulse waves. A motor module, comprising: The motor drive circuit of any one of claim 1 to claim 12; and a three-phase motor driven by the motor drive circuit.

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