WO2022070446A1 - Motor drive circuit and motor module - Google Patents

Motor drive circuit and motor module Download PDF

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Publication number
WO2022070446A1
WO2022070446A1 PCT/JP2020/048420 JP2020048420W WO2022070446A1 WO 2022070446 A1 WO2022070446 A1 WO 2022070446A1 JP 2020048420 W JP2020048420 W JP 2020048420W WO 2022070446 A1 WO2022070446 A1 WO 2022070446A1
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WIPO (PCT)
Prior art keywords
period
phase
pulse
pwm signal
connection
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PCT/JP2020/048420
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French (fr)
Japanese (ja)
Inventor
耕太郎 片岡
Original Assignee
日本電産株式会社
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Application filed by 日本電産株式会社 filed Critical 日本電産株式会社
Priority to CN202080105615.4A priority Critical patent/CN116250173A/en
Publication of WO2022070446A1 publication Critical patent/WO2022070446A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation

Definitions

  • the present invention relates to a motor drive circuit and a motor module.
  • This application claims priority based on Japanese Patent Application No. 2020-164999 filed in Japan on September 30, 2020, the contents of which are incorporated herein by reference.
  • a two-phase modulation method is known as a drive method for a three-phase motor (for example, Patent Document 1).
  • the inverter device described in Patent Document 1 compares the command values of two phases other than the one kept on or off among the three phases with two triangular reference waves having 180-degree phases different from each other and having the same amplitude and frequency.
  • a control means for PWM-controlling the on / off of each switching element corresponding to each phase is provided.
  • the control means switches one of the triangular reference waves being compared with the command value of one of the three phases kept on or off to the other of the triangular reference waves.
  • the current flowing in and out of the capacitor is compared with the case where the command values of the two phases other than the one phase, which are kept on or off among the three phases, are compared with the same triangular reference wave for PWM control. Can be reduced.
  • the inverter device described in Patent Document 1 is limited to the case where the phase switching of the PWM signal is kept on or off. That is, the triangular reference wave used in the PWM waveform generation of each phase is fixed to one of the two triangular reference waves having a 180-degree phase difference during the switching period, and the switching is performed. The triangular reference wave is not switched inside.
  • the output voltage pattern as shown in FIG. 4B of Patent Document 1 is given, since the motor connected to the output is an inductive load, the current waveform is delayed with respect to the voltage waveform.
  • the present invention has been made in view of the above problems, and an object thereof is a motor drive circuit and a motor module capable of switching the PWM phase by suppressing the occurrence of a long on (or off) duration immediately after switching. Is to provide.
  • the exemplary motor drive circuit of the present invention controls the drive of a three-phase motor by a two-phase modulation method.
  • the motor drive circuit includes a first input terminal, a second input terminal, a capacitor, three series bodies, and a signal generation unit.
  • a first voltage is applied to the first input terminal.
  • a second voltage lower than the first voltage is applied to the second input terminal.
  • the capacitor is connected between the first input terminal and the second input terminal.
  • the signal generation unit generates a PWM signal to be input to each of the three series.
  • the PWM signal includes a positive phase PWM signal and a negative phase PWM signal.
  • the reverse phase PWM signal has a different phase from the positive phase PWM signal.
  • the signal generation unit switches the phase switching of the PWM signal at the phase switching timing.
  • the PWM signal is between the positive phase PWM signal and the negative phase PWM signal, and further has a connecting pulse set before and after the phase switching timing.
  • the splicing pulse set has a splicing on pulse and a splicing off pulse.
  • the tether-on pulse has a tether-on period.
  • the tether-off pulse has a tether-off period.
  • the connection on period is shorter than the on period of one PWM cycle before or after the phase switching. It was
  • An exemplary motor module of the present invention comprises the motor drive circuit described above and a three-phase motor.
  • the three-phase motor is driven by the motor drive circuit.
  • FIG. 1 is a block diagram of a motor module according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing an inverter unit.
  • FIG. 3 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 4 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 5 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 6 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 7 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 8 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 9 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 10 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 11 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 12 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 1 is a block diagram of a motor module 200 according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing the inverter unit 110. It was
  • the motor module 200 includes a motor drive circuit 100 and a three-phase motor M.
  • the three-phase motor M is driven by the motor drive circuit 100.
  • the three-phase motor M is, for example, a brushless DC motor.
  • the three-phase motor M has a U phase, a V phase and a W phase. It was
  • the motor drive circuit 100 controls the drive of the three-phase motor M by a two-phase modulation method.
  • the motor drive circuit 100 includes an inverter unit 110 and a signal generation unit 120. It was
  • the motor drive circuit 100 includes three output terminals 102.
  • the three output terminals 102 include an output terminal 102u, an output terminal 102v, and an output terminal 102w.
  • the three output terminals 102 output the three-phase output voltage and the three-phase output current to the three-phase motor M.
  • the output terminal 102u outputs the U-phase output voltage Vu and the U-phase output current Iu to the three-phase motor M.
  • the output terminal 102v outputs the V-phase output voltage Vv and the V-phase output current Iv to the three-phase motor M.
  • the output terminal 102w outputs the W-phase output voltage Vw and the W-phase output current Iw to the three-phase motor M. It was
  • the motor drive circuit 100 includes a first input terminal P, a second input terminal N, a capacitor C, and three series bodies 112. More specifically, in the present embodiment, the motor drive circuit 100 includes an inverter unit 110, and the inverter unit 110 includes a first input terminal P, a second input terminal N, a capacitor C, and three series. It is equipped with 112.
  • the inverter unit 110 further includes a DC voltage source B.
  • the DC voltage source B may be outside the inverter unit 110. It was
  • a first voltage V1 is applied to the first input terminal P.
  • the first input terminal P is connected to the DC voltage source B. It was
  • a second voltage V2 is applied to the second input terminal N.
  • the second input terminal N is connected to the DC voltage source B.
  • the second voltage V2 is lower than the first voltage V1. It was
  • the capacitor C is connected between the first input terminal P and the second input terminal N. It was
  • the semiconductor switching element is, for example, an IGBT (Insulated Gate Bipolar Transistor).
  • the semiconductor switching element may be another transistor such as a field effect transistor.
  • the three series 112u includes a series 112u, a series 112v, and a series 112w.
  • the three series 112 are connected in parallel to each other. One end of each of the three series 112 is connected to the first input terminal P. The other end of each of the three series 112 is connected to the second input terminal N.
  • a rectifying element D is connected in parallel to each of these semiconductor switching elements, with the first input terminal P side (upper side of the paper surface) as the cathode and the second input terminal N side (lower side of the paper surface) as the anode.
  • a parasitic diode may be used as this rectifying element.
  • Each of the three series 112 has a first semiconductor switching element and a second semiconductor switching element.
  • the series 112u has a first semiconductor switching element Up and a second semiconductor switching element Un.
  • the series 112v has a first semiconductor switching element Vp and a second semiconductor switching element Vn.
  • the series 112w has a first semiconductor switching element Wp and a second semiconductor switching element Wn. It was
  • the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are connected to the first input terminal P.
  • the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are semiconductor switching elements on the high voltage side. It was
  • the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are connected to the second input terminal N.
  • the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are semiconductor switching elements on the low voltage side. It was
  • the first semiconductor switching element and the second semiconductor switching element are connected at the connection point 114. Specifically, the first semiconductor switching element Up and the second semiconductor switching element Un are connected at the connection point 114u. The first semiconductor switching element Vp and the second semiconductor switching element Vn are connected at the connection point 114v. The first semiconductor switching element Wp and the second semiconductor switching element Wn are connected at the connection point 114w. It was
  • connection points 114 in each of the three series 112 are connected to the three output terminals 102. Specifically, the connection point 114u in the series 112u is connected to the output terminal 102u. The connection point 114v in the series 112v is connected to the output terminal 102v. The connection point 114w in the series 112w is connected to the output terminal 102w. It was
  • PWM signals are input to the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp.
  • the PWM signal is output from the signal generation unit 120.
  • the PWM signal input to the first semiconductor switching element Up may be referred to as “Up PWM signal”.
  • the PWM signal input to the first semiconductor switching element Vp may be described as "VpPWM signal”.
  • the PWM signal input to the first semiconductor switching element Wp may be described as "Wp PWM signal”.
  • the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are switched on and off in a predetermined PWM cycle.
  • the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are turned on when the UpPWM signal, VpPWM signal, and WpPWM signal are at HIGH level, respectively.
  • the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are turned off when the UpPWM signal, VpPWM signal, and WpPWM signal are at the LOW level, respectively.
  • a PWM signal is input to the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn.
  • the PWM signal is output from the signal generation unit 120.
  • the PWM signal input to the second semiconductor switching element Un may be referred to as “UnPWM signal”.
  • the PWM signal input to the second semiconductor switching element Vn may be described as "VnPWM signal”.
  • the PWM signal input to the second semiconductor switching element Wn may be described as "WnPWM signal”.
  • the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are switched on and off in a predetermined PWM cycle.
  • the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned on when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at the HIGH level, respectively.
  • the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned off when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at the LOW level, respectively.
  • the signal generation unit 120 includes a carrier generation unit 122, a voltage command value generation unit 124, and a comparison unit 126.
  • the signal generation unit 120 is a hardware circuit composed of a processor such as a CPU (Central Processing Unit), an ASIC (Application Specific Integrated Circuit), and the like. Then, the processor of the signal generation unit 120 functions as the carrier generation unit 122, the voltage command value generation unit 124, and the comparison unit 126 by executing the computer program stored in the storage device. It was
  • the signal generation unit 120 controls the inverter unit 110. Specifically, the signal generation unit 120 controls the inverter unit 110 by generating a PWM signal and outputting the PWM signal. More specifically, the signal generation unit 120 generates a PWM signal to be input to each of the three series 112. It was
  • the carrier generation unit 122 generates a carrier signal.
  • the carrier signal is, for example, a triangular wave.
  • the carrier signal may be a sawtooth wave. It was
  • the voltage command value generation unit 124 generates a voltage command value.
  • the voltage command value corresponds to the voltage value output from the motor drive circuit 100. That is, the voltage command value generation unit 124 generates a voltage value corresponding to the output voltage Vu, the output voltage Vv, and the output voltage Vw as the voltage command value. It was
  • the comparison unit 126 generates a PWM signal by comparing the carrier signal with the voltage command value. It was
  • FIG. 3 is a diagram showing a PWM signal according to an embodiment of the present invention.
  • FIG. 3 shows a one-phase PWM signal among the three-phase PWM signals.
  • the positive phase PWM period PT is a period during which the positive phase PWM signal PS is output.
  • the reverse phase PWM period NT is a period during which the reverse phase PWM signal NS is output.
  • the connected pulse set period AT is a period during which the connected pulse set AS is output.
  • the current waveform ignores the contribution of current ripple due to switching of other phases, and extracts and shows only the switching ripple component due to switching of this phase. It was
  • the PWM signal includes a positive phase PWM signal PS and a negative phase PWM signal NS.
  • the reverse phase PWM signal NS has a different phase from the positive phase PWM signal PS.
  • the reverse phase PWM signal NS is 180 degrees out of phase with the positive phase PWM signal PS. It was
  • the signal generation unit 120 generates a PWM signal by comparing the carrier signal CAS with the voltage command value V.
  • the signal generation unit 120 switches the phase switching of the PWM signal at the phase switching timing tsw.
  • the signal generation unit 120 switches the phase of the PWM signal from the positive phase to the negative phase at the phase switching timing tsw. That is, the phase of the PWM signal is the positive phase before the phase switching timing tsw.
  • the phase of the PWM signal is out of phase.
  • the phase switching timing tsw is the timing of the peak of the carrier signal CAS.
  • the carrier signal CAS is a triangular wave. It was
  • the signal generation unit 120 changes the voltage command value V at the phase switching timing tsw.
  • the signal generation unit 120 changes the voltage command value from V to 1-V.
  • the comparison unit 126 compares the voltage command value with the carrier signal CAS and generates a PWM signal. Specifically, when the phase of the PWM signal is positive, the PWM signal is turned off when the carrier signal CAS is equal to or higher than the voltage command value. On the other hand, the comparison unit 126 compares the voltage command value with the carrier signal CAS, and turns on the PWM signal when the carrier signal CAS is less than the voltage command value. On the other hand, when the phase of the PWM signal is opposite, the PWM signal is turned on when the carrier signal CAS is equal to or higher than the voltage command value.
  • the comparison unit 126 compares the voltage command value with the carrier signal CAS, and turns off the PWM signal when the carrier signal CAS is less than the voltage command value. In this way, the signal generation unit 120 changes the phase of the PWM signal by changing the voltage command value and the method of determination processing of the comparison unit 126. It was
  • the PWM signal is between the positive phase PWM signal PS and the negative phase PWM signal NS, and further has a pulse set AS connected before and after the phase switching timing tsw.
  • the tethered pulse set AS has a tethered on-pulse ASon and a tethered off-pulse ASoff.
  • the tether-on-pulse ASon has a tether-on period ATon.
  • the tether-off pulse ASoff has a tether-off period AToff.
  • the connected pulse set AS is located within a time range within one PWM cycle before and after the phase switching timing tsw. It was
  • connection on period ATon is shorter than the on period for one cycle of the PWM cycle before or after the phase switching.
  • the connection on period A Ton is shorter than the on period Ton for one cycle of the PWM cycle before the phase switching.
  • the PWM signal is between the positive phase PWM signal PS and the negative phase PWM signal NS, and has a pulse set AS connected before and after the phase switching timing tsw. Therefore, it is possible to switch the PWM phase with respect to one of the phases under PWM control while suppressing the occurrence of a long on (or off) duration immediately after the switching of the PWM signal phase. As a result, it is possible to reduce the capacitor ripple current while suppressing an unintended increase or decrease in the phase current immediately after switching the PWM signal phase, which causes torque unevenness and noise. It was
  • the connecting pulse set AS is located within a time range within one PWM cycle before and after the phase switching timing tsw. Therefore, it is possible to switch the PWM phase by suppressing the occurrence of a long on (or off) duration immediately after the switching of the PWM signal phase, which tends to cause a long on (or off) duration. As a result, it is possible to reduce the capacitor ripple current while suppressing the unintended increase / decrease in the phase current from causing torque unevenness and noise. It was
  • connection off period AToff is shorter than the off period for one cycle of the PWM cycle before or after the phase switching. Therefore, it is possible to reduce the capacitor ripple current while suppressing the unintended increase / decrease in the phase current from causing torque unevenness and noise.
  • the ratio of the connection on period ATon and the connection off period AToff is the same as the ratio of the on period Ton and the off period Toff for one cycle of the PWM cycle before or after the phase switching. Therefore, as shown in the current waveform shown in FIG. 3, fluctuations in the average current before and after phase switching can be suppressed, and torque unevenness and noise of the motor can be further suppressed.
  • the ratio of the connection on period ATon to the connection off period AToff may be slightly different from the ratio of the on period Ton and the off period Toff for one cycle of the PWM cycle before or after the phase switching. It was
  • connection off period AToff precedes the connection on period ATon
  • the ratio of the off period to the period of the connection pulse set AS is the same as the ratio of the off period to the PWM cycle before the phase switching.
  • the ratio of the on period to the period of the connected pulse set AS is the same as the ratio of the on period to the PWM cycle after the phase switching. Therefore, as shown in the current waveform shown in FIG. 3, the current value at the end of the connected pulse set AS period substantially coincides with the current peak value before the phase switching. Therefore, fluctuations in the average current before and after phase switching can be suppressed, and torque unevenness and noise of the motor can be further suppressed.
  • the ratio of the off period to the period of the connected pulse set AS may be slightly different from the ratio of the off period to the PWM cycle before the phase switching. Further, the ratio of the on period to the period of the connected pulse set AS may be slightly different from the ratio of the on period to the PWM cycle after the phase switching. It was
  • the connected on-pulse ASon may have a plurality of pulses. Even when the connected on-pulse ASon has a plurality of pulses, the capacitor ripple current can be reduced. It was
  • connection off pulse ASoff may have a plurality of pulses. Even when the connected off-pulse ASoff has a plurality of pulses, the capacitor ripple current can be reduced. It was
  • the PWM phase of the phase By switching the PWM phase of the phase during switching using this embodiment, it is possible to suppress the capacitor ripple current while suppressing the torque unevenness and noise of the motor.
  • the rotation angle section in which the capacitor ripple current decreases when reverse phase PWM is applied and the reverse phase The rotation angle section in which the capacitor ripple current deteriorates when PWM is applied is repeated every 60 degrees of electric rotation angle. Therefore, switching is being performed using this embodiment so that the PWM phases of the two switching phases are different in the former rotation angle section and the PWM phases of the two switching phases are the same in the latter rotation angle section.
  • the switching timing between the positive phase PWM and the negative phase PWM can be determined based on the zero crossing point of the motor current.
  • FIG. 4 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the signal generation unit 120 switches the phase of the PWM signal from the reverse phase to the positive phase at the phase switching timing tsw. It was
  • the PWM signal is between the positive phase PWM signal PS and the negative phase PWM signal NS, and has a pulse set AS connected before and after the phase switching timing tsw. Therefore, it is possible to switch the PWM phase by suppressing the occurrence of a long on (or off) duration immediately after the switching of the PWM signal phase, which tends to cause a long on (or off) duration. As a result, the capacitor ripple current can be reduced while suppressing the generation of torque unevenness and noise. It was
  • connection on period ATon precedes the connection off period AToff
  • the ratio of the on period to the period of the connection pulse set AS is the same as the ratio of the on period to the PWM cycle before the phase switching.
  • the ratio of the off period to the period of the connected pulse set AS is the same as the ratio of the off period to the PWM cycle after the phase switching. Therefore, as shown in the current waveform shown in FIG. 4, fluctuations in the average current before and after phase switching can be suppressed, and torque unevenness and noise of the motor can be further suppressed.
  • the ratio of the on period to the period of the connected pulse set AS may be slightly different from the ratio of the on period to the PWM cycle before the phase switching.
  • the ratio of the off period to the period of the connected pulse set AS may be slightly different from the ratio of the off period to the PWM cycle after phase switching. It was
  • phase switching timing tsw is the timing of the peak of the carrier signal CAS, but the phase switching timing tsw is deviated from the timing of the peak of the carrier signal CAS. You may. It was
  • FIG. 5 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the PWM signal further includes a front-phase PWM signal PS, a reverse-phase PWM signal NS, a connecting pulse set AS, a front pulse set BS, and a rear pulse set CS.
  • the pre-pulse set BS is located in front of the connecting pulse set AS.
  • the posterior pulse set CS is located after the connecting pulse set AS. It was
  • the pre-pulse set BS has a pre-on-pulse B Son and a pre-off-pulse BS off.
  • the pre-on-pulse B Son has a pre-on-period Bton.
  • the pre-off pulse BSoff has a pre-off period BToff.
  • the period of the pre-pulse set BS is the same as that of the previous PWM signal, that is, the positive phase PWM signal PS in the present embodiment. It was
  • the rear pulse set CS has a rear on-pulse CSon and a rear off-pulse CSoff.
  • the post-on-pulse CSon has a post-on-period CTon.
  • the post-off pulse CSoff has a post-off period CToff.
  • the period of the rear pulse set CS is the same as the PWM signal after this, that is, the reverse phase PWM signal NS in this embodiment. It was
  • phase switching timing tsw is delayed by a time t from the timing of the peak of the carrier signal CAS. It was
  • the signal generation unit 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS, and the rear pulse set CS. In the present embodiment, the signal generation unit 120 adjusts the pulse lengths of the connecting pulse set AS and the rear pulse set CS. It was
  • the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the connection-on-period ATon and the post-on-period CTon so as to compensate for the delay of the time t. Specifically, the signal generation unit 120 sets the voltage command value to 1 so that the connection-on-period ATon and the post-on-period CTon are each longer by t / 2 as compared with the case where the voltage command value is 1-V. The value shifted from ⁇ V is used as the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to the time t / 2 in terms of the pulse length. It was
  • CToff Toff-t.
  • CTon Ton + t / 2.
  • the signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection-on-period ATTon and the post-on-period CTon. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0.
  • the signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff.
  • the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff.
  • the sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0.
  • the adjustment value of the connection off period AToff is t2a
  • the adjustment value of the front off period BToff is t2b
  • the adjustment value of the rear off period CToff is t2c
  • t2a t
  • the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 3, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. Further, in the example shown in FIG. 3, at the moment of the phase switching timing tsw, the current amplitude becomes ⁇ I / 2, and the current waveform during the connected pulse set AS period is temporarily biased to the higher side. In the example shown, the bias of the current waveform is suppressed. Therefore, it is possible to further suppress the fluctuation of the average current due to the switching operation. By setting the value of t to, for example, 2 to 10% of the period of the carrier signal CAS, fluctuations in the average current can be effectively suppressed. It was
  • FIG. 6 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the signal generation unit 120 switches the phase of the PWM signal from the reverse phase to the positive phase at the phase switching timing tsw. Similar to the embodiment shown in FIG. 5, the phase switching timing tsw is delayed by a time t from the timing of the peak of the carrier signal CAS. It was
  • the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-off time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff so as to compensate for the portion delayed by the time t. Specifically, the signal generation unit 120 shifts the voltage command value from V so that the connection off period AToff and the post-off period CToff are each longer by t / 2 as compared with the case where the voltage command value is V. The set value is used as the voltage command value. It was
  • CTon Ton-t.
  • CToff Toff + t / 2.
  • the signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection-on-period ATTon and the post-on-period CTon. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0.
  • the signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff.
  • the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff.
  • the sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0.
  • the adjustment value of the connection off period AToff is t2a
  • the adjustment value of the front off period BToff is t2b
  • the adjustment value of the rear off period CToff is t2c
  • t2a -t / 2
  • t2a + t2b + t2c 0.
  • the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. Further, in the example shown in FIG. 4, at the moment of the phase switching timing tsw, the current amplitude becomes ⁇ I / 2, and the current waveform during the connected pulse set AS period is temporarily biased to the lower side. In the example shown, the bias of the current waveform is suppressed. Therefore, it is possible to further suppress the fluctuation of the average current due to the switching operation. By setting the value of t to, for example, 2 to 10% of the period of the carrier signal CAS, fluctuations in the average current can be effectively suppressed. It was
  • the signal generation unit 120 shifts the voltage command value by the value corresponding to the time t / 2 in terms of the pulse length, but it is converted into the pulse length.
  • the voltage command value may be shifted by a value corresponding to the time t. It was
  • FIG. 7 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the connection-on-period ATon and the post-on-period CTon so as to compensate for the delay of the time t. Specifically, the signal generation unit 120 sets the voltage command value to 1-V so that the connection-on-period ATon and the post-on-period CTon are each longer by t as compared with the case where the voltage command value is 1-V. The value shifted from is used as the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by the value corresponding to the time t in terms of the pulse length. It was
  • CToff Toff-t.
  • CTon Ton.
  • the signal generation unit 120 does not adjust the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. It was
  • the signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff.
  • the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff.
  • the sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0.
  • the adjustment value of the connection off period AToff is t2a
  • the adjustment value of the front off period BToff is t2b
  • the adjustment value of the rear off period CToff is t2c
  • t2a t
  • the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. In this example, by setting the value of t to, for example, 5 to 20% of the period of the carrier signal CAS, the fluctuation of the average current can be effectively suppressed. It was
  • the signal generation unit 120 adjusts the connection on period ATon and the post-on period CTon so as to compensate for the delay by the time t.
  • the signal generation unit 120 may adjust the pre-on period BTon so as to compensate for the amount delayed by the time t. It was
  • FIG. 8 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the pre-on period BTon so as to compensate in advance for the amount delayed by the time t. Specifically, the signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from V so that the previous ON period BTon is longer by t as compared with the case where the voltage command value is V. ..
  • the signal generation unit 120 shifts the voltage command value from V so that the turn-on time of the pre-on-pulse BSon is advanced by t / 2 and the turn-off time of the pre-on-pulse BSon is delayed by t / 2.
  • the value is the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to the time t / 2 in terms of the pulse length. It was
  • the signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection on period ATon and the pre-on period Bton. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0.
  • the signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff.
  • the signal generation unit 120 adjusts the connection off period AToff and the pre-off period BToff.
  • the sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0.
  • the adjustment value of the connection off period AToff is t2a
  • the adjustment value of the front off period BToff is t2b
  • the adjustment value of the rear off period CToff is t2c
  • t2a t / 2
  • t2b -t / 2
  • t2c 0.
  • t2a + t2b + t2c 0. It was
  • the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. It was
  • phase switching timing tsw is delayed from the timing of the peak of the carrier signal CAS, but the phase switching timing tsw is later than the timing of the peak of the carrier signal CAS. It may be early. It was
  • FIG. 9 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the phase switching timing tsw is advanced by time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is advanced by the time t. Therefore, the signal generation unit 120 adjusts the pre-on period BTon so as to adjust the minute earlier by the time t. Specifically, the signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from V so that the previous ON period BTon is shorter by t as compared with the case where the voltage command value is V. ..
  • the signal generation unit 120 shifts the voltage command value from V so that the turn-on time of the front on-pulse B Son is delayed by t / 2 and the turn-off time of the front on-pulse B Son is advanced by t / 2.
  • the value is the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to the time t / 2 in terms of the pulse length. It was
  • the signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection on period ATon and the pre-on period Bton. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0.
  • the signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff.
  • the signal generation unit 120 adjusts the connection off period AToff and the pre-off period BToff.
  • the sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0.
  • the adjustment value of the connection off period AToff is t2a
  • the adjustment value of the front off period BToff is t2b
  • the adjustment value of the rear off period CToff is t2c
  • t2a -t / 2
  • t2b t / 2
  • t2c 0.
  • t2a + t2b + t2c 0. It was
  • the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation.
  • the carrier signal CAS is a triangular wave, but the carrier signal CAS may be a sawtooth. It was
  • FIG. 10 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the carrier signal CAS is a sawtooth wave.
  • the signal generation unit 120 switches the phase of the PWM signal from the positive phase to the negative phase at the phase switching timing tsw. It was
  • the PWM signal includes a positive-phase PWM signal PS, a reverse-phase PWM signal NS, a connecting pulse set AS, a front pulse set BS, and a rear pulse set CS. It was
  • the difference between the current increase in the on period and the current decrease in the off period, that is, the current decrease from the turn-off of the front on-pulse B Son to the turn-on of the rear on-pulse C Son becomes ⁇ I. Therefore, the current Ia at the turn-on of the front on-pulse B Son and the current Ib at the turn-on of the rear on-pulse B Son can be matched. As a result, it is possible to suppress fluctuations in the average current due to the phase switching operation of the PWM signal. It was
  • the signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from 1-V so that the connection-on period ATton becomes Toff ⁇ Ton / T. It was
  • FIG. 11 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the carrier signal CAS is a sawtooth wave.
  • the signal generation unit 120 switches the phase of the PWM signal from the opposite phase to the positive phase at the phase switching timing tsw. It was
  • the PWM signal includes a positive-phase PWM signal PS, a reverse-phase PWM signal NS, a connecting pulse set AS, a front pulse set BS, and a rear pulse set CS. It was
  • the connecting on-pulse ASon of the connecting pulse set AS and the rear-on-pulse CSon of the rear pulse set CS are connected to each other. It was
  • the off period between the front on-pulse BSon and the rear-on-pulse CSon is Toff + TonToff / T.
  • the difference between the current increase in the on period and the current decrease in the off period, that is, the current decrease from the turn-off of the front on-pulse B Son to the turn-on of the rear on-pulse C Son becomes ⁇ I. Therefore, the current Ic at the turn-on of the front on-pulse B Son can be matched with the current Id at the turn-on of the rear on-pulse B Son. As a result, it is possible to suppress fluctuations in the average current due to the phase switching operation of the PWM signal. It was
  • the signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from V so that the connection-on period ATton becomes Ton-TonToff / T at the phase switching timing tsw. It was
  • the voltage command value was changed, but the voltage command value may be constant. It was
  • FIG. 12 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
  • the voltage command value is constant.
  • the phase of the carrier signal CAS is changed at the phase switching timing tsw. Specifically, the carrier signal CAS is switched from a peak to a valley at the phase switching timing tsw. Therefore, it is not necessary to switch between the positive phase and the negative phase in the comparison process between the carrier signal CAS and the voltage command value in the comparison unit 126 of the signal generation unit 120. For example, when the carrier signal is larger than the voltage command value, it is off, and when the carrier signal is larger than the voltage command value, it is on. Therefore, it is possible to simplify the calculation in the process of switching the phase of the PWM signal. It was
  • phase switching timing tsw may deviate from the timing of the peak of the carrier signal CAS, as in the example described with reference to FIGS. 5 to 9. It was
  • the carrier signal CAS was a triangular wave
  • the carrier signal CAS was a sawtooth.
  • the signal CAS may switch between the triangular wave and the saw blade at the phase switching timing tsw.
  • the carrier signal CAS may be a triangular wave
  • the carrier signal CAS may be a sawtooth wave
  • the carrier signal CAS may be a sawtooth wave
  • the carrier signal CAS may be a triangular wave.
  • FIGS. 1 to 12 The embodiments of the present invention have been described above with reference to the drawings (FIGS. 1 to 12). However, the present invention is not limited to the above embodiment, and can be implemented in various embodiments without departing from the gist thereof.
  • the drawings are schematically shown mainly for each component for easy understanding, and the thickness, length, number, etc. of each of the illustrated components are different from the actual ones for the convenience of drawing creation. .. Further, the material, shape, dimensions, etc. of each component shown in the above embodiment are merely examples, and are not particularly limited, and various changes can be made without substantially deviating from the effects of the present invention. be.
  • N ... 2nd input terminal, NS ... reverse phase PWM signal, P ... 1st input terminal, PS ... positive phase PWM signal, V1 ... 1st voltage , V2 ... second voltage, tsw ... phase switching timing

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Brushes (AREA)
  • Control Of Multiple Motors (AREA)
  • Control Of Direct Current Motors (AREA)

Abstract

Provided is a motor drive circuit capable of carrying out switching of PWM phases by limiting the occurrence of long continuous on (or off) times immediately after switching of a PWM signal phase. The motor drive circuit 100 comprises a first input terminal P, a second input terminal N, a capacitor C, three series units 112, and a signal generation part 120. The PWM signal includes a positive phase PWM signal PS and a negative phase PWM signal NS. The PWM signal additionally has a connecting pulse set AS before and after a phase switch timing tsw and between the positive phase PWM signal PS and the negative phase PWM signal NS. The connecting pulse set AS has a connecting on pulse ASon and a connecting off pulse ASoff. The connecting on pulse ASon has a connecting on period ATon. The connecting off pulse ASoff has a connecting off period AToff. The connecting on period ATon is shorter than an on period of one cycle of a PWM cycle before the phase switch or after the phase switch.

Description

モータ駆動回路およびモータモジュールMotor drive circuit and motor module
本発明は、モータ駆動回路およびモータモジュールに関する。本願は、２０２０年９月３０日に日本に出願された特願２０２０－１６４９９９号に基づき優先権を主張し、その内容をここに援用する。 The present invention relates to a motor drive circuit and a motor module. This application claims priority based on Japanese Patent Application No. 2020-164999 filed in Japan on September 30, 2020, the contents of which are incorporated herein by reference.
３相モータの駆動方式として、２相変調方式が知られている（例えば、特許文献１）。特許文献１に記載のインバータ装置は、３相のうちオンまたはオフに保たれる１相以外の２相の指令値を互いに１８０度位相が異なり振幅および周波数の等しい２つの三角基準波とそれぞれ比較し、各相に対応するスイッチング素子のそれぞれのオン、オフをＰＷＭ制御する制御手段を備える。制御手段は、３相のうちオンまたはオフに保たれる１相の指令値と比較している三角基準波の一方を三角基準波の他方に切り替える。これにより、３相のうちオンまたはオフに保たれる１相以外の２相の指令値を同じ三角基準波と比較してＰＷＭ制御する場合に比べて、コンデンサに出入りする電流（コンデンサリップル電流）を減少させることができる。 A two-phase modulation method is known as a drive method for a three-phase motor (for example, Patent Document 1). The inverter device described in Patent Document 1 compares the command values of two phases other than the one kept on or off among the three phases with two triangular reference waves having 180-degree phases different from each other and having the same amplitude and frequency. Further, a control means for PWM-controlling the on / off of each switching element corresponding to each phase is provided. The control means switches one of the triangular reference waves being compared with the command value of one of the three phases kept on or off to the other of the triangular reference waves. As a result, the current flowing in and out of the capacitor (capacitor ripple current) is compared with the case where the command values of the two phases other than the one phase, which are kept on or off among the three phases, are compared with the same triangular reference wave for PWM control. Can be reduced.
特開２００６－１９７７０７号公報Japanese Unexamined Patent Publication No. 2006-197707
しかしながら、特許文献１に記載のインバータ装置は、ＰＷＭ信号の位相の切り替えが、切り替える相がオンまたはオフに保たれる場合に限られる。すなわち、それぞれの相のＰＷＭ波形生成において用いられる三角基準波は、その相がスイッチングを行っている期間においては、１８０度位相が異なる２つの三角基準波のうちの一方に固定されており、スイッチング中に三角基準波を切り替えることは行わない。ところで、特許文献１図４（ｂ）のような出力電圧パターンを与えた場合、出力に接続されたモータは誘導性の負荷であることから、電圧波形に対し、電流波形は遅延を生じる。この時、一部の回転角区間では、スイッチング中の２つの相を１８０度位相が異なる三角波でＰＷＭ制御すると、インバータからコンデンサへの電流の逆流が発生することになり、コンデンサリップル電流を減少させる効果を弱めてしまう。場合によっては、同一の三角波を用いた場合よりもトータルのコンデンサリップル電流を増加させてしまうこともある。これを抑制するには、インバータからコンデンサへの電流逆流が発生しない回転角区間はスイッチング中の２相のＰＷＭ信号の位相を異ならせ、逆流が発生する回転角区間は同じＰＷＭ信号の位相を切り替えねばならない。しかし、特許文献１に記載のインバータ装置で、切り替える相がオンまたはオフに保たれていないときに、ＰＷＭ信号の位相の切り替えを行った場合には、ＰＷＭ信号位相の切り替え直後に長いオン（またはオフ）継続時間が生じる可能性がある。　 However, the inverter device described in Patent Document 1 is limited to the case where the phase switching of the PWM signal is kept on or off. That is, the triangular reference wave used in the PWM waveform generation of each phase is fixed to one of the two triangular reference waves having a 180-degree phase difference during the switching period, and the switching is performed. The triangular reference wave is not switched inside. By the way, when the output voltage pattern as shown in FIG. 4B of Patent Document 1 is given, since the motor connected to the output is an inductive load, the current waveform is delayed with respect to the voltage waveform. At this time, in a part of the rotation angle section, if the two phases being switched are PWM controlled by a triangular wave having a phase difference of 180 degrees, a backflow of current from the inverter to the capacitor will occur, and the capacitor ripple current will be reduced. It weakens the effect. In some cases, the total capacitor ripple current may be increased as compared with the case where the same triangular wave is used. To suppress this, the phase of the two-phase PWM signal during switching is different in the rotation angle section where no current backflow from the inverter to the capacitor occurs, and the phase of the same PWM signal is switched in the rotation angle section where backflow occurs. I have to. However, in the inverter device described in Patent Document 1, when the phase of the PWM signal is switched when the phase to be switched is not kept on or off, it is turned on (or long) immediately after the switching of the PWM signal phase. Off) Duration may occur. It was
本発明は上記課題に鑑みてなされたものであり、その目的は切り替え直後に長いオン（またはオフ）継続時間が生じることを抑制してＰＷＭ位相の切り替えを行うことができるモータ駆動回路およびモータモジュールを提供することにある。 The present invention has been made in view of the above problems, and an object thereof is a motor drive circuit and a motor module capable of switching the PWM phase by suppressing the occurrence of a long on (or off) duration immediately after switching. Is to provide.
本発明の例示的なモータ駆動回路は、２相変調方式で３相モータの駆動を制御する。前記モータ駆動回路は、第１入力端子と、第２入力端子と、コンデンサと、３つの直列体と、信号生成部とを備える。前記第１入力端子には、第１の電圧が印加される。前記第２入力端子には、前記第１の電圧よりも低い第２の電圧が印加される。前記コンデンサは、前記第１入力端子と前記第２入力端子との間に接続される。前記３つの直列体は、２つの半導体スイッチング素子が直列に接続されている。前記信号生成部は、前記３つの直列体のそれぞれに入力するＰＷＭ信号を生成する。前記ＰＷＭ信号は、正相ＰＷＭ信号と、逆相ＰＷＭ信号とを含む。前記逆相ＰＷＭ信号は、前記正相ＰＷＭ信号と位相が異なる。前記信号生成部は、前記ＰＷＭ信号の位相の切替を位相切替タイミングで切り替える。前記ＰＷＭ信号は、前記正相ＰＷＭ信号と前記逆相ＰＷＭ信号との間であって、前記位相切替タイミングの前後に繋ぎパルスセットをさらに有する。前記繋ぎパルスセットは、繋ぎオンパルスと、繋ぎオフパルスとを有する。前記繋ぎオンパルスは、繋ぎオン期間を有する。前記繋ぎオフパルスは、繋ぎオフ期間を有する。前記繋ぎオン期間は、位相切替前または位相切替後のＰＷＭ周期の１周期分のオン期間よりも短い。　 The exemplary motor drive circuit of the present invention controls the drive of a three-phase motor by a two-phase modulation method. The motor drive circuit includes a first input terminal, a second input terminal, a capacitor, three series bodies, and a signal generation unit. A first voltage is applied to the first input terminal. A second voltage lower than the first voltage is applied to the second input terminal. The capacitor is connected between the first input terminal and the second input terminal. In the three series, two semiconductor switching elements are connected in series. The signal generation unit generates a PWM signal to be input to each of the three series. The PWM signal includes a positive phase PWM signal and a negative phase PWM signal. The reverse phase PWM signal has a different phase from the positive phase PWM signal. The signal generation unit switches the phase switching of the PWM signal at the phase switching timing. The PWM signal is between the positive phase PWM signal and the negative phase PWM signal, and further has a connecting pulse set before and after the phase switching timing. The splicing pulse set has a splicing on pulse and a splicing off pulse. The tether-on pulse has a tether-on period. The tether-off pulse has a tether-off period. The connection on period is shorter than the on period of one PWM cycle before or after the phase switching. It was
本発明の例示的なモータモジュールは、上記に記載のモータ駆動回路と、３相モータとを備える。前記３相モータは、前記モータ駆動回路によって駆動される。 An exemplary motor module of the present invention comprises the motor drive circuit described above and a three-phase motor. The three-phase motor is driven by the motor drive circuit.
例示的な本発明によれば、ＰＷＭ信号位相の切り替え直後に長いオン（またはオフ）継続時間が生じることを抑制してＰＷＭ位相の切り替えを行うことができる。 According to an exemplary invention, it is possible to switch the PWM phase by suppressing the occurrence of a long on (or off) duration immediately after the switching of the PWM signal phase.
図１は、本発明の実施形態に係るモータモジュールのブロック図である。FIG. 1 is a block diagram of a motor module according to an embodiment of the present invention. 図２は、インバータ部を示す回路図である。FIG. 2 is a circuit diagram showing an inverter unit. 図３は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 3 is a diagram showing a PWM signal according to an embodiment of the present invention. 図４は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 4 is a diagram showing a PWM signal according to an embodiment of the present invention. 図５は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 5 is a diagram showing a PWM signal according to an embodiment of the present invention. 図６は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 6 is a diagram showing a PWM signal according to an embodiment of the present invention. 図７は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 7 is a diagram showing a PWM signal according to an embodiment of the present invention. 図８は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 8 is a diagram showing a PWM signal according to an embodiment of the present invention. 図９は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 9 is a diagram showing a PWM signal according to an embodiment of the present invention. 図１０は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 10 is a diagram showing a PWM signal according to an embodiment of the present invention. 図１１は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 11 is a diagram showing a PWM signal according to an embodiment of the present invention. 図１２は、本発明の実施形態に係るＰＷＭ信号を示す図である。FIG. 12 is a diagram showing a PWM signal according to an embodiment of the present invention.
以下、本発明の実施形態について、図面を参照しながら説明する。なお、図中、同一または相当部分については同一の参照符号を付して説明を繰り返さない。　 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the figure, the same or corresponding parts are designated by the same reference numerals and the description is not repeated. It was
図１および図２を参照して、本発明の実施形態に係るモータについて説明する。図１は、本発明の実施形態に係るモータモジュール２００のブロック図である。図２は、インバータ部１１０を示す回路図である。　 A motor according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is a block diagram of a motor module 200 according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing the inverter unit 110. It was
図１に示すように、モータモジュール２００は、モータ駆動回路１００と、３相モータＭとを備える。３相モータＭは、モータ駆動回路１００によって駆動される。３相モータＭは、例えば、ブラシレスＤＣモータである。３相モータＭは、Ｕ相、Ｖ相およびＷ相を有する。　 As shown in FIG. 1, the motor module 200 includes a motor drive circuit 100 and a three-phase motor M. The three-phase motor M is driven by the motor drive circuit 100. The three-phase motor M is, for example, a brushless DC motor. The three-phase motor M has a U phase, a V phase and a W phase. It was
モータ駆動回路１００は、２相変調方式で３相モータＭの駆動を制御する。モータ駆動回路１００は、インバータ部１１０と、信号生成部１２０とを備える。　 The motor drive circuit 100 controls the drive of the three-phase motor M by a two-phase modulation method. The motor drive circuit 100 includes an inverter unit 110 and a signal generation unit 120. It was
モータ駆動回路１００は、３つの出力端子１０２を備える。３つの出力端子１０２は、出力端子１０２ｕと、出力端子１０２ｖと、出力端子１０２ｗとを含む。３つの出力端子１０２は、３相の出力電圧と３相の出力電流とを３相モータＭへ出力する。詳しくは、出力端子１０２ｕは、Ｕ相の出力電圧Ｖｕと、Ｕ相の出力電流Ｉｕとを３相モータＭへ出力する。出力端子１０２ｖは、Ｖ相の出力電圧Ｖｖと、Ｖ相の出力電流Ｉｖとを３相モータＭへ出力する。出力端子１０２ｗは、Ｗ相の出力電圧Ｖｗと、Ｗ相の出力電流Ｉｗとを３相モータＭへ出力する。　 The motor drive circuit 100 includes three output terminals 102. The three output terminals 102 include an output terminal 102u, an output terminal 102v, and an output terminal 102w. The three output terminals 102 output the three-phase output voltage and the three-phase output current to the three-phase motor M. Specifically, the output terminal 102u outputs the U-phase output voltage Vu and the U-phase output current Iu to the three-phase motor M. The output terminal 102v outputs the V-phase output voltage Vv and the V-phase output current Iv to the three-phase motor M. The output terminal 102w outputs the W-phase output voltage Vw and the W-phase output current Iw to the three-phase motor M. It was
図２に示すように、モータ駆動回路１００は、第１入力端子Ｐと、第２入力端子Ｎと、コンデンサＣと、３つの直列体１１２とを備える。より具体的には、本実施形態では、モータ駆動回路１００は、インバータ部１１０を備え、インバータ部１１０は、第１入力端子Ｐと、第２入力端子Ｎと、コンデンサＣと、３つの直列体１１２とを備える。インバータ部１１０は、直流電圧源Ｂをさらに備える。なお、直流電圧源Ｂは、インバータ部１１０の外部にあってもよい。　 As shown in FIG. 2, the motor drive circuit 100 includes a first input terminal P, a second input terminal N, a capacitor C, and three series bodies 112. More specifically, in the present embodiment, the motor drive circuit 100 includes an inverter unit 110, and the inverter unit 110 includes a first input terminal P, a second input terminal N, a capacitor C, and three series. It is equipped with 112. The inverter unit 110 further includes a DC voltage source B. The DC voltage source B may be outside the inverter unit 110. It was
第１入力端子Ｐには、第１の電圧Ｖ１が印加される。第１入力端子Ｐは、直流電圧源Ｂに接続されている。　 A first voltage V1 is applied to the first input terminal P. The first input terminal P is connected to the DC voltage source B. It was
第２入力端子Ｎには、第２の電圧Ｖ２が印加される。第２入力端子Ｎは、直流電圧源Ｂに接続されている。第２の電圧Ｖ２は、第１の電圧Ｖ１よりも低い。　 A second voltage V2 is applied to the second input terminal N. The second input terminal N is connected to the DC voltage source B. The second voltage V2 is lower than the first voltage V1. It was
コンデンサＣは、第１入力端子Ｐと第２入力端子Ｎとの間に接続される。　 The capacitor C is connected between the first input terminal P and the second input terminal N. It was
３つの直列体１１２には、２つの半導体スイッチング素子が直列に接続されている。半導体スイッチング素子は、例えば、ＩＧＢＴ（絶縁ゲートバイポーラトランジスタ）である。なお、半導体スイッチング素子は、電界効果トランジスタのような他のトランジスタであってもよい。３つの直列体１１２は、直列体１１２ｕと、直列体１１２ｖと、直列体１１２ｗとを含む。３つの直列体１１２は、互いに並列に接続されている。３つの直列体１１２の各々は、一端が第１入力端子Ｐに接続されている。３つの直列体１１２の各々は、他端が第２入力端子Ｎに接続されている。これらの半導体スイッチング素子にはそれぞれ、第１入力端子Ｐ側（紙面上側）をカソード、第２入力端子Ｎ側（紙面下側）をアノードとして、整流素子Ｄが並列に接続される。半導体スイッチング素子として電界効果トランジスタを用いる場合には、寄生ダイオードをこの整流素子として用いてもよい。　 Two semiconductor switching elements are connected in series to the three series bodies 112. The semiconductor switching element is, for example, an IGBT (Insulated Gate Bipolar Transistor). The semiconductor switching element may be another transistor such as a field effect transistor. The three series 112u includes a series 112u, a series 112v, and a series 112w. The three series 112 are connected in parallel to each other. One end of each of the three series 112 is connected to the first input terminal P. The other end of each of the three series 112 is connected to the second input terminal N. A rectifying element D is connected in parallel to each of these semiconductor switching elements, with the first input terminal P side (upper side of the paper surface) as the cathode and the second input terminal N side (lower side of the paper surface) as the anode. When a field effect transistor is used as the semiconductor switching element, a parasitic diode may be used as this rectifying element. It was
３つの直列体１１２の各々は、第１半導体スイッチング素子と、第２半導体スイッチング素子とを有する。詳しくは、直列体１１２ｕは、第１半導体スイッチング素子Ｕｐと、第２半導体スイッチング素子Ｕｎとを有する。直列体１１２ｖは、第１半導体スイッチング素子Ｖｐと、第２半導体スイッチング素子Ｖｎとを有する。直列体１１２ｗは、第１半導体スイッチング素子Ｗｐと、第２半導体スイッチング素子Ｗｎとを有する。　 Each of the three series 112 has a first semiconductor switching element and a second semiconductor switching element. Specifically, the series 112u has a first semiconductor switching element Up and a second semiconductor switching element Un. The series 112v has a first semiconductor switching element Vp and a second semiconductor switching element Vn. The series 112w has a first semiconductor switching element Wp and a second semiconductor switching element Wn. It was
第１半導体スイッチング素子Ｕｐ、第１半導体スイッチング素子Ｖｐおよび第１半導体スイッチング素子Ｗｐは、第１入力端子Ｐに接続される。換言すると、第１半導体スイッチング素子Ｕｐ、第１半導体スイッチング素子Ｖｐおよび第１半導体スイッチング素子Ｗｐは、高電圧側の半導体スイッチング素子である。　 The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are connected to the first input terminal P. In other words, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are semiconductor switching elements on the high voltage side. It was
第２半導体スイッチング素子Ｕｎ、第２半導体スイッチング素子Ｖｎおよび第２半導体スイッチング素子Ｗｎは、第２入力端子Ｎに接続される。換言すると、第２半導体スイッチング素子Ｕｎ、第２半導体スイッチング素子Ｖｎおよび第２半導体スイッチング素子Ｗｎは、低電圧側の半導体スイッチング素子である。　 The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are connected to the second input terminal N. In other words, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are semiconductor switching elements on the low voltage side. It was
第１半導体スイッチング素子と第２半導体スイッチング素子とは接続点１１４において接続されている。詳しくは、第１半導体スイッチング素子Ｕｐと、第２半導体スイッチング素子Ｕｎとは、接続点１１４ｕにおいて接続されている。第１半導体スイッチング素子Ｖｐと、第２半導体スイッチング素子Ｖｎとは、接続点１１４ｖにおいて接続されている。第１半導体スイッチング素子Ｗｐと、第２半導体スイッチング素子Ｗｎとは、接続点１１４ｗにおいて接続されている。　 The first semiconductor switching element and the second semiconductor switching element are connected at the connection point 114. Specifically, the first semiconductor switching element Up and the second semiconductor switching element Un are connected at the connection point 114u. The first semiconductor switching element Vp and the second semiconductor switching element Vn are connected at the connection point 114v. The first semiconductor switching element Wp and the second semiconductor switching element Wn are connected at the connection point 114w. It was
３つの直列体１１２の各々における接続点１１４が、３つの出力端子１０２に接続されている。詳しくは、直列体１１２ｕにおける接続点１１４ｕが、出力端子１０２ｕに接続されている。直列体１１２ｖにおける接続点１１４ｖが、出力端子１０２ｖに接続されている。直列体１１２ｗにおける接続点１１４ｗが、出力端子１０２ｗに接続されている。　 The connection points 114 in each of the three series 112 are connected to the three output terminals 102. Specifically, the connection point 114u in the series 112u is connected to the output terminal 102u. The connection point 114v in the series 112v is connected to the output terminal 102v. The connection point 114w in the series 112w is connected to the output terminal 102w. It was
第１半導体スイッチング素子Ｕｐ、第１半導体スイッチング素子Ｖｐおよび第１半導体スイッチング素子Ｗｐには、ＰＷＭ信号が入力される。ＰＷＭ信号は、信号生成部１２０から出力される。以下、本明細書において、第１半導体スイッチング素子Ｕｐに入力されるＰＷＭ信号を「ＵｐＰＷＭ信号」と記載することがある。また、第１半導体スイッチング素子Ｖｐに入力されるＰＷＭ信号を「ＶｐＰＷＭ信号」と記載することがある。第１半導体スイッチング素子Ｗｐに入力されるＰＷＭ信号を「ＷｐＰＷＭ信号」と記載することがある。第１半導体スイッチング素子Ｕｐ、第１半導体スイッチング素子Ｖｐおよび第１半導体ス
イッチング素子Ｗｐは、所定のＰＷＭ周期でオンとオフとが切り替えられる。例えば、第１半導体スイッチング素子Ｕｐ、第１半導体スイッチング素子Ｖｐおよび第１半導体スイッチング素子Ｗｐは、それぞれ、ＵｐＰＷＭ信号、ＶｐＰＷＭ信号およびＷｐＰＷＭ信号がＨＩＧＨレベルの場合に、オンとなる。一方、第１半導体スイッチング素子Ｕｐ、第１半導体スイッチング素子Ｖｐおよび第１半導体スイッチング素子Ｗｐは、それぞれ、ＵｐＰＷＭ信号、ＶｐＰＷＭ信号およびＷｐＰＷＭ信号がＬＯＷレベルの場合に、オフとなる。　 PWM signals are input to the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp. The PWM signal is output from the signal generation unit 120. Hereinafter, in the present specification, the PWM signal input to the first semiconductor switching element Up may be referred to as “Up PWM signal”. Further, the PWM signal input to the first semiconductor switching element Vp may be described as "VpPWM signal". The PWM signal input to the first semiconductor switching element Wp may be described as "Wp PWM signal". The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are switched on and off in a predetermined PWM cycle. For example, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are turned on when the UpPWM signal, VpPWM signal, and WpPWM signal are at HIGH level, respectively. On the other hand, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are turned off when the UpPWM signal, VpPWM signal, and WpPWM signal are at the LOW level, respectively.
第２半導体スイッチング素子Ｕｎ、第２半導体スイッチング素子Ｖｎおよび第２半導体スイッチング素子Ｗｎには、ＰＷＭ信号が入力される。ＰＷＭ信号は、信号生成部１２０から出力される。以下、本明細書において、第２半導体スイッチング素子Ｕｎに入力されるＰＷＭ信号を「ＵｎＰＷＭ信号」と記載することがある。また、第２半導体スイッチング素子Ｖｎに入力されるＰＷＭ信号を「ＶｎＰＷＭ信号」と記載することがある。第２半導体スイッチング素子Ｗｎに入力されるＰＷＭ信号を「ＷｎＰＷＭ信号」と記載することがある。第２半導体スイッチング素子Ｕｎ、第２半導体スイッチング素子Ｖｎおよび第２半導体スイッチング素子Ｗｎは、所定のＰＷＭ周期でオンとオフとが切り替えられる。例えば、第２半導体スイッチング素子Ｕｎ、第２半導体スイッチング素子Ｖｎおよび第２半導体スイッチング素子Ｗｎは、それぞれ、ＵｎＰＷＭ信号、ＶｎＰＷＭ信号およびＷｎＰＷＭ信号がＨＩＧＨレベルの場合に、オンとなる。一方、第２半導体スイッチング素子Ｕｎ、第２半導体スイッチング素子Ｖｎおよび第２半導体スイッチング素子Ｗｎは、それぞれ、ＵｎＰＷＭ信号、ＶｎＰＷＭ信号およびＷｎＰＷＭ信号がＬＯＷレベルの場合に、オフとなる。　 A PWM signal is input to the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn. The PWM signal is output from the signal generation unit 120. Hereinafter, in the present specification, the PWM signal input to the second semiconductor switching element Un may be referred to as “UnPWM signal”. Further, the PWM signal input to the second semiconductor switching element Vn may be described as "VnPWM signal". The PWM signal input to the second semiconductor switching element Wn may be described as "WnPWM signal". The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are switched on and off in a predetermined PWM cycle. For example, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned on when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at the HIGH level, respectively. On the other hand, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned off when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at the LOW level, respectively. It was
図１に示すように、信号生成部１２０は、キャリア生成部１２２と、電圧指令値生成部１２４と、比較部１２６とを有する。信号生成部１２０は、ＣＰＵ（Ｃｅｎｔｒａｌ　Ｐｒｏｃｅｓｓｉｎｇ　Ｕｎｉｔ）のようなプロセッサー、およびＡＳＩＣ（Ａｐｐｌｉｃａｔｉｏｎ　Ｓｐｅｃｉｆｉｃ　Ｉｎｔｅｇｒａｔｅｄ　Ｃｉｒｃｕｉｔ）等によって構成されるハードウェア回路である。そして、信号生成部１２０のプロセッサーは、記憶装置に記憶されたコンピュータープログラムを実行することによって、キャリア生成部１２２と、電圧指令値生成部１２４と、比較部１２６として機能する。　 As shown in FIG. 1, the signal generation unit 120 includes a carrier generation unit 122, a voltage command value generation unit 124, and a comparison unit 126. The signal generation unit 120 is a hardware circuit composed of a processor such as a CPU (Central Processing Unit), an ASIC (Application Specific Integrated Circuit), and the like. Then, the processor of the signal generation unit 120 functions as the carrier generation unit 122, the voltage command value generation unit 124, and the comparison unit 126 by executing the computer program stored in the storage device. It was
信号生成部１２０は、インバータ部１１０を制御する。具体的には、信号生成部１２０は、ＰＷＭ信号を生成してＰＷＭ信号を出力することによって、インバータ部１１０を制御する。より具体的には、信号生成部１２０は、３つの直列体１１２のそれぞれに入力するＰＷＭ信号を生成する。　 The signal generation unit 120 controls the inverter unit 110. Specifically, the signal generation unit 120 controls the inverter unit 110 by generating a PWM signal and outputting the PWM signal. More specifically, the signal generation unit 120 generates a PWM signal to be input to each of the three series 112. It was
キャリア生成部１２２は、キャリア信号を生成する。キャリア信号は、例えば、三角波である。なお、キャリア信号は、鋸波であってもよい。　 The carrier generation unit 122 generates a carrier signal. The carrier signal is, for example, a triangular wave. The carrier signal may be a sawtooth wave. It was
電圧指令値生成部１２４は、電圧指令値を生成する。電圧指令値は、モータ駆動回路１００から出力する電圧値に相当する。すなわち、電圧指令値生成部１２４は、出力電圧Ｖｕ、出力電圧Ｖｖおよび出力電圧Ｖｗに応じた電圧値を電圧指令値として生成する。　 The voltage command value generation unit 124 generates a voltage command value. The voltage command value corresponds to the voltage value output from the motor drive circuit 100. That is, the voltage command value generation unit 124 generates a voltage value corresponding to the output voltage Vu, the output voltage Vv, and the output voltage Vw as the voltage command value. It was
比較部１２６は、キャリア信号と、電圧指令値とを比較することによってＰＷＭ信号を生成する。　 The comparison unit 126 generates a PWM signal by comparing the carrier signal with the voltage command value. It was
図１～図３を参照して、本発明の実施形態に係るＰＷＭ信号について説明する。図３は、本発明の実施形態に係るＰＷＭ信号を示す図である。図３では、３相のＰＷＭ信号のうち、１相のＰＷＭ信号を示している。図３において、正相ＰＷＭ期間ＰＴは、正相ＰＷＭ信号ＰＳが出力される期間である。また、逆相ＰＷＭ期間ＮＴは、逆相ＰＷＭ信号ＮＳが出力される期間である。また、繋ぎパルスセット期間ＡＴは、繋ぎパルスセットＡＳが出力される期間である。電流波形は、他の相のスイッチングによる電流リプルの寄与を無視し、この相のスイッチングによるスイッチングリプル成分のみを抽出して図示している。　 The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1 to 3. FIG. 3 is a diagram showing a PWM signal according to an embodiment of the present invention. FIG. 3 shows a one-phase PWM signal among the three-phase PWM signals. In FIG. 3, the positive phase PWM period PT is a period during which the positive phase PWM signal PS is output. Further, the reverse phase PWM period NT is a period during which the reverse phase PWM signal NS is output. Further, the connected pulse set period AT is a period during which the connected pulse set AS is output. The current waveform ignores the contribution of current ripple due to switching of other phases, and extracts and shows only the switching ripple component due to switching of this phase. It was
図３に示すように、ＰＷＭ信号は、正相ＰＷＭ信号ＰＳと、逆相ＰＷＭ信号ＮＳとを含む。逆相ＰＷＭ信号ＮＳは、正相ＰＷＭ信号ＰＳと位相が異なる。本実施形態では、逆相ＰＷＭ信号ＮＳは、正相ＰＷＭ信号ＰＳと位相が１８０度ずれている。　 As shown in FIG. 3, the PWM signal includes a positive phase PWM signal PS and a negative phase PWM signal NS. The reverse phase PWM signal NS has a different phase from the positive phase PWM signal PS. In the present embodiment, the reverse phase PWM signal NS is 180 degrees out of phase with the positive phase PWM signal PS. It was
信号生成部１２０は、キャリア信号ＣＡＳと電圧指令値Ｖとを比較することによって、ＰＷＭ信号を生成する。信号生成部１２０は、ＰＷＭ信号の位相の切替を位相切替タイミングｔｓｗで切り替える。ここでは、信号生成部１２０は、ＰＷＭ信号の位相を位相切替タイミングｔｓｗで正相から逆相に切り替える。すなわち、位相切替タイミングｔｓｗよりも前が、ＰＷＭ信号の位相が正相である。一方、位相切替タイミングｔｓｗよりも後が、ＰＷＭ信号の位相が逆相である。本実施形態では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングである。本実施形態では、キャリア信号ＣＡＳは、三角波である。　 The signal generation unit 120 generates a PWM signal by comparing the carrier signal CAS with the voltage command value V. The signal generation unit 120 switches the phase switching of the PWM signal at the phase switching timing tsw. Here, the signal generation unit 120 switches the phase of the PWM signal from the positive phase to the negative phase at the phase switching timing tsw. That is, the phase of the PWM signal is the positive phase before the phase switching timing tsw. On the other hand, after the phase switching timing tsw, the phase of the PWM signal is out of phase. In the present embodiment, the phase switching timing tsw is the timing of the peak of the carrier signal CAS. In this embodiment, the carrier signal CAS is a triangular wave. It was
信号生成部１２０は、位相切替タイミングｔｓｗにおいて、電圧指令値Ｖを変更する。ここでは、信号生成部１２０は、電圧指令値をＶから１－Ｖに変更する。比較部１２６は、電圧指令値とキャリア信号ＣＡＳとを比較し、ＰＷＭ信号を生成する。詳しくは、ＰＷＭ信号の位相が正相の場合、キャリア信号ＣＡＳが電圧指令値以上の場合に、ＰＷＭ信号をオフにする。一方、比較部１２６は、電圧指令値とキャリア信号ＣＡＳとを比較し、キャリア信号ＣＡＳが電圧指令値未満の場合に、ＰＷＭ信号をオンにする。一方、ＰＷＭ信号の位相が逆相の場合、キャリア信号ＣＡＳが電圧指令値以上の場合に、ＰＷＭ信号をオンにする。一方、比較部１２６は、電圧指令値とキャリア信号ＣＡＳとを比較し、キャリア信号ＣＡＳが電圧指令値未満の場合に、ＰＷＭ信号をオフにする。このように、信号生成部１２０は、電圧指令値と、比較部１２６の判定処理の方法とを変更することによって、ＰＷＭ信号の位相を変更する。　 The signal generation unit 120 changes the voltage command value V at the phase switching timing tsw. Here, the signal generation unit 120 changes the voltage command value from V to 1-V. The comparison unit 126 compares the voltage command value with the carrier signal CAS and generates a PWM signal. Specifically, when the phase of the PWM signal is positive, the PWM signal is turned off when the carrier signal CAS is equal to or higher than the voltage command value. On the other hand, the comparison unit 126 compares the voltage command value with the carrier signal CAS, and turns on the PWM signal when the carrier signal CAS is less than the voltage command value. On the other hand, when the phase of the PWM signal is opposite, the PWM signal is turned on when the carrier signal CAS is equal to or higher than the voltage command value. On the other hand, the comparison unit 126 compares the voltage command value with the carrier signal CAS, and turns off the PWM signal when the carrier signal CAS is less than the voltage command value. In this way, the signal generation unit 120 changes the phase of the PWM signal by changing the voltage command value and the method of determination processing of the comparison unit 126. It was
ＰＷＭ信号は、正相ＰＷＭ信号ＰＳと逆相ＰＷＭ信号ＮＳとの間であって、位相切替タイミングｔｓｗの前後に繋ぎパルスセットＡＳをさらに有する。繋ぎパルスセットＡＳは、繋ぎオンパルスＡＳｏｎと、繋ぎオフパルスＡＳｏｆｆとを有する。繋ぎオンパルスＡＳｏｎは、繋ぎオン期間ＡＴｏｎを有する。繋ぎオフパルスＡＳｏｆｆは、繋ぎオフ期間ＡＴｏｆｆを有する。繋ぎパルスセットＡＳは、位相切替タイミングｔｓｗの前後のＰＷＭ１周期以内の時間範囲に位置する。　 The PWM signal is between the positive phase PWM signal PS and the negative phase PWM signal NS, and further has a pulse set AS connected before and after the phase switching timing tsw. The tethered pulse set AS has a tethered on-pulse ASon and a tethered off-pulse ASoff. The tether-on-pulse ASon has a tether-on period ATon. The tether-off pulse ASoff has a tether-off period AToff. The connected pulse set AS is located within a time range within one PWM cycle before and after the phase switching timing tsw. It was
繋ぎオン期間ＡＴｏｎは、位相切替前または位相切替後のＰＷＭ周期の１周期分のオン期間よりも短い。本実施形態では、繋ぎオン期間ＡＴｏｎは、位相切替前のＰＷＭ周期の１周期分のオン期間Ｔｏｎよりも短い。詳しくは、繋ぎオン期間ＡＴｏｎは、位相切替前のＰＷＭ周期の１周期分のオン期間Ｔｏｎの１／２の長さである。すなわち、ＡＴｏｎ＝Ｔｏｎ／２である。　 The connection on period ATon is shorter than the on period for one cycle of the PWM cycle before or after the phase switching. In the present embodiment, the connection on period A Ton is shorter than the on period Ton for one cycle of the PWM cycle before the phase switching. Specifically, the connection on period A Ton is half the length of the on period Ton for one cycle of the PWM cycle before the phase switching. That is, ATon = Ton / 2. It was
ＰＷＭ信号は、正相ＰＷＭ信号ＰＳと逆相ＰＷＭ信号ＮＳとの間であって、位相切替タイミングｔｓｗの前後に繋ぎパルスセットＡＳを有する。したがって、ＰＷＭ制御中の相の一方に対して、ＰＷＭ信号位相の切り替え直後に長いオン（またはオフ）継続時間が生じることを抑制してＰＷＭ位相の切り替えを行うことができる。その結果、ＰＷＭ信号位相の切り替え直後に、意図しない相電流の増減が発生してトルクむらや騒音の原因となることを抑制したうえで、コンデンサリップル電流を低減できる。　 The PWM signal is between the positive phase PWM signal PS and the negative phase PWM signal NS, and has a pulse set AS connected before and after the phase switching timing tsw. Therefore, it is possible to switch the PWM phase with respect to one of the phases under PWM control while suppressing the occurrence of a long on (or off) duration immediately after the switching of the PWM signal phase. As a result, it is possible to reduce the capacitor ripple current while suppressing an unintended increase or decrease in the phase current immediately after switching the PWM signal phase, which causes torque unevenness and noise. It was
また、繋ぎパルスセットＡＳは、位相切替タイミングｔｓｗの前後のＰＷＭ１周期以内の時間範囲に位置する。したがって、長いオン（またはオフ）継続時間が生じやすいＰＷＭ信号位相の切り替え直後に長いオン（またはオフ）継続時間が生じることを抑制してＰＷＭ位相の切り替えを行うことができる。その結果、意図しない相電流の増減が発生してトルクむらや騒音の原因となることを抑制したうえで、コンデンサリップル電流を低減できる。　 Further, the connecting pulse set AS is located within a time range within one PWM cycle before and after the phase switching timing tsw. Therefore, it is possible to switch the PWM phase by suppressing the occurrence of a long on (or off) duration immediately after the switching of the PWM signal phase, which tends to cause a long on (or off) duration. As a result, it is possible to reduce the capacitor ripple current while suppressing the unintended increase / decrease in the phase current from causing torque unevenness and noise. It was
また、繋ぎオフ期間ＡＴｏｆｆは、位相切替前または位相切替後のＰＷＭ周期の１周期分のオフ期間よりも短い。したがって、意図しない相電流の増減が発生してトルクむらや騒音の原因となることを抑制したうえで、コンデンサリップル電流を低減できる。本実施形態では、繋ぎオフ期間ＡＴｏｆｆは、位相切替前のＰＷＭ周期の１周期分のオフ期間Ｔｏｆｆよりも短い。詳しくは、繋ぎオフ期間ＡＴｏｆｆは、位相切替前のＰＷＭ周期の１周期分のオフ期間Ｔｏｆｆの１／２の長さである。すなわち、ＡＴｏｆｆ＝Ｔｏｆｆ／２である。　 Further, the connection off period AToff is shorter than the off period for one cycle of the PWM cycle before or after the phase switching. Therefore, it is possible to reduce the capacitor ripple current while suppressing the unintended increase / decrease in the phase current from causing torque unevenness and noise. In the present embodiment, the connection off period AToff is shorter than the off period Toff for one cycle of the PWM cycle before the phase switching. Specifically, the connection off period AToff is half the length of the off period Toff for one cycle of the PWM cycle before the phase switching. That is, AToff = Toff / 2. It was
また、繋ぎオン期間ＡＴｏｎと繋ぎオフ期間ＡＴｏｆｆの比は、位相切替前または位相切替後のＰＷＭ周期の１周期分のオン期間Ｔｏｎとオフ期間Ｔｏｆｆとの比と同じである。したがって、図３に示す電流波形のように、位相切り替え前後の平均電流の変動を抑えることができ、モータのトルクむらや騒音をより抑制できる。なお、繋ぎオン期間ＡＴｏｎと繋ぎオフ期間ＡＴｏｆｆの比は、位相切替前または位相切替後のＰＷＭ周期の１周期分のオン期間Ｔｏｎとオフ期間Ｔｏｆｆとの比と僅かに異なっていてもよい。　 Further, the ratio of the connection on period ATon and the connection off period AToff is the same as the ratio of the on period Ton and the off period Toff for one cycle of the PWM cycle before or after the phase switching. Therefore, as shown in the current waveform shown in FIG. 3, fluctuations in the average current before and after phase switching can be suppressed, and torque unevenness and noise of the motor can be further suppressed. The ratio of the connection on period ATon to the connection off period AToff may be slightly different from the ratio of the on period Ton and the off period Toff for one cycle of the PWM cycle before or after the phase switching. It was
また、繋ぎオフ期間ＡＴｏｆｆが繋ぎオン期間ＡＴｏｎに先行するとともに、繋ぎパルスセットＡＳの期間に占めるオフ期間の比率が、位相切替前のＰＷＭ周期に占めるオフ期間の比率と同じである。また、繋ぎパルスセットＡＳの期間に占めるオン期間の比率が、位相切替後のＰＷＭ周期に占めるオン期間の比率と同じである。したがって、図３に示す電流波形のように、繋ぎパルスセットＡＳ期間終了時の電流値が位相切替前の電流ピーク値とほぼ一致することになる。このため、位相切り替え前後の平均電流の変動を抑えることができ、モータのトルクむらや騒音をより抑制できる。なお、繋ぎパルスセットＡＳの期間に占めるオフ期間の比率が、位相切替前のＰＷＭ周期に占めるオフ期間の比率と僅かに異なっていてもよい。また、繋ぎパルスセットＡＳの期間に占めるオン期間の比率が、位相切替後のＰＷＭ周期に占めるオン期間の比率と僅かに異なっていてもよい。　 Further, the connection off period AToff precedes the connection on period ATon, and the ratio of the off period to the period of the connection pulse set AS is the same as the ratio of the off period to the PWM cycle before the phase switching. Further, the ratio of the on period to the period of the connected pulse set AS is the same as the ratio of the on period to the PWM cycle after the phase switching. Therefore, as shown in the current waveform shown in FIG. 3, the current value at the end of the connected pulse set AS period substantially coincides with the current peak value before the phase switching. Therefore, fluctuations in the average current before and after phase switching can be suppressed, and torque unevenness and noise of the motor can be further suppressed. The ratio of the off period to the period of the connected pulse set AS may be slightly different from the ratio of the off period to the PWM cycle before the phase switching. Further, the ratio of the on period to the period of the connected pulse set AS may be slightly different from the ratio of the on period to the PWM cycle after the phase switching. It was
また、繋ぎパルスセットＡＳの周期は、位相切替前または位相切替後のＰＷＭ周期の１／２である。すなわち、ＡＴ＝Ｔ／２である。したがって、位相切り替え前後の平均電流の変動を抑えることができ、モータのトルクむらや騒音をより抑制できる。　 Further, the cycle of the connected pulse set AS is ½ of the PWM cycle before or after the phase switching. That is, AT = T / 2. Therefore, fluctuations in the average current before and after phase switching can be suppressed, and torque unevenness and noise of the motor can be further suppressed. It was
なお、繋ぎオンパルスＡＳｏｎは、複数のパルスを有していてもよい。繋ぎオンパルスＡＳｏｎが、複数のパルスを有する場合であっても、コンデンサリップル電流を低減できる。　 The connected on-pulse ASon may have a plurality of pulses. Even when the connected on-pulse ASon has a plurality of pulses, the capacitor ripple current can be reduced. It was
なお、繋ぎオフパルスＡＳｏｆｆは、複数のパルスを有していてもよい。繋ぎオフパルスＡＳｏｆｆが、複数のパルスを有する場合であっても、コンデンサリップル電流を低減できる。　 The connection off pulse ASoff may have a plurality of pulses. Even when the connected off-pulse ASoff has a plurality of pulses, the capacitor ripple current can be reduced. It was
以上の構成により、スイッチング中の相において正相ＰＷＭと逆相ＰＷＭとの切替えを行っても、平均電流の変動を抑えることができ、モータのトルクむらムラや騒音を抑制できる。このため、スイッチング中の２相の一方に逆相ＰＷＭを適用した方がコンデンサリップル電流を抑制できる回転角区間においては逆相ＰＷＭを適用し、逆相ＰＷＭを適用するとかえってコンデンサへの逆流電流が発生しコンデンサリップル電流を悪化させる回転角区間においては正相ＰＷＭを適用する、という動作が可能となり、コンデンサリップル電流を効果的に抑制してコンデンサの発熱を抑え、コンデンサの小型化および低コスト化を実現する。と同時に、正相ＰＷＭと逆相ＰＷＭとの切替えに伴うモータのトルクむらムラや騒音を抑制できる。２相変調方式のうち、例えばスイッチングしない相をオンに固定する期間とオフに固定する期間とを電気回転角６０度ごとに切り替える変調方式の場合には、電圧波形に対し電流波形が遅延することにより、逆相ＰＷＭを適用するとコンデンサリップル電流が悪化する回転角区間を生じる場合がある。そこで、このような回転角区間のみ、スイッチングする２つの相のＰＷＭ位相が同じ位相となるように、
本実施形態を用いてスイッチング中の相のＰＷＭ位相の切り替えを行うことにより、モータのトルクむらや騒音を抑制しつつコンデンサリップル電流を抑えることができる。また２相変調方式のうち、スイッチングしない相をオンのみに固定する方式や、オフのみに固定する方式の場合には、逆相ＰＷＭを適用するとコンデンサリップル電流が減少する回転角区間と、逆相ＰＷＭを適用するとコンデンサリップル電流が悪化する回転角区間とが、電気回転角６０度ごとに繰り返される。そこで、前者の回転角区間ではスイッチングする２つの相のＰＷＭ位相が異なり、後者の回転角区間ではスイッチングする２つの相のＰＷＭ位相が同じ位相となるように、本実施形態を用いてスイッチング中の相のＰＷＭ位相を切り替えることにより、モータのトルクむらや騒音を抑制しつつコンデンサリップル電流を抑えることができる。正相ＰＷＭと逆相ＰＷＭとの切替えタイミングは、モータ電流のゼロクロス点に基づいて決定することができる。　 With the above configuration, even if the normal phase PWM and the negative phase PWM are switched in the switching phase, the fluctuation of the average current can be suppressed, and the torque unevenness and noise of the motor can be suppressed. For this reason, when the reverse phase PWM is applied to one of the two phases during switching, the reverse phase PWM is applied in the rotation angle section where the capacitor ripple current can be suppressed, and when the reverse phase PWM is applied, the backflow current to the capacitor is rather increased. It is possible to apply positive-phase PWM in the rotation angle section that occurs and worsens the capacitor ripple current, effectively suppresses the capacitor ripple current, suppresses the heat generation of the capacitor, and reduces the size and cost of the capacitor. To realize. At the same time, it is possible to suppress uneven torque and noise of the motor due to switching between positive phase PWM and negative phase PWM. Of the two-phase modulation methods, for example, in the case of a modulation method in which the period in which the non-switching phase is fixed on and the period in which the non-switching phase is fixed is switched every 60 degrees of the electric rotation angle, the current waveform is delayed with respect to the voltage waveform. Therefore, when the reverse phase PWM is applied, a rotation angle section in which the capacitor ripple current deteriorates may occur. Therefore, only in such a rotation angle section, the PWM phases of the two switching phases are the same.
By switching the PWM phase of the phase during switching using this embodiment, it is possible to suppress the capacitor ripple current while suppressing the torque unevenness and noise of the motor. Of the two-phase modulation methods, in the case of the method of fixing the non-switching phase to only on or the method of fixing only to off, the rotation angle section in which the capacitor ripple current decreases when reverse phase PWM is applied and the reverse phase The rotation angle section in which the capacitor ripple current deteriorates when PWM is applied is repeated every 60 degrees of electric rotation angle. Therefore, switching is being performed using this embodiment so that the PWM phases of the two switching phases are different in the former rotation angle section and the PWM phases of the two switching phases are the same in the latter rotation angle section. By switching the PWM phase of the phase, it is possible to suppress the capacitor ripple current while suppressing the torque unevenness and noise of the motor. The switching timing between the positive phase PWM and the negative phase PWM can be determined based on the zero crossing point of the motor current.
次に、図１、図２および図４を参照して、本発明の実施形態に係るＰＷＭ信号の逆相から正相への切り替えについて説明する。図４は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 Next, switching from the reverse phase to the positive phase of the PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2 and 4. FIG. 4 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
図４に示すように、信号生成部１２０は、ＰＷＭ信号の位相を位相切替タイミングｔｓｗで逆相から正相に切り替える。　 As shown in FIG. 4, the signal generation unit 120 switches the phase of the PWM signal from the reverse phase to the positive phase at the phase switching timing tsw. It was
図３で示したＰＷＭ信号と同様に、ＰＷＭ信号は、正相ＰＷＭ信号ＰＳと逆相ＰＷＭ信号ＮＳとの間であって、位相切替タイミングｔｓｗの前後に繋ぎパルスセットＡＳを有する。したがって、長いオン（またはオフ）継続時間が生じやすいＰＷＭ信号位相の切り替え直後に長いオン（またはオフ）継続時間が生じることを抑制してＰＷＭ位相の切り替えを行うことができる。その結果、トルクむらや騒音の発生を抑えながら、コンデンサリップル電流を低減できる。　 Similar to the PWM signal shown in FIG. 3, the PWM signal is between the positive phase PWM signal PS and the negative phase PWM signal NS, and has a pulse set AS connected before and after the phase switching timing tsw. Therefore, it is possible to switch the PWM phase by suppressing the occurrence of a long on (or off) duration immediately after the switching of the PWM signal phase, which tends to cause a long on (or off) duration. As a result, the capacitor ripple current can be reduced while suppressing the generation of torque unevenness and noise. It was
繋ぎオン期間ＡＴｏｎは、位相切替前のＰＷＭ周期の１周期分のオン期間Ｔｏｎの１／２の長さである。すなわち、ＡＴｏｎ＝Ｔｏｎ／２である。　 The connection on period A Ton is half the length of the on period Ton for one cycle of the PWM cycle before the phase switching. That is, ATon = Ton / 2. It was
繋ぎオフ期間ＡＴｏｆｆは、位相切替前のＰＷＭ周期の１周期分のオフ期間Ｔｏｆｆの１／２の長さである。すなわち、ＡＴｏｆｆ＝Ｔｏｆｆ／２である。　 The connection off period AToff is half the length of the off period Toff for one cycle of the PWM cycle before the phase switching. That is, AToff = Toff / 2. It was
また、繋ぎオン期間ＡＴｏｎが繋ぎオフ期間ＡＴｏｆｆに先行するとともに、繋ぎパルスセットＡＳの期間に占めるオン期間の比率が、位相切替前のＰＷＭ周期に占めるオン期間の比率と同じである。また、繋ぎパルスセットＡＳの期間に占めるオフ期間の比率が、位相切替後のＰＷＭ周期に占めるオフ期間の比率と同じである。したがって、図４に示す電流波形のように、位相切り替え前後の平均電流の変動を抑えることができ、モータのトルクむらや騒音をより抑制できる。なお、繋ぎパルスセットＡＳの期間に占めるオン期間の比率は、位相切替前のＰＷＭ周期に占めるオン期間の比率と僅かに異なっていてもよい。また、繋ぎパルスセットＡＳの期間に占めるオフ期間の比率が、位相切替後のＰＷＭ周期に占めるオフ期間の比率と僅かに異なっていてもよい。　 Further, the connection on period ATon precedes the connection off period AToff, and the ratio of the on period to the period of the connection pulse set AS is the same as the ratio of the on period to the PWM cycle before the phase switching. Further, the ratio of the off period to the period of the connected pulse set AS is the same as the ratio of the off period to the PWM cycle after the phase switching. Therefore, as shown in the current waveform shown in FIG. 4, fluctuations in the average current before and after phase switching can be suppressed, and torque unevenness and noise of the motor can be further suppressed. The ratio of the on period to the period of the connected pulse set AS may be slightly different from the ratio of the on period to the PWM cycle before the phase switching. Further, the ratio of the off period to the period of the connected pulse set AS may be slightly different from the ratio of the off period to the PWM cycle after phase switching. It was
図４に示す電流波形のように、逆相から正相に位相を切り替える場合についても、位相切り替え前後の平均電流の変動を抑えることができ、モータのトルクむらや騒音をより抑制できる。　 Even when the phase is switched from the opposite phase to the positive phase as in the current waveform shown in FIG. 4, the fluctuation of the average current before and after the phase switching can be suppressed, and the torque unevenness and noise of the motor can be further suppressed. It was
なお、図３および図４を参照して説明した例では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングであったが、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングからずれていてもよい。　 In the example described with reference to FIGS. 3 and 4, the phase switching timing tsw is the timing of the peak of the carrier signal CAS, but the phase switching timing tsw is deviated from the timing of the peak of the carrier signal CAS. You may. It was
図１、図２および図５を参照して、本発明の実施形態に係るＰＷＭ信号について説明する。図５は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2 and 5. FIG. 5 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
図５に示すように、ＰＷＭ信号は、正相ＰＷＭ信号ＰＳと、逆相ＰＷＭ信号ＮＳと、繋ぎパルスセットＡＳとに加えて、前パルスセットＢＳと、後パルスセットＣＳとをさらに有する。前パルスセットＢＳは、繋ぎパルスセットＡＳの前に位置する。後パルスセットＣＳは、繋ぎパルスセットＡＳの後に位置する。　 As shown in FIG. 5, the PWM signal further includes a front-phase PWM signal PS, a reverse-phase PWM signal NS, a connecting pulse set AS, a front pulse set BS, and a rear pulse set CS. The pre-pulse set BS is located in front of the connecting pulse set AS. The posterior pulse set CS is located after the connecting pulse set AS. It was
前パルスセットＢＳは、前オンパルスＢＳｏｎと、前オフパルスＢＳｏｆｆとを有する。前オンパルスＢＳｏｎは、前オン期間ＢＴｏｎを有する。前オフパルスＢＳｏｆｆは、前オフ期間ＢＴｏｆｆを有する。前パルスセットＢＳの周期は、これよりも前のＰＷＭ信号、すなわち本実施形態では正相ＰＷＭ信号ＰＳと、同じである。　 The pre-pulse set BS has a pre-on-pulse B Son and a pre-off-pulse BS off. The pre-on-pulse B Son has a pre-on-period Bton. The pre-off pulse BSoff has a pre-off period BToff. The period of the pre-pulse set BS is the same as that of the previous PWM signal, that is, the positive phase PWM signal PS in the present embodiment. It was
後パルスセットＣＳは、後オンパルスＣＳｏｎと、後オフパルスＣＳｏｆｆとを有する。後オンパルスＣＳｏｎは、後オン期間ＣＴｏｎを有する。後オフパルスＣＳｏｆｆは、後オフ期間ＣＴｏｆｆを有する。後パルスセットＣＳの周期は、これよりも後のＰＷＭ信号、すなわち本実施形態では逆相ＰＷＭ信号ＮＳと、同じである。　 The rear pulse set CS has a rear on-pulse CSon and a rear off-pulse CSoff. The post-on-pulse CSon has a post-on-period CTon. The post-off pulse CSoff has a post-off period CToff. The period of the rear pulse set CS is the same as the PWM signal after this, that is, the reverse phase PWM signal NS in this embodiment. It was
位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから、時間ｔだけ遅延している。　 The phase switching timing tsw is delayed by a time t from the timing of the peak of the carrier signal CAS. It was
信号生成部１２０は、繋ぎパルスセットＡＳ、前パルスセットＢＳおよび後パルスセットＣＳの少なくとも２つのパルス長を調整する。本実施形態では、信号生成部１２０は、繋ぎパルスセットＡＳおよび後パルスセットＣＳのパルス長を調整する。　 The signal generation unit 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS, and the rear pulse set CS. In the present embodiment, the signal generation unit 120 adjusts the pulse lengths of the connecting pulse set AS and the rear pulse set CS. It was
本実施形態では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから、時間ｔだけ遅延している。したがって、切り替えに伴うターンオンの時刻が時間ｔだけ遅れる。このため、信号生成部１２０は、時間ｔだけ遅れた分を補償するように、繋ぎオン期間ＡＴｏｎおよび後オン期間ＣＴｏｎを調整する。詳しくは、信号生成部１２０は、繋ぎオン期間ＡＴｏｎおよび後オン期間ＣＴｏｎが、それぞれ、電圧指令値を１－Ｖとした場合と比較してｔ／２だけ長くなるように、電圧指令値を１－Ｖからシフトさせた値を電圧指令値とする。すなわち、信号生成部１２０は、パルス長に換算して時間ｔ／２に相当する値だけ電圧指令値をシフトさせる。　 In the present embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the connection-on-period ATon and the post-on-period CTon so as to compensate for the delay of the time t. Specifically, the signal generation unit 120 sets the voltage command value to 1 so that the connection-on-period ATon and the post-on-period CTon are each longer by t / 2 as compared with the case where the voltage command value is 1-V. The value shifted from −V is used as the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to the time t / 2 in terms of the pulse length. It was
この場合、繋ぎオフ期間ＡＴｏｆｆは、切り替えに伴うターンオンの時刻が時間ｔだけ遅れているため、Ｔｏｆｆ／２＋ｔとなる。すなわち、ＡＴｏｆｆ＝Ｔｏｆｆ／２＋ｔである。　 In this case, the connection-off period AToff is Toff / 2 + t because the turn-on time associated with the switching is delayed by the time t. That is, AToff = Toff / 2 + t. It was
また、繋ぎオン期間ＡＴｏｎは、ターンオンが時間ｔだけ遅れる代わりに、電圧指令値のシフトによりターンオフもｔ／２遅れるため、Ｔｏｎ／２－ｔ／２となる。すなわち、ＡＴｏｎ＝Ｔｏｎ／２－ｔ／２である。　 Further, the connection-on period ATon is Ton / 2-t / 2 because the turn-on is delayed by t / 2 due to the shift of the voltage command value instead of the turn-on being delayed by the time t. That is, ATon = Ton / 2-t / 2. It was
また、後オフ期間ＣＴｏｆｆは、電圧指令値のシフトにより時間ｔだけ短くなり、Ｔｏｆｆ－ｔとなる。すなわち、ＣＴｏｆｆ＝Ｔｏｆｆ－ｔである。　 Further, the post-off period CToff is shortened by the time t due to the shift of the voltage command value, and becomes Toff-t. That is, CToff = Toff-t. It was
また、後オン期間ＣＴｏｎは、電圧指令値のシフトによりｔ／２だけ延び、Ｔｏｎ＋ｔ／２となる。すなわち、ＣＴｏｎ＝Ｔｏｎ＋ｔ／２である。　 Further, the post-on period CTon is extended by t / 2 due to the shift of the voltage command value, and becomes Ton + t / 2. That is, CTon = Ton + t / 2. It was
信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、前オン期間ＢＴｏｎと、後オン期間ＣＴｏｎとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、後オン期間ＣＴｏｎとを調整する。繋ぎオン期間ＡＴｏｎの調整値と、前オン期間ＢＴｏｎの調整値と、後オン期間ＣＴｏｎの調整値との和は０である。本実施形態では、繋ぎオン期間ＡＴｏｎの調整値をｔ１ａ、前オン期間ＢＴｏｎの調整値をｔ１ｂ、後オン期間ＣＴｏｎの調整値をｔ１ｃとした場合、ｔ１ａ＝－ｔ／２、ｔ１ｂ＝０、ｔ１ｃ＝ｔ／２となる。したがって、ｔ１ａ＋ｔ１ｂ＋ｔ１ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection-on-period ATTon and the post-on-period CTon. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0. In the present embodiment, when the adjustment value of the connection on period ATon is t1a, the adjustment value of the front on period Bton is t1b, and the adjustment value of the rear on period CTon is t1c, t1a = −t / 2, t1b = 0, t1c. = T / 2. Therefore, t1a + t1b + t1c = 0. It was
信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、前オフ期間ＢＴｏｆｆと、後オフ期間ＣＴｏｆｆとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、後オフ期間ＣＴｏｆｆとを調整する。繋ぎオフ期間ＡＴｏｆｆの調整値と、前オフ期間ＢＴｏｆｆの調整値と、後オフ期間ＣＴｏｆｆの調整値との和は０である。繋ぎオフ期間ＡＴｏｆｆの調整値をｔ２ａ、前オフ期間ＢＴｏｆｆの調整値をｔ２ｂ、後オフ期間ＣＴｏｆｆの調整値をｔ２ｃとした場合、ｔ２ａ＝ｔ、ｔ２ｂ＝０、ｔ２ｃ＝－ｔとなる。したがって、ｔ２ａ＋ｔ２ｂ＋ｔ２ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff. In the present embodiment, the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff. The sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0. When the adjustment value of the connection off period AToff is t2a, the adjustment value of the front off period BToff is t2b, and the adjustment value of the rear off period CToff is t2c, t2a = t, t2b = 0, and t2c = -t. Therefore, t2a + t2b + t2c = 0. It was
図１、図２および図５を参照して説明したように、信号生成部１２０は、繋ぎパルスセットＡＳ、前パルスセットＢＳおよび後パルスセットＣＳの少なくとも２つのパルス長を調整する。さらに、図３に示したＰＷＭ信号と比較して、オン時間、オン時間のそれぞれ合計時間は変化しない。したがって、切替動作に伴う平均電流の変動を抑えることができる。さらに、図３で示した例では、位相切替タイミングｔｓｗの瞬間は、電流振幅がΔＩ／２となり、繋ぎパルスセットＡＳ期間中の電流波形が一時的に高い側に偏っているが、図５で示した例では、電流波形の偏りは抑制されている。したがって、より切替動作に伴う平均電流の変動を抑えることができる。ｔの値としては、例えばキャリア信号ＣＡＳの周期の２～１０％に設定することで、効果的に平均電流の変動を抑制できる。　 As described with reference to FIGS. 1, 2 and 5, the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 3, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. Further, in the example shown in FIG. 3, at the moment of the phase switching timing tsw, the current amplitude becomes ΔI / 2, and the current waveform during the connected pulse set AS period is temporarily biased to the higher side. In the example shown, the bias of the current waveform is suppressed. Therefore, it is possible to further suppress the fluctuation of the average current due to the switching operation. By setting the value of t to, for example, 2 to 10% of the period of the carrier signal CAS, fluctuations in the average current can be effectively suppressed. It was
次に、図１、図２および図６を参照して、本発明の実施形態に係るＰＷＭ信号の逆相から正相への切り替えについて説明する。図６は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 Next, switching from the reverse phase to the positive phase of the PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2, and 6. FIG. 6 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
図６に示すように、信号生成部１２０は、ＰＷＭ信号の位相を位相切替タイミングｔｓｗで逆相から正相に切り替える。図５で示した実施形態と同様に、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから、時間ｔだけ遅延している。　 As shown in FIG. 6, the signal generation unit 120 switches the phase of the PWM signal from the reverse phase to the positive phase at the phase switching timing tsw. Similar to the embodiment shown in FIG. 5, the phase switching timing tsw is delayed by a time t from the timing of the peak of the carrier signal CAS. It was
本実施形態では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから、時間ｔだけ遅延している。したがって、切り替えに伴うターンオフの時刻が時間ｔだけ遅れる。このため、信号生成部１２０は、時間ｔだけ遅れた分を補償するように、繋ぎオフ期間ＡＴｏｆｆおよび後オフ期間ＣＴｏｆｆを調整する。詳しくは、信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆおよび後オフ期間ＣＴｏｆｆが、それぞれ、電圧指令値をＶとした場合と比較してｔ／２だけ長くなるように、電圧指令値をＶからシフトさせた値を電圧指令値とする。　 In the present embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-off time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff so as to compensate for the portion delayed by the time t. Specifically, the signal generation unit 120 shifts the voltage command value from V so that the connection off period AToff and the post-off period CToff are each longer by t / 2 as compared with the case where the voltage command value is V. The set value is used as the voltage command value. It was
この場合、繋ぎオン期間ＡＴｏｎは、切り替えに伴うターンオフの時刻が時間ｔだけ遅れているため、Ｔｏｎ／２＋ｔとなる。なわち、ＡＴｏｎ＝Ｔｏｎ／２＋ｔである。　 In this case, the connection-on period ATon is Ton / 2 + t because the turn-off time associated with the switching is delayed by the time t. That is, ATon = Ton / 2 + t. It was
また、繋ぎオフ期間ＡＴｏｆｆは、ターンオフが時間ｔだけ遅れる代わりに、電圧指令値のシフトによりターンオンもｔ／２遅れるため、Ｔｏｆｆ／２－ｔ／２となる。すなわち、ＡＴｏｆｆ＝Ｔｏｆｆ／２－ｔ／２である。　 Further, the connection-off period AToff is Toff / 2-t / 2 because the turn-off is delayed by the time t but the turn-on is also delayed by t / 2 due to the shift of the voltage command value. That is, AToff = Toff / 2-t / 2. It was
また、後オン期間ＣＴｏｎは、電圧指令値のシフトにより時間ｔだけ短くなり、Ｔｏｎ－ｔとなる。すなわち、ＣＴｏｎ＝Ｔｏｎ－ｔである。　 Further, the post-on period CTon is shortened by the time t due to the shift of the voltage command value, and becomes Ton-t. That is, CTon = Ton-t. It was
また、後オフ期間ＣＴｏｆｆは、電圧指令値のシフトによりｔ／２だけ延び、Ｔｏｆｆ＋ｔ／２となる。すなわち、ＣＴｏｆｆ＝Ｔｏｆｆ＋ｔ／２である。　 Further, the post-off period CToff is extended by t / 2 due to the shift of the voltage command value, and becomes Toff + t / 2. That is, CToff = Toff + t / 2. It was
信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、前オン期間ＢＴｏｎと、後オン期間ＣＴｏｎとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、後オン期間ＣＴｏｎとを調整する。繋ぎオン期間ＡＴｏｎの調整値と、前オン期間ＢＴｏｎの調整値と、後オン期間ＣＴｏｎの調整値との和は０である。本実施形態では、繋ぎオン期間ＡＴｏｎの調整値をｔ１ａ、前オン期間ＢＴｏｎの調整値をｔ１ｂ、後オン期間ＣＴｏｎの調整値をｔ１ｃとした場合、ｔ１ａ＝ｔ、ｔ１ｂ＝０、ｔ１ｃ＝－ｔとなる。したがって、ｔ１ａ＋ｔ１ｂ＋ｔ１ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection-on-period ATTon and the post-on-period CTon. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0. In the present embodiment, when the adjustment value of the connection on period ATon is t1a, the adjustment value of the front on period Bton is t1b, and the adjustment value of the rear on period CTon is t1c, t1a = t, t1b = 0, t1c = -t. Will be. Therefore, t1a + t1b + t1c = 0. It was
信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、前オフ期間ＢＴｏｆｆと、後オフ期間ＣＴｏｆｆとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、後オフ期間ＣＴｏｆｆとを調整する。繋ぎオフ期間ＡＴｏｆｆの調整値と、前オフ期間ＢＴｏｆｆの調整値と、後オフ期間ＣＴｏｆｆの調整値との和は０である。繋ぎオフ期間ＡＴｏｆｆの調整値をｔ２ａ、前オフ期間ＢＴｏｆｆの調整値をｔ２ｂ、後オフ期間ＣＴｏｆｆの調整値をｔ２ｃとした場合
、ｔ２ａ＝－ｔ／２、ｔ２ｂ＝０、ｔ２ｃ＝ｔ／２となる。したがって、ｔ２ａ＋ｔ２ｂ＋ｔ２ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff. In the present embodiment, the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff. The sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0. When the adjustment value of the connection off period AToff is t2a, the adjustment value of the front off period BToff is t2b, and the adjustment value of the rear off period CToff is t2c, t2a = -t / 2, t2b = 0, t2c = t / 2. Become. Therefore, t2a + t2b + t2c = 0.
図１、図２および図６を参照して説明したように、信号生成部１２０は、繋ぎパルスセットＡＳ、前パルスセットＢＳおよび後パルスセットＣＳの少なくとも２つのパルス長を調整する。さらに、図４に示したＰＷＭ信号と比較して、オン時間、オン時間のそれぞれ合計時間は変化しない。したがって、切替動作に伴う平均電流の変動を抑えることができる。さらに、図４で示した例では、位相切替タイミングｔｓｗの瞬間は、電流振幅がΔＩ／２となり、繋ぎパルスセットＡＳ期間中の電流波形が一時的に低い側に偏っているが、図６で示した例では、電流波形の偏りは抑制されている。したがって、より切替動作に伴う平均電流の変動を抑えることができる。ｔの値としては、例えばキャリア信号ＣＡＳの周期の２～１０％に設定することで、効果的に平均電流の変動を抑制できる。　 As described with reference to FIGS. 1, 2 and 6, the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. Further, in the example shown in FIG. 4, at the moment of the phase switching timing tsw, the current amplitude becomes ΔI / 2, and the current waveform during the connected pulse set AS period is temporarily biased to the lower side. In the example shown, the bias of the current waveform is suppressed. Therefore, it is possible to further suppress the fluctuation of the average current due to the switching operation. By setting the value of t to, for example, 2 to 10% of the period of the carrier signal CAS, fluctuations in the average current can be effectively suppressed. It was
なお、図５を参照して説明した例では、信号生成部１２０は、パルス長に換算して時間ｔ／２に相当する値だけ電圧指令値をシフトさせていたが、パルス長に換算して時間ｔに相当する値だけ電圧指令値をシフトさせてもよい。　 In the example described with reference to FIG. 5, the signal generation unit 120 shifts the voltage command value by the value corresponding to the time t / 2 in terms of the pulse length, but it is converted into the pulse length. The voltage command value may be shifted by a value corresponding to the time t. It was
図１、図２および図７を参照して、本発明の実施形態に係るＰＷＭ信号について説明する。図７は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2 and 7. FIG. 7 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
本実施形態では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから、時間ｔだけ遅延している。したがって、切り替えに伴うターンオンの時刻が時間ｔだけ遅れる。このため、信号生成部１２０は、時間ｔだけ遅れた分を補償するように、繋ぎオン期間ＡＴｏｎおよび後オン期間ＣＴｏｎを調整する。詳しくは、信号生成部１２０は、繋ぎオン期間ＡＴｏｎおよび後オン期間ＣＴｏｎが、それぞれ、電圧指令値を１－Ｖとした場合と比較してｔだけ長くなるように、電圧指令値を１－Ｖからシフトさせた値を電圧指令値とする。すなわち、信号生成部１２０は、パルス長に換算して時間ｔに相当する値だけ電圧指令値をシフトさせる。　 In the present embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the connection-on-period ATon and the post-on-period CTon so as to compensate for the delay of the time t. Specifically, the signal generation unit 120 sets the voltage command value to 1-V so that the connection-on-period ATon and the post-on-period CTon are each longer by t as compared with the case where the voltage command value is 1-V. The value shifted from is used as the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by the value corresponding to the time t in terms of the pulse length. It was
この場合、繋ぎオフ期間ＡＴｏｆｆは、切り替えに伴うターンオンの時刻が時間ｔだけ遅れているため、Ｔｏｆｆ／２＋ｔとなる。すなわち、ＡＴｏｆｆ＝Ｔｏｆｆ／２＋ｔである。　 In this case, the connection-off period AToff is Toff / 2 + t because the turn-on time associated with the switching is delayed by the time t. That is, AToff = Toff / 2 + t. It was
また、繋ぎオン期間ＡＴｏｎは、ターンオンが時間ｔだけ遅れる代わりに、電圧指令値のシフトによりターンオフもｔ遅れるため、Ｔｏｎ／２となる。すなわち、ＡＴｏｎ＝Ｔｏｎ／２である。　 Further, the connection-on period ATon is Ton / 2 because the turn-on is delayed by the time t, but the turn-off is also delayed by the shift of the voltage command value. That is, ATon = Ton / 2. It was
また、後オフ期間ＣＴｏｆｆは、電圧指令値のシフトにより時間ｔだけ短くなり、Ｔｏｆｆ－ｔとなる。すなわち、ＣＴｏｆｆ＝Ｔｏｆｆ－ｔである。　 Further, the post-off period CToff is shortened by the time t due to the shift of the voltage command value, and becomes Toff-t. That is, CToff = Toff-t. It was
また、後オン期間ＣＴｏｎは、Ｔｏｎとなる。すなわち、ＣＴｏｎ＝Ｔｏｎである。　 In addition, the post-on period CTon becomes Ton. That is, CTon = Ton. It was
本実施形態では、信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、前オン期間ＢＴｏｎと、後オン期間ＣＴｏｎとを調整しない。　 In the present embodiment, the signal generation unit 120 does not adjust the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. It was
信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、前オフ期間ＢＴｏｆｆと、後オフ期間ＣＴｏｆｆとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、後オフ期間ＣＴｏｆｆとを調整する。繋ぎオフ期間ＡＴｏｆｆの調整値と、前オフ期間ＢＴｏｆｆの調整値と、後オフ期間ＣＴｏｆｆの調整値との和は０である。繋ぎオフ期間ＡＴｏｆｆの調整値をｔ２ａ、前オフ期間ＢＴｏｆｆの調整値をｔ２ｂ、後オフ期間ＣＴｏｆｆの調整値をｔ２ｃとした場合、ｔ２ａ＝ｔ、ｔ２ｂ＝０、ｔ２ｃ＝－ｔとなる。したがって、ｔ２ａ＋ｔ２ｂ＋ｔ２ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff. In the present embodiment, the signal generation unit 120 adjusts the connection off period AToff and the post-off period CToff. The sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0. When the adjustment value of the connection off period AToff is t2a, the adjustment value of the front off period BToff is t2b, and the adjustment value of the rear off period CToff is t2c, t2a = t, t2b = 0, and t2c = -t. Therefore, t2a + t2b + t2c = 0. It was
図１、図２および図７を参照して説明したように、信号生成部１２０は、繋ぎパルスセットＡＳ、前パルスセットＢＳおよび後パルスセットＣＳの少なくとも２つのパルス長を調整する。さらに、図４に示したＰＷＭ信号と比較して、オン時間、オン時間のそれぞれ合計時間は変化しない。したがって、切替動作に伴う平均電流の変動を抑えることができる。なお、この例ではｔの値として、例えばキャリア信号ＣＡＳの周期の５～２０％に設定することで平均電流の変動を効果的に抑えることができる。　 As described with reference to FIGS. 1, 2 and 7, the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. In this example, by setting the value of t to, for example, 5 to 20% of the period of the carrier signal CAS, the fluctuation of the average current can be effectively suppressed. It was
なお、図５～図７を参照して説明した例では、信号生成部１２０は、時間ｔだけ遅れた分を補償するように、繋ぎオン期間ＡＴｏｎおよび後オン期間ＣＴｏｎを調整していたが、信号生成部１２０は、時間ｔだけ遅れた分を補償するように、前オン期間ＢＴｏｎを調整してもよい。　 In the example described with reference to FIGS. 5 to 7, the signal generation unit 120 adjusts the connection on period ATon and the post-on period CTon so as to compensate for the delay by the time t. The signal generation unit 120 may adjust the pre-on period BTon so as to compensate for the amount delayed by the time t. It was
図１、図２および図８を参照して、本発明の実施形態に係るＰＷＭ信号について説明する。図８は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2 and 8. FIG. 8 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
本実施形態では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから、時間ｔだけ遅延している。したがって、切り替えに伴うターンオンの時刻が時間ｔだけ遅れる。このため、信号生成部１２０は、時間ｔだけ遅れる分を前もって補償するように、前オン期間ＢＴｏｎを調整する。詳しくは、信号生成部１２０は、前オン期間ＢＴｏｎが、電圧指令値をＶとした場合と比較してｔだけ長くなるように、電圧指令値をＶからシフトさせた値を電圧指令値とする。より詳しくは、信号生成部１２０は、前オンパルスＢＳｏｎのターンオンの時間がｔ／２早まるように、かつ、前オンパルスＢＳｏｎのターンオフの時間がｔ／２遅れるように、電圧指令値をＶからシフトさせた値を電圧指令値とする。すなわち、信号生成部１２０は、パルス長に換算して時間ｔ／２に相当する値だけ電圧指令値をシフトさせる。　 In the present embodiment, the phase switching timing tsw is delayed by the time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is delayed by the time t. Therefore, the signal generation unit 120 adjusts the pre-on period BTon so as to compensate in advance for the amount delayed by the time t. Specifically, the signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from V so that the previous ON period BTon is longer by t as compared with the case where the voltage command value is V. .. More specifically, the signal generation unit 120 shifts the voltage command value from V so that the turn-on time of the pre-on-pulse BSon is advanced by t / 2 and the turn-off time of the pre-on-pulse BSon is delayed by t / 2. The value is the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to the time t / 2 in terms of the pulse length. It was
この場合、前オフ期間ＢＴｏｆｆは、電圧指令値のシフトにより時間ｔ／２だけ短くなり、Ｔｏｆｆ－ｔ／２となる。すなわち、ＢＴｏｆｆ＝Ｔｏｆｆ－ｔ／２である。　 In this case, the pre-off period BToff is shortened by the time t / 2 due to the shift of the voltage command value, and becomes Toff-t / 2. That is, BToff = Toff-t / 2. It was
また、前オン期間ＢＴｏｎは、電圧指令値のシフトにより、ターンオンが時間ｔ／２だけ早まり、ターンオフが時間ｔ／２だけ遅れるため、Ｔｏｎ＋ｔとなる。すなわち、ＢＴｏｎ＝Ｔｏｎ＋ｔである。　 Further, the pre-on period BTon becomes Ton + t because the turn-on is advanced by the time t / 2 and the turn-off is delayed by the time t / 2 due to the shift of the voltage command value. That is, Bton = Ton + t. It was
また、繋ぎオフ期間ＡＴｏｆｆは、ターンオフが時間ｔ／２だけ遅れており、切り替えに伴うターンオンの時刻が時間ｔだけ遅れているため、Ｔｏｆｆ／２＋ｔ／２となる。すなわち、ＡＴｏｆｆ＝Ｔｏｆｆ／２＋ｔ／２である。　 Further, the connection-off period AToff is Toff / 2 + t / 2 because the turn-off is delayed by the time t / 2 and the turn-on time due to the switching is delayed by the time t. That is, AToff = Toff / 2 + t / 2. It was
また、繋ぎオン期間ＡＴｏｎは、ターンオンが時間ｔだけ遅れるため、Ｔｏｎ／２－ｔとなる。すなわち、ＡＴｏｎ＝Ｔｏｎ／２－ｔである。　 Further, the connection-on period ATon is Ton / 2-t because the turn-on is delayed by the time t. That is, ATon = Ton / 2-t. It was
信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、前オン期間ＢＴｏｎと、後オン期間ＣＴｏｎとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、前オン期間ＢＴｏｎとを調整する。繋ぎオン期間ＡＴｏｎの調整値と、前オン期間ＢＴｏｎの調整値と、後オン期間ＣＴｏｎの調整値との和は０である。本実施形態では、繋ぎオン期間ＡＴｏｎの調整値をｔ１ａ、前オン期間ＢＴｏｎの調整値をｔ１ｂ、後オン期間ＣＴｏｎの調整値をｔ１ｃとした場合、ｔ１ａ＝－ｔ、ｔ１ｂ＝ｔ、ｔ１ｃ＝０となる。したがって、ｔ１ａ＋ｔ１ｂ＋ｔ１ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection on period ATon and the pre-on period Bton. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0. In the present embodiment, when the adjustment value of the connection on period ATon is t1a, the adjustment value of the front on period Bton is t1b, and the adjustment value of the rear on period CTon is t1c, t1a = −t, t1b = t, t1c = 0. Will be. Therefore, t1a + t1b + t1c = 0. It was
信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、前オフ期間ＢＴｏｆｆと、後オフ期間ＣＴｏｆｆとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、前オフ期間ＢＴｏｆｆとを調整する。繋ぎオフ期間ＡＴｏｆｆの調整値と、前オフ期間ＢＴｏｆｆの調整値と、後オフ期間ＣＴｏｆｆの調整値との和は０である。繋ぎオフ期間ＡＴｏｆｆの調整値をｔ２ａ、前オフ期間ＢＴｏｆｆの調整値をｔ２ｂ、後オフ期間ＣＴｏｆｆの調整値をｔ２ｃとした場合、ｔ２ａ＝ｔ／２、ｔ２ｂ＝－ｔ／２、ｔ２ｃ＝０となる。したがって、ｔ２ａ＋ｔ２ｂ＋ｔ２ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff. In the present embodiment, the signal generation unit 120 adjusts the connection off period AToff and the pre-off period BToff. The sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0. When the adjustment value of the connection off period AToff is t2a, the adjustment value of the front off period BToff is t2b, and the adjustment value of the rear off period CToff is t2c, t2a = t / 2, t2b = -t / 2, t2c = 0. Become. Therefore, t2a + t2b + t2c = 0. It was
図１、図２および図８を参照して説明したように、信号生成部１２０は、繋ぎパルスセットＡＳ、前パルスセットＢＳおよび後パルスセットＣＳの少なくとも２つのパルス長を調整する。さらに、図４に示したＰＷＭ信号と比較して、オン時間、オン時間のそれぞれ合計時間は変化しない。したがって、切替動作に伴う平均電流の変動を抑えることができる。　 As described with reference to FIGS. 1, 2 and 8, the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation. It was
なお、図５～図８を参照して説明した例では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから遅れていたが、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングよりも早くてもよい。　 In the example described with reference to FIGS. 5 to 8, the phase switching timing tsw is delayed from the timing of the peak of the carrier signal CAS, but the phase switching timing tsw is later than the timing of the peak of the carrier signal CAS. It may be early. It was
図１、図２および図９を参照して、本発明の実施形態に係るＰＷＭ信号について説明する。図９は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2 and 9. FIG. 9 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
本実施形態では、位相切替タイミングｔｓｗは、キャリア信号ＣＡＳの山のタイミングから、時間ｔだけ早まっている。したがって、切り替えに伴うターンオンの時刻が時間ｔだけ早まる。このため、信号生成部１２０は、時間ｔだけ早まった分を調整するように、前オン期間ＢＴｏｎを調整する。詳しくは、信号生成部１２０は、前オン期間ＢＴｏｎが、電圧指令値をＶとした場合と比較してｔだけ短くなるように、電圧指令値をＶからシフトさせた値を電圧指令値とする。より詳しくは、信号生成部１２０は、前オンパルスＢＳｏｎのターンオンの時間がｔ／２遅れるように、かつ、前オンパルスＢＳｏｎのターンオフの時間がｔ／２早まるように、電圧指令値をＶからシフトさせた値を電圧指令値とする。すなわち、信号生成部１２０は、パルス長に換算して時間ｔ／２に相当する値だけ電圧指令値をシフトさせる。　 In the present embodiment, the phase switching timing tsw is advanced by time t from the timing of the peak of the carrier signal CAS. Therefore, the turn-on time associated with the switching is advanced by the time t. Therefore, the signal generation unit 120 adjusts the pre-on period BTon so as to adjust the minute earlier by the time t. Specifically, the signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from V so that the previous ON period BTon is shorter by t as compared with the case where the voltage command value is V. .. More specifically, the signal generation unit 120 shifts the voltage command value from V so that the turn-on time of the front on-pulse B Son is delayed by t / 2 and the turn-off time of the front on-pulse B Son is advanced by t / 2. The value is the voltage command value. That is, the signal generation unit 120 shifts the voltage command value by a value corresponding to the time t / 2 in terms of the pulse length. It was
この場合、前オフ期間ＢＴｏｆｆは、ターンオフが時間ｔ／２だけ延びるため、Ｔｏｆｆ＋ｔ／２となる。すなわち、ＢＴｏｆｆ＝Ｔｏｆｆ＋ｔ／２である。　 In this case, the pre-off period BToff is Toff + t / 2 because the turn-off is extended by the time t / 2. That is, BToff = Toff + t / 2. It was
また、前オン期間ＢＴｏｎは、電圧指令値のシフトにより、ターンオンが時間ｔ／２だけ遅れて、ターンオフが時間ｔ／２だけ早まるため、Ｔｏｎ－ｔとなる。すなわち、ＢＴｏｎ＝Ｔｏｎ－ｔである。　 Further, the pre-on period BTon becomes Ton-t because the turn-on is delayed by the time t / 2 and the turn-off is advanced by the time t / 2 due to the shift of the voltage command value. That is, BTon = Ton-t. It was
また、繋ぎオフ期間ＡＴｏｆｆは、ターンオフが時間ｔ／２だけ早まり、切り替えに伴うターンオンの時刻が時間ｔだけ早まっているため、Ｔｏｆｆ／２－ｔ／２となる。すなわち、ＡＴｏｆｆ＝Ｔｏｆｆ／２－ｔ／２である。　 Further, the connection-off period AToff is Toff / 2-t / 2 because the turn-off is advanced by the time t / 2 and the turn-on time associated with the switching is advanced by the time t. That is, AToff = Toff / 2-t / 2. It was
また、繋ぎオン期間ＡＴｏｎは、ターンオンが時間ｔだけ早まるため、Ｔｏｎ／２＋ｔとなる。すなわち、ＡＴｏｎ＝Ｔｏｎ／２＋ｔである。　 Further, the connection-on period ATon is Ton / 2 + t because the turn-on is advanced by the time t. That is, ATon = Ton / 2 + t. It was
信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、前オン期間ＢＴｏｎと、後オン期間ＣＴｏｎとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオン期間ＡＴｏｎと、前オン期間ＢＴｏｎとを調整する。繋ぎオン期間ＡＴｏｎの調整値と、前オン期間ＢＴｏｎの調整値と、後オン期間ＣＴｏｎの調整値との和は０である。本実施形態では、繋ぎオン期間ＡＴｏｎの調整値をｔ１ａ、前オン期間ＢＴｏｎの調整値をｔ１ｂ、後オン期間ＣＴｏｎの調整値をｔ１ｃとした場合、ｔ１ａ＝ｔ、ｔ１ｂ＝－ｔ、ｔ１ｃ＝０となる。したがって、ｔ１ａ＋ｔ１ｂ＋ｔ１ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection-on-period ATon, the pre-on-period Bton, and the post-on-period CTon. In the present embodiment, the signal generation unit 120 adjusts the connection on period ATon and the pre-on period Bton. The sum of the adjustment value of the connection-on period ATton, the adjustment value of the front-on period Bton, and the adjustment value of the rear-on period CTon is 0. In the present embodiment, when the adjustment value of the connection on period ATon is t1a, the adjustment value of the front on period Bton is t1b, and the adjustment value of the rear on period CTon is t1c, t1a = t, t1b = -t, t1c = 0. Will be. Therefore, t1a + t1b + t1c = 0. It was
信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、前オフ期間ＢＴｏｆｆと、後オフ期間ＣＴｏｆｆとの少なくとも２つを調整する。本実施形態では、信号生成部１２０は、繋ぎオフ期間ＡＴｏｆｆと、前オフ期間ＢＴｏｆｆとを調整する。繋ぎオフ期間ＡＴｏｆｆの調整値と、前オフ期間ＢＴｏｆｆの調整値と、後オフ期間ＣＴｏｆｆの調整値との和は０である。繋ぎオフ期間ＡＴｏｆｆの調整値をｔ２ａ、前オフ期間ＢＴｏｆｆの調整値をｔ２ｂ、後オフ期間ＣＴｏｆｆの調整値をｔ２ｃとした場合、ｔ２ａ＝－ｔ／２、ｔ２ｂ＝ｔ／２、ｔ２ｃ＝０となる。したがって、ｔ２ａ＋ｔ２ｂ＋ｔ２ｃ＝０となる。　 The signal generation unit 120 adjusts at least two of the connection off period AToff, the pre-off period BToff, and the post-off period CToff. In the present embodiment, the signal generation unit 120 adjusts the connection off period AToff and the pre-off period BToff. The sum of the adjustment value of the connection off period AToff, the adjustment value of the front off period BToff, and the adjustment value of the rear off period CToff is 0. When the adjustment value of the connection off period AToff is t2a, the adjustment value of the front off period BToff is t2b, and the adjustment value of the rear off period CToff is t2c, t2a = -t / 2, t2b = t / 2, t2c = 0. Become. Therefore, t2a + t2b + t2c = 0. It was
図１、図２および図９を参照して説明したように、信号生成部１２０は、繋ぎパルスセットＡＳ、前パルスセットＢＳおよび後パルスセットＣＳの少なくとも２つのパルス長を調整する。さらに、図４に示したＰＷＭ信号と比較して、オン時間、オン時間のそれぞれ合計時間は変化しない。したがって、切替動作に伴う平均電流の
変動を抑えることができる。　 As described with reference to FIGS. 1, 2 and 9, the signal generator 120 adjusts at least two pulse lengths of the connecting pulse set AS, the front pulse set BS and the rear pulse set CS. Further, as compared with the PWM signal shown in FIG. 4, the total time of the on time and the on time does not change. Therefore, it is possible to suppress fluctuations in the average current due to the switching operation.
なお、図３～図９を参照して説明した例では、キャリア信号ＣＡＳは三角波であったが、キャリア信号ＣＡＳは鋸歯でもよい。　 In the example described with reference to FIGS. 3 to 9, the carrier signal CAS is a triangular wave, but the carrier signal CAS may be a sawtooth. It was
図１、図２および図１０を参照して、本発明の実施形態に係るＰＷＭ信号について説明する。図１０は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2 and 10. FIG. 10 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
図１０に示すように、本実施形態では、キャリア信号ＣＡＳは、鋸波である。ここでは、信号生成部１２０は、ＰＷＭ信号の位相を位相切替タイミングｔｓｗで正相から逆相に切り替える。　 As shown in FIG. 10, in this embodiment, the carrier signal CAS is a sawtooth wave. Here, the signal generation unit 120 switches the phase of the PWM signal from the positive phase to the negative phase at the phase switching timing tsw. It was
ＰＷＭ信号は、正相ＰＷＭ信号ＰＳと、逆相ＰＷＭ信号ＮＳと、繋ぎパルスセットＡＳと、前パルスセットＢＳと、後パルスセットＣＳとを有する。　 The PWM signal includes a positive-phase PWM signal PS, a reverse-phase PWM signal NS, a connecting pulse set AS, a front pulse set BS, and a rear pulse set CS. It was
ＰＷＭ信号の位相の切替動作に伴う平均電流の変動を抑制するためには、前オンパルスＢＳｏｎのターンオン時の電流Ｉａと、後オンパルスＣＳｏｎのターンオン時の電流Ｉｂとをなるべく合致させることが好ましい。つまり、前オンパルスＢＳｏｎのターンオフから、後オンパルスＣＳｏｎのターンオンまでの時間２Ｔｏｆｆの間に、電流がΔＩだけ低下するように、繋ぎオン期間ＡＴｏｎを設定することが好ましい。　 In order to suppress the fluctuation of the average current due to the phase switching operation of the PWM signal, it is preferable to match the current Ia at the time of turn-on of the front on-pulse BSon with the current Ib at the time of turn-on of the rear on-pulse C Son as much as possible. That is, it is preferable to set the connection-on period ATon so that the current drops by ΔI during the time 2Toff from the turn-off of the front on-pulse B Son to the turn-on of the rear on-pulse C Son. It was
時間Ｔｏｎだけオンすると電流がΔＩ増加、時間Ｔｏｆｆだけオフすると電流がΔＩ減少するのであるから、繋ぎオン期間ＡＴｏｎは、Ｔ＝Ｔｏｎ＋Ｔｏｆｆとして、ＡＴｏｎ＝Ｔｏｆｆ×Ｔｏｎ／Ｔと設定することが好ましい。　 When the time Ton is turned on, the current increases by ΔI, and when the time Tof is turned off, the current decreases by ΔI. Therefore, it is preferable to set the connection on period ATon as T = Ton + Toff and ATon = Toff × Ton / T. It was
ＡＴｏｎ＝Ｔｏｆｆ×Ｔｏｎ／Ｔと設定した場合、前オンパルスＢＳｏｎから後オンパルスＣＳｏｎまでの間のオフ期間は、２Ｔｏｆｆ－ＡＴｏｎ＝Ｔｏｆｆ×（１＋Ｔｏｆｆ／Ｔ）。オン期間の電流上昇分は、ΔＩ×ＡＴｏｎ／Ｔｏｎ＝ΔＩ・Ｔｏｆｆ／Ｔ。オフ期間の電流減少分は、ΔＩ×Ｔｏｆｆ×（１＋Ｔｏｆｆ／Ｔ）／Ｔｏｆｆ＝ΔＩ＋ΔＩ・Ｔｏｆｆ／Ｔ。したがって、オン期間の電流上昇分とオフ期間の電流減少分との差分、すなわち、前オンパルスＢＳｏｎのターンオフから後オンパルスＣＳｏｎのターンオンまでの電流減少は、ΔＩとなる。したがって、前オンパルスＢＳｏｎのターンオン時の電流Ｉａと、後オンパルスＣＳｏｎのターンオン時の電流Ｉｂとを一致させることができる。この結果、ＰＷＭ信号の位相の切替動作に伴う平均電流の変動を抑制することができる。　 When ATon = Toff × Ton / T is set, the off period between the front on-pulse BSon and the rear-on-pulse CSon is 2Toff-ATon = Toff × (1 + Toff / T). The amount of current increase during the on period is ΔI × ATton / Ton = ΔI · Toff / T. The amount of current decrease during the off period is ΔI × Toff × (1 + Toff / T) / Toff = ΔI + ΔI · Toff / T. Therefore, the difference between the current increase in the on period and the current decrease in the off period, that is, the current decrease from the turn-off of the front on-pulse B Son to the turn-on of the rear on-pulse C Son becomes ΔI. Therefore, the current Ia at the turn-on of the front on-pulse B Son and the current Ib at the turn-on of the rear on-pulse B Son can be matched. As a result, it is possible to suppress fluctuations in the average current due to the phase switching operation of the PWM signal. It was
信号生成部１２０は、位相切替タイミングｔｓｗにおいて、繋ぎオン期間ＡＴｏｎが、Ｔｏｆｆ×Ｔｏｎ／Ｔとなるように、電圧指令値を１－Ｖからシフトさせた値を電圧指令値とする。　 In the phase switching timing tsw, the signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from 1-V so that the connection-on period ATton becomes Toff × Ton / T. It was
次に、図１、図２および図１１を参照して、本発明の実施形態に係るＰＷＭ信号の逆相から正相への切り替えについて説明する。図１１は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 Next, switching from the reverse phase to the positive phase of the PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2, and 11. FIG. 11 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
図１１に示すように、本実施形態では、キャリア信号ＣＡＳは、鋸波である。ここでは、信号生成部１２０は、ＰＷＭ信号の位相を位相切替タイミングｔｓｗで逆相から正相に切り替える。　 As shown in FIG. 11, in the present embodiment, the carrier signal CAS is a sawtooth wave. Here, the signal generation unit 120 switches the phase of the PWM signal from the opposite phase to the positive phase at the phase switching timing tsw. It was
ＰＷＭ信号は、正相ＰＷＭ信号ＰＳと、逆相ＰＷＭ信号ＮＳと、繋ぎパルスセットＡＳと、前パルスセットＢＳと、後パルスセットＣＳとを有する。　 The PWM signal includes a positive-phase PWM signal PS, a reverse-phase PWM signal NS, a connecting pulse set AS, a front pulse set BS, and a rear pulse set CS. It was
本実施形態では、繋ぎパルスセットＡＳの繋ぎオンパルスＡＳｏｎと、後パルスセットＣＳの後オンパルスＣＳｏｎとはつながっている。　 In the present embodiment, the connecting on-pulse ASon of the connecting pulse set AS and the rear-on-pulse CSon of the rear pulse set CS are connected to each other. It was
ＰＷＭ信号の位相の切替動作に伴う平均電流の変動を抑制するためには、前オンパルスＢＳｏｎのターンオン時の電流Ｉｃと、後オンパルスＣＳｏｎのターンオン時の電流Ｉｄとをなるべく合致させることが好ましい。つまり、前オンパルスＢＳｏｎのターンオフから、後オンパルスＣＳｏｎのターンオンまでの時間Ｔの間に、電流がΔＩだけ低下するように、繋ぎオン期間ＡＴｏｎを設定することが好ましい。　 In order to suppress the fluctuation of the average current due to the phase switching operation of the PWM signal, it is preferable to match the current Ic at the turn-on of the front on-pulse BSon with the current Id at the turn-on of the rear on-pulse C Son as much as possible. That is, it is preferable to set the connection-on period AToon so that the current decreases by ΔI during the time T from the turn-off of the front on-pulse B Son to the turn-on of the rear on-pulse C Son. It was
時間Ｔｏｎだけオンすると電流がΔＩ増加、時間Ｔｏｆｆだけオフすると電流がΔＩ減少するのであるから、繋ぎオン期間ＡＴｏｎは、Ｔ＝Ｔｏｎ＋Ｔｏｆｆとして、ＡＴｏｎ＝Ｔｏｎ－ＴｏｎＴｏｆｆ／Ｔと設定することが好ましい。　 Since the current increases by ΔI when only the time Ton is turned on and the current decreases by ΔI when the time Tof is turned off, it is preferable to set ATon = Ton-TonToff / T as T = Ton + Toff. It was
ＡＴｏｎ＝Ｔｏｎ－ＴｏｎＴｏｆｆ／Ｔと設定した場合、前オンパルスＢＳｏｎから後オンパルスＣＳｏｎまでの間のオフ期間は、Ｔｏｆｆ＋ＴｏｎＴｏｆｆ／Ｔ。オン期間の電流上昇分は、ΔＩ×ＡＴｏｎ／Ｔｏｎ＝ΔＩ－ΔＩ・Ｔｏｆｆ／Ｔ。オフ期間の電流減少分は、ΔＩ×（Ｔｏｆｆ＋ＴｏｎＴｏｆｆ／Ｔ）／Ｔｏｆｆ＝ΔＩ＋ΔＩ・Ｔｏｎ／Ｔ。したがって、オン期間の電流上昇分とオフ期間の電流減少分との差分、すなわち、前オンパルスＢＳｏｎのターンオフから後オンパルスＣＳｏｎのターンオンまでの電流減少は、ΔＩとなる。したがって、前オンパルスＢＳｏｎのターンオン時の電流Ｉｃと、後オンパルスＣＳｏｎのターンオン時の電流Ｉｄとを一致させることができる。その結果、ＰＷＭ信号の位相の切替動作に伴う平均電流の変動を抑制することができる。　 When ATon = Ton-TonToff / T is set, the off period between the front on-pulse BSon and the rear-on-pulse CSon is Toff + TonToff / T. The amount of current increase during the on period is ΔI × ATton / Ton = ΔI−ΔI · Toff / T. The amount of current decrease during the off period is ΔI × (Toff + TonToff / T) / Toff = ΔI + ΔI · Ton / T. Therefore, the difference between the current increase in the on period and the current decrease in the off period, that is, the current decrease from the turn-off of the front on-pulse B Son to the turn-on of the rear on-pulse C Son becomes ΔI. Therefore, the current Ic at the turn-on of the front on-pulse B Son can be matched with the current Id at the turn-on of the rear on-pulse B Son. As a result, it is possible to suppress fluctuations in the average current due to the phase switching operation of the PWM signal. It was
信号生成部１２０は、位相切替タイミングｔｓｗにおいて、繋ぎオン期間ＡＴｏｎが、Ｔｏｎ－ＴｏｎＴｏｆｆ／Ｔとなるように、電圧指令値をＶからシフトさせた値を電圧指令値とする。　 The signal generation unit 120 sets the voltage command value as the voltage command value by shifting the voltage command value from V so that the connection-on period ATton becomes Ton-TonToff / T at the phase switching timing tsw. It was
なお、図３～図１１を参照して説明した例では、電圧指令値を変更していたが、電圧指令値は一定でもよい。　 In the example described with reference to FIGS. 3 to 11, the voltage command value was changed, but the voltage command value may be constant. It was
図１、図２および図１２を参照して、本発明の実施形態に係るＰＷＭ信号について説明する。図１２は、本発明の実施形態に係るＰＷＭ信号を示す図である。　 The PWM signal according to the embodiment of the present invention will be described with reference to FIGS. 1, 2 and 12. FIG. 12 is a diagram showing a PWM signal according to an embodiment of the present invention. It was
図１２に示すように、本実施形態では、電圧指令値は一定である。本実施形態では、位相切替タイミングｔｓｗにおいて、キャリア信号ＣＡＳの位相を変更する。詳しくは、位相切替タイミングｔｓｗにおいて、キャリア信号ＣＡＳを山から谷へ切り替える。したがって、信号生成部１２０の比較部１２６の、キャリア信号ＣＡＳと電圧指令値との比較処理も、正相および逆相で切り替える必要が無い。例えば、キャリア信号が電圧指令値よりも大きいとオフ、キャリア信号が電圧指令値よりも大きいとオンのように、正相および逆相で処理を統一できる。したがって、ＰＷＭ信号の位相の切り替え処理にあたって、演算を簡略化することができる。　 As shown in FIG. 12, in this embodiment, the voltage command value is constant. In the present embodiment, the phase of the carrier signal CAS is changed at the phase switching timing tsw. Specifically, the carrier signal CAS is switched from a peak to a valley at the phase switching timing tsw. Therefore, it is not necessary to switch between the positive phase and the negative phase in the comparison process between the carrier signal CAS and the voltage command value in the comparison unit 126 of the signal generation unit 120. For example, when the carrier signal is larger than the voltage command value, it is off, and when the carrier signal is larger than the voltage command value, it is on. Therefore, it is possible to simplify the calculation in the process of switching the phase of the PWM signal. It was
なお、図１２を参照して説明した例でも、図５～図９を参照して説明した例と同様に、位相切替タイミングｔｓｗが、キャリア信号ＣＡＳの山のタイミングからずれていてもよい。　 In the example described with reference to FIG. 12, the phase switching timing tsw may deviate from the timing of the peak of the carrier signal CAS, as in the example described with reference to FIGS. 5 to 9. It was
なお、図３～図９および図１２を参照して説明した例では、キャリア信号ＣＡＳは三角波、図１０および図１１を参照して説明した例では、キャリア信号ＣＡＳは鋸歯であったが、キャリア信号ＣＡＳは三角波と鋸歯とを位相切替タイミングｔｓｗにおいて、三角波と鋸歯とを切り替えるようにしてもよい。例えば、正相の場合、キャリア信号ＣＡＳは三角波とし、逆相の場合、キャリア信号ＣＡＳは鋸波としてもよい。あるいは、正相の場合、キャリア信号ＣＡＳは鋸波とし、逆相の場合、キャリア信号ＣＡＳは三角波としてもよい。　 In the example described with reference to FIGS. 3 to 9 and 12, the carrier signal CAS was a triangular wave, and in the examples described with reference to FIGS. 10 and 11, the carrier signal CAS was a sawtooth. The signal CAS may switch between the triangular wave and the saw blade at the phase switching timing tsw. For example, in the case of a positive phase, the carrier signal CAS may be a triangular wave, and in the case of a reverse phase, the carrier signal CAS may be a sawtooth wave. Alternatively, in the case of a positive phase, the carrier signal CAS may be a sawtooth wave, and in the case of a reverse phase, the carrier signal CAS may be a triangular wave. It was
以上、図面（図１～図１２）を参照しながら本発明の実施形態を説明した。但し、本発明は、上記の実施形態に限られるものではなく、その要旨を逸脱しない範囲で種々の態様において実施することが可能である。図面は、理解しやすくするために、それぞれの構成要素を主体に模式的に示しており、図示された各構成要素の厚み、長さ、個数等は、図面作成の都合上から実際とは異なる。また、上記の実施形態で示す各構成要素の材質や形状、寸法等は一例であって、特に限定されるものではなく、本発明の効果から実質的に逸脱しない範囲で種々の変更が可能である。 The embodiments of the present invention have been described above with reference to the drawings (FIGS. 1 to 12). However, the present invention is not limited to the above embodiment, and can be implemented in various embodiments without departing from the gist thereof. The drawings are schematically shown mainly for each component for easy understanding, and the thickness, length, number, etc. of each of the illustrated components are different from the actual ones for the convenience of drawing creation. .. Further, the material, shape, dimensions, etc. of each component shown in the above embodiment are merely examples, and are not particularly limited, and various changes can be made without substantially deviating from the effects of the present invention. be.
１００・・・モータ駆動回路、１１２、１１２ｕ、１１２ｖ、１１２ｗ・・・直列体、１２０・・・信号生成部、２００・・・モータモジュール、ＡＳ・・・繋ぎパルスセット、ＡＳｏｆｆ・・・繋ぎオフパルス、ＡＳｏｎ・・・繋ぎオンパルス、ＡＴｏｆｆ・・・繋ぎオフ期間、ＡＴｏｎ・・・繋ぎオン期間、ＢＳ・・・前パルスセット、ＢＳｏｆｆ・・・前オフパルス、ＢＳｏｎ・・・前オンパルス、Ｔｏｆｆ・・・　前オフ期間、ＢＴｏｎ・・・前オン期間、Ｃ・・・コンデンサ、ＣＳ・・・後パルスセット、ＣＳｏｆｆ・・・後オフパルス、ＣＳｏｎ・・・後オンパルス、ＣＴｏｆｆ・・・後オフ期間、ＣＴｏｎ・・・後オン期間、Ｎ・・・第２入力端子、ＮＳ・・・逆相ＰＷＭ信号、Ｐ・・・第１入力端子、ＰＳ・・・正相ＰＷＭ信号、Ｖ１・・・第１の電圧、Ｖ２・・・第２の電圧、ｔｓｗ・・・位相切替タイミング
  100 ... motor drive circuit, 112, 112u, 112v, 112w ... series, 120 ... signal generator, 200 ... motor module, AS ... connecting pulse set, ASoff ... connecting off pulse , ASon ・ ・ ・ Connection on pulse, AToff ・ ・ ・ Connection off period, ATon ・ ・ ・ Connection on period, BS ・ ・ ・ Previous pulse set, BSoff ・ ・ ・ Previous off pulse, BSon ・ ・ ・ Previous on pulse, Toff ・ ・ ・Front off period, Bton ... front on period, C ... capacitor, CS ... rear pulse set, CSoff ... rear off pulse, CSon ... rear on pulse, CToff ... rear off period, CTon ... After-on period, N ... 2nd input terminal, NS ... reverse phase PWM signal, P ... 1st input terminal, PS ... positive phase PWM signal, V1 ... 1st voltage , V2 ... second voltage, tsw ... phase switching timing

Claims (13)


  1. 　２相変調方式で３相モータの駆動を制御するモータ駆動回路であって、

    　第１の電圧が印加される第１入力端子と、

    　前記第１の電圧よりも低い第２の電圧が印加される第２入力端子と、

    　前記第１入力端子と前記第２入力端子との間に接続されるコンデンサと、

    　２つの半導体スイッチング素子が直列に接続されている３つの直列体と、

    　前記３つの直列体のそれぞれに入力するＰＷＭ信号を生成する信号生成部とを備え、

    　前記ＰＷＭ信号は、正相ＰＷＭ信号と、逆相ＰＷＭ信号とを含み、

    　前記逆相ＰＷＭ信号は、前記正相ＰＷＭ信号と位相が異なり、

    　前記信号生成部は、前記ＰＷＭ信号の位相の切替を位相切替タイミングで切り替え、

    　前記ＰＷＭ信号は、前記正相ＰＷＭ信号と前記逆相ＰＷＭ信号との間であって、前記位相切替タイミングの前後に繋ぎパルスセットをさらに有し、

    　前記繋ぎパルスセットは、

    　繋ぎオン期間を有する繋ぎオンパルスと、

    　繋ぎオフ期間を有する繋ぎオフパルスとを有し、

    　前記繋ぎオン期間は、位相切替前または位相切替後のＰＷＭ周期の１周期分のオン期間よりも短い、モータ駆動回路。
    It is a motor drive circuit that controls the drive of a three-phase motor by a two-phase modulation method.

    The first input terminal to which the first voltage is applied and

    A second input terminal to which a second voltage lower than the first voltage is applied, and

    A capacitor connected between the first input terminal and the second input terminal,

    Three series bodies in which two semiconductor switching elements are connected in series,

    It is provided with a signal generation unit that generates a PWM signal to be input to each of the three series.

    The PWM signal includes a positive phase PWM signal and a negative phase PWM signal.

    The reverse phase PWM signal has a different phase from the positive phase PWM signal.

    The signal generation unit switches the phase switching of the PWM signal at the phase switching timing.

    The PWM signal is between the positive phase PWM signal and the negative phase PWM signal, and further has a connecting pulse set before and after the phase switching timing.

    The connecting pulse set is

    With a connection-on pulse that has a connection-on period,

    With a tether-off pulse with a tether-off period,

    The connection on period is shorter than the on period of one PWM cycle before or after the phase switching, that is, the motor drive circuit.

  2. 　前記繋ぎパルスセットは、前記位相切替タイミングの前後のＰＷＭ１周期以内の時間範囲に位置する、請求項１に記載のモータ駆動回路。
    The motor drive circuit according to claim 1, wherein the connecting pulse set is located within a time range within one PWM cycle before and after the phase switching timing.

  3. 　前記繋ぎオフ期間は、位相切替前または位相切替後のＰＷＭ周期の１周期分のオフ期間よりも短い、請求項１または請求項２に記載のモータ駆動回路。
    The motor drive circuit according to claim 1 or 2, wherein the connection off period is shorter than the off period for one cycle of the PWM cycle before or after the phase switching.

  4. 　前記繋ぎオン期間と前記繋ぎオフ期間の比は、位相切替前または位相切替後のＰＷＭ周期の１周期分のオン期間とオフ期間との比と同じである、請求項１から請求項３のいずれか１項に記載のモータ駆動回路。
    Any of claims 1 to 3, wherein the ratio of the connection on period to the connection off period is the same as the ratio of the on period and the off period for one cycle of the PWM cycle before or after the phase switching. The motor drive circuit according to claim 1.

  5. 　前記繋ぎオン期間が前記繋ぎオフ期間に先行するとともに、

    　前記繋ぎパルスセットの期間に占める前記オン期間の比率が、位相切替前のＰＷＭ周期に占めるオン期間の比率と同じであり、

    　前記繋ぎパルスセットの期間に占める前記オフ期間の比率が、位相切替後のＰＷＭ周期に占めるオフ期間の比率と同じである、請求項１から請求項３のいずれか１項に記載のモータ駆動回路。
    The connection-on period precedes the connection-off period, and

    The ratio of the on period to the period of the connected pulse set is the same as the ratio of the on period to the PWM cycle before phase switching.

    The motor drive circuit according to any one of claims 1 to 3, wherein the ratio of the off period to the period of the connected pulse set is the same as the ratio of the off period to the PWM cycle after phase switching. ..

  6. 　前記繋ぎオフ期間が前記繋ぎオン期間に先行するとともに、

    　前記繋ぎパルスセットの期間に占める前記オフ期間の比率が、位相切替前のＰＷＭ周期に占めるオフ期間の比率と同じであり、

    　前記繋ぎパルスセットの期間に占める前記オン期間の比率が、位相切替後のＰＷＭ周期に占めるオン期間の比率と同じである、請求項１から請求項３のいずれか１項に記載のモータ駆動回路。
    The connection-off period precedes the connection-on period, and

    The ratio of the off period to the period of the connected pulse set is the same as the ratio of the off period to the PWM cycle before phase switching.

    The motor drive circuit according to any one of claims 1 to 3, wherein the ratio of the on period to the period of the connected pulse set is the same as the ratio of the on period to the PWM cycle after phase switching. ..

  7. 　前記繋ぎパルスセットの周期は、位相切替前または位相切替後のＰＷＭ周期の１／２である、請求項１から請求項６のいずれか１項に記載のモータ駆動回路。
    The motor drive circuit according to any one of claims 1 to 6, wherein the cycle of the connected pulse set is ½ of the PWM cycle before or after the phase switching.

  8. 　前記ＰＷＭ信号は、

    　前記繋ぎパルスセットの前に位置する前パルスセットと、

    　前記繋ぎパルスセットの後に位置する後パルスセットとをさらに有し、

    　前記前パルスセットは、

    　前オン期間を有する前オンパルスと、

    　前オフ期間を有する前オフパルスとを有し、

    　前記後パルスセットは、

    　後オン期間を有する後オンパルスと、

    　後オフ期間を有する後オフパルスとを有し、

    　前記信号生成部は、前記繋ぎパルスセット、前記前パルスセットおよび前記後パルスセットの少なくとも２つのパルス長を調整する、請求項１から請求項７のいずれか１項に記載のモータ駆動回路。
    The PWM signal is

    The pre-pulse set located in front of the connecting pulse set and

    Further having a post-pulse set located after the spliced pulse set,

    The pre-pulse set

    With a pre-on pulse with a pre-on period,

    With a pre-off pulse with a pre-off period,

    The post-pulse set

    With a post-on pulse with a post-on period,

    With a post-off pulse and with a post-off period,

    The motor drive circuit according to any one of claims 1 to 7, wherein the signal generation unit adjusts at least two pulse lengths of the connecting pulse set, the front pulse set, and the rear pulse set.

  9. 　前記信号生成部は、前記繋ぎオン期間と、前記前オン期間と、前記後オン期間との少なくとも２つを調整し、

    　前記繋ぎオン期間の調整値と、前記前オン期間の調整値と、前記後オン期間の調整値との和は０である、請求項８に記載のモータ駆動回路。
    The signal generation unit adjusts at least two of the connection-on period, the pre-on period, and the post-on period.

    The motor drive circuit according to claim 8, wherein the sum of the adjustment value of the connection-on period, the adjustment value of the front-on period, and the adjustment value of the rear-on period is 0.

  10. 　前記信号生成部は、前記繋ぎオフ期間と、前記前オフ期間と、前記後オフ期間との少なくとも２つを調整し、

    　前記繋ぎオフ期間の調整値と、前記前オフ期間の調整値と、前記後オフ期間の調整値との和は０である、請求項８または請求項９に記載のモータ駆動回路。
    The signal generation unit adjusts at least two of the connection off period, the pre-off period, and the post-off period.

    The motor drive circuit according to claim 8 or 9, wherein the sum of the adjustment value of the connection off period, the adjustment value of the front off period, and the adjustment value of the rear off period is 0.

  11. 　前記繋ぎオンパルスは、複数のパルスを有する、請求項１から請求項１０のいずれか１項に記載のモータ駆動回路。
    The motor drive circuit according to any one of claims 1 to 10, wherein the connected on-pulse has a plurality of pulses.

  12. 　前記繋ぎオフパルスは、複数のパルスを有する、請求項１から請求項１１のいずれか１項に記載のモータ駆動回路。
    The motor drive circuit according to any one of claims 1 to 11, wherein the connection off pulse has a plurality of pulses.

  13. 　請求項１から請求項１２のいずれか１項に記載のモータ駆動回路と、

    　前記モータ駆動回路によって駆動される３相モータとを備える、モータモジュール。
    The motor drive circuit according to any one of claims 1 to 12.

    A motor module including a three-phase motor driven by the motor drive circuit.
PCT/JP2020/048420 2020-09-30 2020-12-24 Motor drive circuit and motor module WO2022070446A1 (en)

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