TWI784727B - Motor drive circuit and motor module - Google Patents

Abstract

The present invention provides a motor driving circuit, which can suppress PWM phase switching from a long on (or off) duration immediately after the PWM signal phase switching. The motor driving circuit 100 includes a first input terminal P, a second input terminal N, a capacitor C, three series bodies 112 and a signal generating unit 120 . The PWM signal includes a positive-phase PWM signal PS and a negative-phase PWM signal NS. The PWM signal further has a connected pulse group AS between the positive phase PWM signal PS and the negative phase PWM signal NS and before and after the phase switching timing tsw. The connected pulse set AS has a connected on-pulse ASon and a connected off-pulse ASoff. The connected on-pulse waves ASon have connected on-durations ATon. The connection-off pulse ASoff has a connection-off period AToff. The phase-on period ATon is shorter than the on-period of one cycle of the PWM cycle before or after the phase switching.

Description

Motor drive circuit and motor module

The invention relates to a motor driving circuit and a motor module.

As a drive method for a three-phase motor, a two-phase modulation method is known (for example, Patent Document 1). The inverter device described in Patent Document 1 includes: a control mechanism for controlling command values of two phases other than one of the three phases that are kept on or off. The triangular fundamental waves are compared respectively, and pulse width modulation (Pulse Width Modulation, PWM) control is performed on switching on and off of each corresponding switching element. The control means switches one of the triangular fundamental waves compared with the command value of one of the three phases kept on or off to the other of the triangular fundamental waves. This makes it possible to reduce the current to and from the capacitor (capacitor ripple current).

[Prior Art Literature]

[Patent Document]

[Patent Document 1] Japanese Patent Laid-Open No. 2006-197707

However, in the inverter device described in Patent Document 1, the PWM signal The switching of the phase is limited to the situation that the switched phase remains on or off. That is, the triangular fundamental wave used for generating the PWM waveform of each phase is fixed to one of the two triangular fundamental waves different in phase by 180 degrees while the phase is switched, and the triangular fundamental wave is not switched during switching. . In addition, when the output voltage pattern as shown in FIG. 4( b ) is given in Patent Document 1, since the motor connected to the output is an inductive load, the current waveform is delayed relative to the voltage waveform. At this time, if PWM control is performed on the two phases being switched with a triangular wave with a phase difference of 180 degrees in a part of the rotation angle section, the reverse flow of current from the inverter to the capacitor will occur, and the effect of reducing the ripple current of the capacitor will be weakened. . Depending on the situation, the total capacitor ripple current may increase compared to the case of using the same triangular wave. In order to suppress this, it is necessary to make the phases of the PWM signals of the two phases being switched different in the rotation angle section in which the current backflow from the inverter to the capacitor does not occur, and to switch the same PWM signal in the rotation angle section in which the backflow occurs. phase. However, in the inverter device described in Patent Document 1, when the phase of the PWM signal is switched while the switched phase is kept on or off, a long delay may occur immediately after the phase of the PWM signal is switched. On (or off) duration.

The present invention is made in view of the above problems, and an object of the present invention is to provide a motor drive circuit and a motor module capable of suppressing PWM phase switching from a long on (or off) duration immediately after switching.

The exemplary motor driving circuit of the present invention controls the driving of a three-phase motor in a two-phase modulation manner. The motor drive circuit includes a first input terminal, a second Input terminal, capacitor, three serial bodies and signal generating part. A first voltage is applied to the first input terminal. A second voltage lower than the first voltage is applied to the second input terminal. The capacitor is connected between the first input terminal and the second input terminal. The three series bodies are two semiconductor switching elements connected in series. The signal generation unit generates PWM signals input to the three serial devices. The PWM signal includes a positive-phase PWM signal and a negative-phase PWM signal. The phase of the inverted PWM signal is different from that of the non-inverted PWM signal. The signal generation unit switches the phase of the PWM signal at a phase switching timing. The PWM signal further has a set of consecutive pulses between the positive-phase PWM signal and the negative-phase PWM signal and before and after the phase switching timing. The set of connected pulse waves has connected on-pulse waves and connected off-pulse waves. The successive on-pulses have successive on-durations. The link-off pulse has a link-off period. The on-duration of the phase is shorter than the on-duration of one cycle of the PWM cycle before or after the phase switching.

An exemplary motor module of the present invention includes the above-mentioned motor drive circuit and a three-phase motor. The three-phase motor is driven by the motor drive circuit.

According to the exemplary invention, switching of the PWM phase can be suppressed from generating a long on (or off) duration immediately after the phase switching of the PWM signal.

100: Motor drive circuit

110: Inverter Department

102, 102u, 102v, 102w: output terminals

112, 112u, 112v, 112w: series body

114, 114u, 114v, 114w: connection points

120: Signal Generation Department

122: Carrier generation unit

124: Voltage command value generator

126: Comparative Department

200:Motor module

AS: connected pulse group

ASoff: connected disconnected pulse

ASon: connected pulse wave

AT: Period of connected pulse groups

AToff: During disconnection

ATon: the period when the connection is on

B: DC voltage source

BS: Front pulse group

BSoff: Before disconnecting the pulse

BSon: before switching on the pulse wave

BToff: Before disconnection period

BTon: before on period

C: Capacitor

CAS: carrier signal

CS: post pulse group

CSoff: After disconnecting the pulse

CSon: After connecting the pulse wave

CToff: after off period

CTon: after the turn-on period

D: rectifier element

Iu, Iv, Iw: output current

M: three-phase motor

N: Second input terminal

NS: Inverted PWM signal

NT: Inverting PWM period

P: first input terminal

PS: Positive phase PWM signal

PT: during positive phase PWM

T: PWM period

Toff: disconnection period

Ton: During the connection

Un, Vn, Wn: the second semiconductor switching element

Up, Vp, Wp: the first semiconductor switching element

V1: first voltage

V2: second voltage

t: time

tsw: phase switching timing

FIG. 1 is a block diagram of a motor module according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an inverter unit.

Fig. 3 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 4 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 5 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 6 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 7 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 8 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 9 is a diagram showing a PWM signal according to an embodiment of the present invention.

FIG. 10 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 11 is a diagram showing a PWM signal according to an embodiment of the present invention.

Fig. 12 is a diagram showing a PWM signal according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, in the figure, the same or corresponding part is attached|subjected with the same reference symbol, and description is not repeated.

A motor according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2 . FIG. 1 is a block diagram of a motor module 200 according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing the inverter unit 110 .

As shown in FIG. 1 , the motor module 200 includes a motor driving circuit 100 and a three-phase motor M. As shown in FIG. The three-phase motor M is driven by a motor drive circuit 100 . The three-phase motor M is, for example, a brushless DC (Direct Current, DC) motor. The three-phase motor M has a U-phase, a V-phase, and a W-phase.

The motor drive circuit 100 controls the drive of the three-phase motor M in a two-phase modulation manner. move. The motor driving circuit 100 includes an inverter unit 110 and a signal generating unit 120 .

The motor drive circuit 100 includes three output terminals 102 . The three output terminals 102 include an output terminal 102u, an output terminal 102v, and an output terminal 102w. The three output terminals 102 output three-phase output voltages and three-phase output currents to the three-phase motor M. Specifically, the output terminal 102u outputs the U-phase output voltage Vu and the U-phase output current Iu to the three-phase motor M. The output terminal 102v outputs a V-phase output voltage Vv and a V-phase output current Iv to the three-phase motor M. The output terminal 102w outputs a W-phase output voltage Vw and a W-phase output current Iw to the three-phase motor M. FIG.

As shown in FIG. 2 , the motor driving circuit 100 includes a first input terminal P, a second input terminal N, a capacitor C and three series bodies 112 . More specifically, in this embodiment, the motor driving circuit 100 includes an inverter unit 110 , and the inverter unit 110 includes a first input terminal P, a second input terminal N, a capacitor C, and three series bodies 112 . The inverter unit 110 further includes a DC voltage source B. Furthermore, the DC voltage source B can also be located outside the inverter unit 110 .

The first voltage V1 is applied to the first input terminal P. The first input terminal P is connected to a DC voltage source B.

The second voltage V2 is applied to the second input terminal N. The second input terminal N is connected to the DC voltage source B. The second voltage V2 is lower than the first voltage V1.

The capacitor C is connected between the first input terminal P and the second input terminal N.

Regarding the three series bodies 112, two semiconductor switching elements are connected in series. The semiconductor switching element is, for example, an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT). Furthermore, the semiconductor switching element can also be other transistors like field effect transistors. The three series bodies 112 include a series body 112u, a series body 112v and a series body 112w. The three serial bodies 112 are connected in parallel with each other. One end of each of the three series bodies 112 is connected to the first input terminal P. As shown in FIG. The other end of each of the three series bodies 112 is connected to the second input terminal N. As shown in FIG. To these semiconductor switching elements, a rectifying element D is connected in parallel with the first input terminal P side (upper side in the drawing) as a cathode and the second input terminal N side (upper side in the drawing) as an anode. When a field effect transistor is used as the semiconductor switching element, a parasitic diode can also be used as the rectifying element.

Each of the three series bodies 112 has a first semiconductor switching element and a second semiconductor switching element. In detail, the series body 112u has a first semiconductor switching element Up and a second semiconductor switching element Un. The series body 112v has a first semiconductor switching element Vp and a second semiconductor switching element Vn. The series body 112w has a first semiconductor switching element Wp and a second semiconductor switching element Wn.

The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are connected to the first input terminal P. As shown in FIG. In other words, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are semiconductor switching elements on the high voltage side.

The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are connected to the second input terminal N. In other words, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are low-voltage side semiconductor switching elements.

The first semiconductor switching element and the second semiconductor switching element are connected at the connection point 114 . In detail, the first semiconductor switching element Up is connected to the second semiconductor switching element Un at the connection point 114u. The first semiconductor switching element Vp is connected to the second semiconductor switching element Vn at a connection point 114v. The first semiconductor switching element Wp is connected to the second semiconductor switching element Wn at a connection point 114w.

The respective connection points 114 of the three series bodies 112 are connected to the three output terminals 102 . Specifically, the connection point 114u of the series body 112u is connected to the output terminal 102u. The connection point 114v of the series body 112v is connected to the output terminal 102v. The connection point 114w of the series body 112w is connected to the output terminal 102w.

A PWM signal is input to the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp. The PWM signal is output from the signal generator 120 . Hereinafter, in this specification, the PWM signal input to the first semiconductor switching element Up may be described as "UpPWM signal". In addition, the PWM signal input to the first semiconductor switching element Vp may be described as "VpPWM signal". The PWM signal input to the first semiconductor switching element Wp is sometimes described as "WpPWM signal". The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are switched on and off in a predetermined PWM period. For example, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are respectively turned on when the UpPWM signal, the VpPWM signal, and the WpPWM signal are at HIGH levels. On the other hand, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are respectively low when the UpPWM signal, the VpPWM signal, and the WpPWM signal are low. (LOW) level situation is disconnected.

A PWM signal is input to the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn. The PWM signal is output from the signal generator 120 . Hereinafter, in this specification, the PWM signal input to the 2nd semiconductor switching element Un may be described as "UnPWM signal". In addition, the PWM signal input to the second semiconductor switching element Vn may be described as "VnPWM signal". The PWM signal input to the second semiconductor switching element Wn is sometimes described as "WnPWM signal". The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are switched on and off in a predetermined PWM cycle. For example, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are respectively turned on when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at HIGH levels. On the other hand, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are respectively turned off when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at a low (LOW) level.

As shown in FIG. 1 , the signal generation unit 120 has a carrier generation unit 122 , a voltage command value generation unit 124 , and a comparison unit 126 . The signal generating unit 120 is a hardware circuit, including a processor like a central processing unit (Central Processing Unit, CPU) and an application specific integrated circuit (Application Specific Integrated Circuit, ASIC). Furthermore, the processor of the signal generating unit 120 functions as the carrier wave generating unit 122 , the voltage command value generating unit 124 , and the comparing unit 126 by executing the computer program stored in the storage device.

The signal generation unit 120 controls the inverter unit 110 . Specifically, the signal generating unit 120 generates a PWM signal and outputs the PWM signal, thereby controlling the inverter unit 110 . More specifically, the signal generator 120 generates a PWM signal input to each of the three cascodes 112 .

The carrier generation unit 122 generates a carrier signal. The carrier signal is, for example, a triangle wave. Furthermore, the carrier signal can also be a sawtooth wave.

The voltage command value generator 124 generates a voltage command value. The voltage command value corresponds to the voltage value output from the motor drive circuit 100 . That is, the voltage command value generator 124 generates voltage values corresponding to the output voltage Vu, the output voltage Vv, and the output voltage Vw as the voltage command value.

The comparison unit 126 generates a PWM signal by comparing the carrier signal with the voltage command value.

The PWM signal of the embodiment of the present invention will be described with reference to FIGS. 1 to 3 . Fig. 3 is a diagram showing a PWM signal according to an embodiment of the present invention. In FIG. 3 , the PWM signal of one phase among the three-phase PWM signals is shown. In FIG. 3 , the positive-phase PWM period PT is a period during which the positive-phase PWM signal PS is output. In addition, the inverted PWM period NT is a period in which the inverted PWM signal NS is output. In addition, the continuous pulse group period AT is a period during which the continuous pulse group AS is output. Regarding the current waveform, the effects of the switching of other phases on the current ripple are ignored, and only the switching ripple component caused by the switching of this phase is extracted and illustrated.

As shown in FIG. 3 , the PWM signal includes a positive-phase PWM signal PS and a negative-phase PWM signal NS. The phase of the inverted PWM signal NS is the same as that of the positive phase PWM signal PS different. In this embodiment, the phase of the inverted PWM signal NS is shifted by 180 degrees from the normal phase PWM signal PS.

The signal generator 120 generates a PWM signal by comparing the carrier signal CAS with the voltage command value V. Referring to FIG. The signal generator 120 switches the phase of the PWM signal at the phase switching timing tsw. Here, the signal generator 120 switches the phase of the PWM signal from positive phase to negative phase at the phase switching timing tsw. That is, before the phase switching timing tsw, the phase of the PWM signal is positive. On the other hand, after the phase switching timing tsw, the phase of the PWM signal is reversed. In this embodiment, the phase switching timing tsw is the timing of the peak of the carrier signal CAS. In this embodiment, the carrier signal CAS is a triangle wave.

The signal generator 120 changes the voltage command value V at the phase switching timing tsw. Here, the signal generator 120 changes the voltage command value from V to 1-V. The comparison unit 126 compares the voltage command value with the carrier signal CAS to generate a PWM signal. Specifically, when the phase of the PWM signal is positive, the PWM signal is turned off when the carrier signal CAS is greater than or equal to the voltage command value. On the other hand, the comparison unit 126 compares the voltage command value with the carrier signal CAS, and turns on the PWM signal when the carrier signal CAS is smaller than the voltage command value. On the other hand, when the phase of the PWM signal is reversed, when the carrier signal CAS is equal to or higher than the voltage command value, the PWM signal is turned on. On the other hand, the comparison unit 126 compares the voltage command value with the carrier signal CAS, and turns off the PWM signal when the carrier signal CAS is smaller than the voltage command value. In this way, the signal generation unit 120 changes the phase of the PWM signal by changing the voltage command value and the determination process method of the comparison unit 126 .

The PWM signal further has a connected pulse group AS between the positive phase PWM signal PS and the negative phase PWM signal NS and before and after the phase switching timing tsw. The connected pulse set AS has a connected on-pulse ASon and a connected off-pulse ASoff. The connected on-pulse waves ASon have connected on-durations ATon. The connection-off pulse ASoff has a connection-off period AToff. The connected pulse set AS is located in a time range within one cycle of PWM before and after the phase switching timing tsw.

The phase-on period ATon is shorter than the on-period of one cycle of the PWM cycle before or after the phase switching. In the present embodiment, the continuous on-period ATon is shorter than the one-period on-period Ton of the PWM cycle before phase switching. Specifically, the continuous on-period ATon is 1/2 the length of the on-period Ton of one cycle of the PWM cycle before the phase switching. That is, ATon=Ton/2.

The PWM signal has a continuous pulse set AS between the positive phase PWM signal PS and the negative phase PWM signal NS and before and after the phase switching timing tsw. Therefore, for one of the phases in the PWM control, switching of the PWM phase can be suppressed from occurring for a long on (or off) duration immediately after the phase switching of the PWM signal. As a result, it is possible to suppress torque fluctuation or noise due to an unexpected increase or decrease in phase current immediately after the phase switching of the PWM signal, and reduce capacitor ripple current.

In addition, the consecutive pulse group AS is located within a time range within one cycle of PWM before and after the phase switching timing tsw. Therefore, it is possible to switch the PWM phase immediately after the phase switching of the PWM signal which tends to generate a long on (or off) duration, while suppressing the occurrence of a long on (or off) duration. As a result, it is possible to suppress torque fluctuation or noise caused by an unexpected increase or decrease in phase current, and to reduce capacitor ripple. wave current.

In addition, the continuous off-period AToff is shorter than the off-period of one cycle of the PWM cycle before or after the phase switching. Therefore, it is possible to suppress torque fluctuation or noise due to an unexpected increase or decrease in phase current, and to reduce capacitor ripple current. In this embodiment, the continuous off-period AToff is shorter than the off-period Toff of one cycle of the PWM cycle before phase switching. Specifically, the continuous off-period AToff is 1/2 the length of the off-period Toff of one cycle of the PWM cycle before the phase switching. That is, AToff=Toff/2.

In addition, the ratio of the continuous on-period ATon to the continuous off-period AToff is the same as the ratio of the on-period Ton to the off-period Toff of one cycle of the PWM cycle before or after phase switching. Therefore, like the current waveform shown in FIG. 3 , the fluctuation of the average current before and after the phase switching can be suppressed, and the torque fluctuation and noise of the motor can be further suppressed. Furthermore, the ratio of the on-duration ATon to the off-duration AToff may be slightly different from the ratio of the on-duration Ton to the off-duration Toff of one cycle of the PWM cycle before or after the phase switching.

In addition, the off-period AToff is prior to the on-period ATon, and the ratio of the off-period to the period of the connected pulse set AS is the same as the ratio of the off-period to the PWM period before the phase switching. In addition, the ratio of the on-duration to the period of the continuous pulse set AS is the same as the ratio of the on-duration to the PWM cycle after the phase switching. Therefore, like the current waveform shown in FIG. 3 , the current value at the end of the AS period of the connected pulse group almost coincides with the peak value of the current wave before the phase switching. Therefore, fluctuations in the average current before and after phase switching can be suppressed, and further Torque fluctuation or noise of the motor. Furthermore, the ratio of the disconnection period to the period of the connected pulse set AS may be slightly different from the ratio of the disconnection period to the PWM cycle before the phase switching. In addition, the ratio of the on-duration to the period of the connected pulse set AS may be slightly different from the ratio of the on-duration to the PWM period after phase switching.

In addition, the cycle of the connected pulse group AS is 1/2 of the PWM cycle before or after the phase switching. That is, AT=T/2. Therefore, fluctuations in the average current before and after phase switching can be suppressed, and torque fluctuation and noise of the motor can be further suppressed.

Furthermore, the connected on-pulse wave ASon may also have multiple pulse waves. Even in the situation that the connected ON pulse ASon has multiple pulses, the ripple current of the capacitor can be reduced.

Furthermore, the continuous off-pulse ASoff can also have multiple pulses. Even when there are multiple pulses in the connection-off pulse ASoff, the ripple current of the capacitor can be reduced.

According to the above configuration, even if switching between normal-phase PWM and reverse-phase PWM is performed for the phase being switched, fluctuations in the average current can be suppressed, and torque fluctuations and noises of the motor can be suppressed. Therefore, it is possible to perform an operation in which inversion PWM is applied in a rotation angle section in which capacitor ripple current can be suppressed more when inversion PWM is applied to one of the two phases being switched, and if applicable Inverting PWM reversely generates a reverse current to the capacitor and degrades the ripple current of the capacitor in the rotation angle interval. Applying positive-phase PWM, etc., can effectively suppress the ripple current of the capacitor and suppress the heat dissipation of the capacitor, and realize the miniaturization and low temperature of the capacitor. costing. At the same time, it is possible to suppress torque fluctuation and noise of the motor accompanying the switching between the normal phase PWM and the reverse phase PWM. two-phase modulation In the method, for example, when switching the modulation method in which the non-switching phase is fixed to the ON period and the OFF period is switched in units of 60 degrees of electrical rotation angle, the current waveform may be different from the voltage waveform. Delay results in a rotation angle section in which capacitor ripple current deteriorates if inverting PWM is applied. Therefore, by using this embodiment to switch the PWM phases of the phases being switched so that the PWM phases of the two phases to be switched become the same phase only in such a rotation angle section, torque fluctuation of the motor can be suppressed. or noise and suppress capacitor ripple current. In addition, in the two-phase modulation method, when the non-switching phase is fixed only to the ON method or only to the OFF method, the rotation angle at which the ripple current of the capacitor is reduced by applying reverse-phase PWM The section overlaps with the rotation angle section in which the ripple current of the capacitor deteriorates when the reverse-phase PWM is applied, in units of 60 degrees of electrical rotation angle. Therefore, by using the present embodiment to switch the PWM phases of the two phases switched in the former rotation angle section so that the PWM phases of the two phases switched in the latter rotation angle section are the same phase. The PWM phase of the phase can suppress the torque fluctuation or noise of the motor and suppress the ripple current of the capacitor. The switching timing of the non-inverting PWM and the inverting PWM can be based on the zero-crossing point of the motor current.

Next, referring to FIG. 1 , FIG. 2 and FIG. 4 , the switching of the PWM signal from the negative phase to the normal phase according to the embodiment of the present invention will be described. Fig. 4 is a diagram showing a PWM signal according to an embodiment of the present invention.

As shown in FIG. 4 , the signal generating unit 120 switches the phase of the PWM signal from negative phase to positive phase at the phase switching timing tsw.

Same as the PWM signal shown in Figure 3, the PWM signal is in the positive phase PWM Between the signal PS and the inverted PWM signal NS and before and after the phase switching timing tsw, there is a connected pulse set AS. Therefore, it is possible to switch the PWM phase immediately after the phase switching of the PWM signal which tends to generate a long on (or off) duration, while suppressing the occurrence of a long on (or off) duration. As a result, generation of torque ripple or noise can be suppressed, and capacitor ripple current can be reduced.

The phase-on period ATon is 1/2 the length of the on-period Ton of one cycle of the PWM cycle before the phase switching. That is, ATon=Ton/2.

The continuous off-period AToff is 1/2 of the off-period Toff of one cycle of the PWM cycle before the phase switching. That is, AToff=Toff/2.

In addition, the on-duration ATon is prior to the off-duration AToff, and the ratio of the on-duration to the duration of the connected pulse set AS is the same as the ratio of the on-duration before phase switching to the PWM period. In addition, the ratio of the disconnection period to the period of the connected pulse set AS is the same as the ratio of the disconnection period to the PWM period after phase switching. Therefore, like the current waveform shown in FIG. 4 , the fluctuation of the average current before and after the phase switching can be suppressed, and the torque fluctuation and noise of the motor can be further suppressed. Furthermore, the ratio of the on-duration to the period of the connected pulse set AS may be slightly different from the ratio of the on-duration to the PWM cycle before the phase switching. In addition, the ratio of the disconnection period to the period of the connected pulse set AS may be slightly different from the ratio of the disconnection period to the PWM period after phase switching.

Like the current waveform shown in FIG. 4 , in the case of switching the phase from reverse to positive, the change of the average current before and after the phase switch can also be suppressed, and the torque fluctuation or noise of the motor can be further suppressed.

Furthermore, in the example described with reference to FIG. 3 and FIG. 4 , the phase switching timing tsw is the timing of the peak of the carrier signal CAS, but the phase switching timing tsw can also be shifted from the timing of the peak of the carrier signal CAS.

Referring to Fig. 1, Fig. 2 and Fig. 5, the PWM signal of the embodiment of the present invention will be described. Fig. 5 is a diagram showing a PWM signal according to an embodiment of the present invention.

As shown in FIG. 5 , in addition to the positive phase PWM signal PS, the negative phase PWM signal NS and the connected pulse set AS, the PWM signal further has a front pulse set BS and a back pulse set CS. The preceding pulse set BS is located before the connected pulse set AS. The subsequent pulse set CS is located after the connected pulse set AS.

The front pulse set BS has a front on pulse BSon and a front off pulse BSoff. The previous ON pulse BSon has a previous ON period BTon. The pre-off pulse BSoff has a pre-off period BToff. The period of the preceding pulse wave group BS is the same as that of the preceding PWM signal, that is, it is the same as that of the positive-phase PWM signal PS in this embodiment.

The back pulse set CS has a back on pulse CSon and a back off pulse CSoff. The back-on pulse CSon has a back-on period CTon. The post-off pulse CSoff has a post-off period CToff. The period of the latter pulse group CS is the same as that of the PWM signal which is later than it, that is, it is the same as the inverted PWM signal NS in this embodiment.

The phase switching timing tsw is delayed by time t from the timing of the peak of the carrier signal CAS.

The signal generator 120 adjusts the pulse lengths of at least two of the consecutive pulse set AS, the preceding pulse set BS, and the following pulse set CS. In this embodiment, the signal generator 120 adjusts the pulse lengths of the consecutive pulse set AS and the subsequent pulse set CS.

In this embodiment, the phase switching timing tsw is delayed by time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of turning on (turn on) accompanying switching is delayed by time t. Therefore, the signal generation unit 120 adjusts the successive on-period ATon and the subsequent on-period CTon in such a manner as to compensate for the delay time t. Specifically, the signal generator 120 increases the voltage command value from 1-V in such a manner that the consecutive on-period ATon and the subsequent on-period CTon are respectively extended by t/2 compared with the case where the voltage command value is set to 1-V. The value of V offset is set as a voltage command value. That is, the signal generator 120 shifts the voltage command value by a value corresponding to time t/2 in terms of the pulse length.

At this time, the connection-off period AToff becomes Toff/2+t because the on-time of switching is delayed by time t. That is, AToff=Toff/2+t.

In addition, the turn-on delay time t of the on-period ATon is connected, and the turn-off (turn off) is also delayed by t/2 due to the deviation of the voltage command value, so it becomes Ton/2-t/2. That is, ATon=Ton/2-t/2.

In addition, the post-off period CToff shortens the time t due to the shift in the voltage command value, and becomes Toff-t. That is, CToff=Toff-t.

In addition, the post-turn-on period CTon is delayed by t/2 due to a shift in the voltage command value, and becomes Ton+t/2. That is, CTon=Ton+t/2.

The signal generating unit 120 adjusts at least two of the consecutive on-period ATon, the previous on-period BOn, and the post-on period CTon. In the present embodiment, the signal generating unit 120 adjusts the successive on-period ATon and the post-on-period CTon. The sum of the adjustment value of the subsequent ON period ATon, the adjustment value of the previous ON period BTon and the adjustment value of the latter ON period CTon is zero. In this embodiment, during the connection period ATon When the adjusted value of t1a is set, the adjusted value of BTon in the front turn-on period is set to t1b, and the adjusted value of CTon in the later turn-on period is set to t1c, t1a=-t/2, t1b=0, t1c=t/ 2. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the continuous off period AToff, the front off period BToff and the back off period CToff. In this embodiment, the signal generation unit 120 adjusts the continuous off-period AToff and the post-off period CToff. The sum of the adjustment value of AToff during continuous disconnection, the adjustment value of BToff in the previous disconnection period and the adjustment value of CToff in the latter disconnection period is 0. When the adjustment value of the continuous off-period AToff is set to t2a, the adjusted value of the previous off-period BToff is set to t2b, and the adjusted value of the post-off period CToff is set to t2c, t2a=t, t2b=0, t2c=-t. Therefore, t2a+t2b+t2c=0.

As described with reference to FIG. 1 , FIG. 2 and FIG. 5 , the signal generator 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave set AS, the preceding pulse wave set BS and the following pulse wave set CS. Furthermore, compared with the PWM signal shown in FIG. 3 , the on-time and the total time of each of the on-time do not change. Therefore, fluctuations in the average current accompanying the switching operation can be suppressed. Furthermore, in the example shown in FIG. 3, at the moment of the phase switching timing tsw, the current amplitude becomes ΔI/2, and the current waveform in the period of the continuous pulse group AS is temporarily shifted to the high side. However, in the example shown in FIG. 5, Deviations in current waveforms are suppressed. Therefore, fluctuations in the average current accompanying the switching operation can be further suppressed. As the value of t, for example, by setting it at 2%~10% of the period of the carrier signal CAS, the variation of the average current can be effectively suppressed.

Then, with reference to Fig. 1, Fig. 2 and Fig. 6, to the embodiment of the present invention The switching of the PWM signal from negative phase to positive phase is described. Fig. 6 is a diagram showing a PWM signal according to an embodiment of the present invention.

As shown in FIG. 6 , the signal generating unit 120 switches the phase of the PWM signal from negative phase to positive phase at the phase switching timing tsw. Similar to the embodiment shown in FIG. 5 , the phase switching timing tsw is delayed by time t from the timing of the peak of the carrier signal CAS.

In this embodiment, the phase switching timing tsw is delayed by time t from the timing of the peak of the carrier signal CAS. Therefore, the moment of turning off with switching is delayed by time t. Therefore, the signal generation unit 120 adjusts the continuous off-period AToff and the post-off period CToff in a manner of compensating for the delay time t. Specifically, the signal generator 120 shifts the voltage command value from V so that the continuous off period AToff and the post-off period CToff are respectively extended by t/2 compared with the case where the voltage command value is V. The value is set to the voltage command value.

At this time, the on-period ATon of the link is Ton/2+t because the timing of turning off due to switching is delayed by time t. That is, ATon=Ton/2+t.

In addition, the turn-off delay time t of AToff during the connection-off period is also delayed by t/2 due to the offset of the voltage command value, so it becomes Toff/2-t/2. That is, AToff=Toff/2-t/2.

In addition, the post-turn-on period CTon is shortened by time t due to a shift in the voltage command value, and becomes Ton-t. That is, CTon=Ton-t.

In addition, the post-off period CToff is delayed by t/2 due to a shift in the voltage command value, and becomes Toff+t/2. That is, CToff=Toff+t/2.

The signal generator 120 adjusts the successive on-period ATon, the previous on-period At least two of BTon and post-turn-on period CTon. In the present embodiment, the signal generating unit 120 adjusts the successive on-period ATon and the post-on-period CTon. The sum of the adjustment value of the subsequent ON period ATon, the adjustment value of the previous ON period BTon and the adjustment value of the latter ON period CTon is zero. In the present embodiment, when the adjustment value of the consecutive ON period ATon is t1a, the adjustment value of the previous ON period BTon is t1b, and the adjustment value of the subsequent ON period CTon is t1c, t1a=t , t1b=0, t1c=-t. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the continuous off period AToff, the front off period BToff and the back off period CToff. In this embodiment, the signal generation unit 120 adjusts the continuous off-period AToff and the post-off period CToff. The sum of the adjustment value of AToff during continuous disconnection, the adjustment value of BToff in the previous disconnection period and the adjustment value of CToff in the latter disconnection period is 0. When the adjustment value of the consecutive off-period AToff is set to t2a, the adjusted value of the previous off-period BToff is set to t2b, and the adjusted value of the post-off period CToff is set to t2c, t2a=-t/2, t2b =0, t2c=t/2. Therefore, t2a+t2b+t2c=0.

As described with reference to FIG. 1 , FIG. 2 and FIG. 6 , the signal generating unit 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave set AS, the preceding pulse wave set BS and the following pulse wave set CS. Furthermore, compared with the PWM signal shown in FIG. 4, the on-time and the total time of each of the on-time do not change. Therefore, fluctuations in the average current accompanying the switching operation can be suppressed. Furthermore, in the example shown in FIG. 4, at the moment of the phase switching timing tsw, the current amplitude becomes ΔI/2, and the current waveform in the period of the continuous pulse group AS is temporarily shifted to the low side. However, in the example shown in FIG. 6, Deviations in current waveforms are suppressed. therefore, It is possible to further suppress fluctuations in the average current accompanying the switching operation. As the value of t, for example, by setting it at 2%~10% of the period of the carrier signal CAS, the variation of the average current can be effectively suppressed.

Furthermore, in the example described with reference to FIG. 5 , the signal generator 120 shifts the voltage command value by a value corresponding to time t/2 when converted into the pulse wavelength, but it is also possible to shift the voltage command value by converting into the pulse wavelength. Equivalent to the value offset at time t.

Referring to Fig. 1, Fig. 2 and Fig. 7, the PWM signal of the embodiment of the present invention will be described. Fig. 7 is a diagram showing a PWM signal according to an embodiment of the present invention.

In this embodiment, the phase switching timing tsw is delayed by time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of turning on with switching is delayed by time t. Therefore, the signal generation unit 120 adjusts the successive on-period ATon and the subsequent on-period CTon in such a manner as to compensate for the delay time t. Specifically, the signal generation unit 120 offsets the voltage command value from 1-V by extending the continuous on-period ATon and the subsequent on-period CTon by t compared with the case where the voltage command value is set to 1-V. The shifted value is set as the voltage command value. That is, the signal generator 120 shifts the voltage command value by a value corresponding to the time t in terms of the pulse length.

At this time, the connection-off period AToff becomes Toff/2+t because the timing of switching on is delayed by time t. That is, AToff=Toff/2+t.

In addition, the turn-on delay time t of the on-period ATon is connected, and the turn-off is also delayed by t due to the deviation of the voltage command value, so it becomes Ton/2. That is, ATon=Ton/2.

In addition, when CToff is shortened due to a shift in the voltage command value during the post-off period Between t, become Toff-t. That is, CToff=Toff-t.

In addition, CTon becomes Ton during the post-ON period. That is, CTon=Ton.

In the present embodiment, the signal generation unit 120 does not adjust the consecutive on-period ATon, the previous on-period BTon, and the post-on-period CTon.

The signal generating unit 120 adjusts at least two of the continuous off period AToff, the front off period BToff and the back off period CToff. In this embodiment, the signal generation unit 120 adjusts the continuous off-period AToff and the post-off period CToff. The sum of the adjustment value of AToff during continuous disconnection, the adjustment value of BToff in the previous disconnection period and the adjustment value of CToff in the latter disconnection period is 0. When the adjustment value of the continuous off-period AToff is set to t2a, the adjusted value of the previous off-period BToff is set to t2b, and the adjusted value of the post-off period CToff is set to t2c, t2a=t, t2b=0, t2c=-t. Therefore, t2a+t2b+t2c=0.

As described with reference to FIG. 1 , FIG. 2 and FIG. 7 , the signal generator 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave set AS, the preceding pulse wave set BS and the following pulse wave set CS. Furthermore, compared with the PWM signal shown in FIG. 4, the on-time and the total time of each of the on-time do not change. Therefore, fluctuations in the average current accompanying the switching operation can be suppressed. Furthermore, in this example, as the value of t, for example, by setting 5%-20% of the period of the carrier signal CAS, the variation of the average current can be effectively suppressed.

Furthermore, in the examples described with reference to FIGS. 5 to 7 , the signal generating unit 120 adjusts the successive on-period ATon and the subsequent on-period CTon in a manner to compensate for the delay time t, but the signal generating unit 120 may also compensate for the delay time t way to adjust the front-on period BTon.

Referring to FIG. 1, FIG. 2 and FIG. 8, the PWM signal of the embodiment of the present invention will be described. Fig. 8 is a diagram showing a PWM signal according to an embodiment of the present invention.

In this embodiment, the phase switching timing tsw is delayed by time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of turning on with switching is delayed by time t. Therefore, the signal generation unit 120 adjusts the pre-ON period BTon to compensate the delay time t in advance. Specifically, the signal generator 120 sets a value shifting the voltage command value from V as the voltage command value so that the front ON period BTon is longer than when the voltage command value is V. More specifically, the signal generator 120 shifts the voltage command value from V in such a way that the turn-on time of the previous on-pulse BSon is advanced by t/2 and the off-time of the previous on-pulse BSon is delayed by t/2. The value of is set to the voltage command value. That is, the signal generator 120 shifts the voltage command value by a value corresponding to time t/2 in terms of the pulse length.

At this time, the pre-off period BToff is shortened by time t/2 due to the shift in the voltage command value, and becomes Toff-t/2. That is, BToff=Toff-t/2.

In addition, the previous turn-on period BTon is turned on earlier by t/2 and turned off by t/2 due to the deviation of the voltage command value, so it becomes Ton+t. That is, BTon=Ton+t.

In addition, the connection-off period AToff is Toff/2+t/2 due to the off-delay time t/2 and the time t when switching on is delayed. That is, AToff=Toff/2+t/2.

In addition, the continuous on-period ATon becomes Ton/2-t because of the on-delay time t. That is, ATon=Ton/2-t.

The signal generating unit 120 adjusts at least two of the consecutive on-period ATon, the previous on-period BOn, and the post-on period CTon. In this embodiment, the signal generator 120 adjusts the successive on-period ATon and the previous on-period BOn. The sum of the adjustment value of the subsequent ON period ATon, the adjustment value of the previous ON period BTon and the adjustment value of the latter ON period CTon is zero. In the present embodiment, when the adjustment value of the continuous on-period ATon is t1a, the adjustment value of the previous on-period BOn is t1b, and the adjustment value of the post-on period CTon is t1c, t1a=- t, t1b=t, t1c=0. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the continuous off period AToff, the front off period BToff and the back off period CToff. In this embodiment, the signal generation unit 120 adjusts the continuous off-period AToff and the previous off-period BToff. The sum of the adjustment value of AToff during continuous disconnection, the adjustment value of BToff in the previous disconnection period and the adjustment value of CToff in the latter disconnection period is 0. When the adjustment value of the continuous off-period AToff is set to t2a, the adjusted value of the previous off-period BToff is set to t2b, and the adjusted value of the post-off period CToff is set to t2c, t2a=t/2, t2b= -t/2, t2c=0. Therefore, t2a+t2b+t2c=0.

As described with reference to FIG. 1 , FIG. 2 and FIG. 8 , the signal generator 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave set AS, the preceding pulse wave set BS and the following pulse wave set CS. Furthermore, compared with the PWM signal shown in FIG. 4, the on-time and the total time of each of the on-time do not change. Therefore, fluctuations in the average current accompanying the switching operation can be suppressed.

Furthermore, in the examples described with reference to Figs. 5 to 8, the phase switching timing The timing of tsw from the peak of the carrier signal CAS is delayed, but the phase switching timing tsw may be earlier than the timing of the peak of the carrier signal CAS.

Referring to FIG. 1 , FIG. 2 and FIG. 9 , the PWM signal according to the embodiment of the present invention will be described. Fig. 9 is a diagram showing a PWM signal according to an embodiment of the present invention.

In this embodiment, the phase switching timing tsw is advanced by time t from the timing of the peak of the carrier signal CAS. Therefore, the timing of turning on with switching is advanced by time t. Therefore, the signal generator 120 adjusts the pre-ON period BOn by adjusting the advance time t. Specifically, the signal generation unit 120 sets a value shifting the voltage command value from V as the voltage command value so that the front-on period BTon is shortened by t compared with the case where the voltage command value is V. In more detail, the signal generator 120 will shift the voltage command value from V by delaying the turn-on time of the previous on-pulse BSon by t/2, and the turn-off time of the previous on-pulse BSon earlier by t/2. The value of is set to the voltage command value. That is, the signal generator 120 shifts the voltage command value by a value corresponding to the time t/2 in terms of the pulse length.

At this time, the pre-off period BToff becomes Toff+t/2 due to the off delay time t/2. That is, BToff=Toff+t/2.

In addition, due to the offset of the voltage command value, the turn-on delay time BTon is t/2, and the turn-off time is t/2 earlier, so it becomes Ton-t. That is, BTon=Ton-t.

In addition, the continuous disconnection period AToff is Toff/2-t/2 because the shutdown is earlier by t/2, and the timing of the on-time associated with switching is earlier by t. That is, AToff=Toff/2-t/2.

In addition, the continuous on-period ATon becomes Ton/2+t because the on-time is advanced by t. That is, ATon=Ton/2+t.

The signal generating unit 120 adjusts at least two of the consecutive on-period ATon, the previous on-period BOn, and the post-on period CTon. In this embodiment, the signal generator 120 adjusts the successive on-period ATon and the previous on-period BOn. The sum of the adjustment value of the subsequent ON period ATon, the adjustment value of the previous ON period BTon and the adjustment value of the latter ON period CTon is zero. In the present embodiment, when the adjustment value of the consecutive ON period ATon is t1a, the adjustment value of the previous ON period BTon is t1b, and the adjustment value of the subsequent ON period CTon is t1c, t1a=t , t1b=-t, t1c=0. Therefore, t1a+t1b+t1c=0.

The signal generating unit 120 adjusts at least two of the continuous off period AToff, the front off period BToff and the back off period CToff. In this embodiment, the signal generation unit 120 adjusts the continuous off-period AToff and the previous off-period BToff. The sum of the adjustment value of AToff during continuous disconnection, the adjustment value of BToff in the previous disconnection period and the adjustment value of CToff in the latter disconnection period is 0. When the adjustment value of the consecutive off-period AToff is set to t2a, the adjusted value of the previous off-period BToff is set to t2b, and the adjusted value of the post-off period CToff is set to t2c, t2a=-t/2, t2b =t/2, t2c=0. Therefore, t2a+t2b+t2c=0.

As described with reference to FIG. 1 , FIG. 2 and FIG. 9 , the signal generator 120 adjusts the pulse wavelengths of at least two of the consecutive pulse wave set AS, the preceding pulse wave set BS and the following pulse wave set CS. Furthermore, compared with the PWM signal shown in FIG. 4, the on-time and the total time of each of the on-time do not change. Therefore, it is possible to suppress the average electric current associated with the switching operation flow changes.

Furthermore, in the examples described with reference to FIGS. 3 to 9 , the carrier signal CAS is a triangular wave, but the carrier signal CAS can also be a sawtooth wave.

Referring to FIG. 1 , FIG. 2 and FIG. 10 , the PWM signal according to the embodiment of the present invention will be described. FIG. 10 is a diagram showing a PWM signal according to an embodiment of the present invention.

As shown in FIG. 10 , in this embodiment, the carrier signal CAS is a sawtooth wave. Here, the signal generator 120 switches the phase of the PWM signal from positive phase to negative phase at the phase switching timing tsw.

The PWM signal includes a positive-phase PWM signal PS, a negative-phase PWM signal NS, a connected pulse set AS, a front pulse set BS, and a back pulse set CS.

In order to suppress the variation of the average current accompanying the switching operation of the phase of the PWM signal, it is preferable to make the current Ia at the time of turning on of the preceding on-pulse BSon and the current Ib at the time of turning on of the following on-pulse CSon coincide as much as possible. That is, it is preferable to set the consecutive on-period ATon so that the current decreases by ΔI during the time 2Toff from turning off the preceding on-pulse BSon to turning on the latter on-pulse CSon.

If the current is turned on for the time Ton, the current increases by ΔI, and if it is turned off for the time Toff, the current decreases by ΔI. Therefore, ATon is preferably set as T=Ton+Toff during the continuous on-time as ATon=Toff×Ton/T.

When ATon=Toff×Ton/T is set, the off-period from the front-on pulse BSon to the back-on pulse CSon is 2Toff-ATon=Toff×(1+Toff/T). The current rise during the turn-on period is △I×ATon/Ton=△I. Toff/T. The current during the off period is reduced to △I×Toff×(1+Toff/T)/Toff=△I +△I． Toff/T. Therefore, the difference between the current rise during the ON period and the current decrease during the OFF period, that is, the current decrease from turning off the previous ON pulse BSon to turning on the latter ON pulse CSon is ΔI. Therefore, the ON current Ia of the preceding ON pulse wave BSon and the ON current Ib of the subsequent ON pulse CSon can be made to match. As a result, fluctuations in the average current accompanying the switching operation of the phase of the PWM signal can be suppressed.

The signal generator 120 sets a voltage command value shifted from 1−V to the voltage command value so that the continuous on-period ATon becomes Toff×Ton/T at the phase switching timing tsw.

Next, referring to FIG. 1 , FIG. 2 and FIG. 11 , the switching from the reverse phase to the normal phase of the PWM signal according to the embodiment of the present invention will be described. Fig. 11 is a diagram showing a PWM signal according to an embodiment of the present invention.

As shown in FIG. 11 , in this embodiment, the carrier signal CAS is a sawtooth wave. Here, the signal generating unit 120 switches the phase of the PWM signal from negative phase to normal phase at the phase switching timing tsw.

The PWM signal includes a positive-phase PWM signal PS, a negative-phase PWM signal NS, a connected pulse set AS, a front pulse set BS, and a back pulse set CS.

In this embodiment, the consecutive on-pulse wave ASon of the consecutive pulse wave group AS is connected to the subsequent on-pulse wave CSon of the subsequent pulse wave group CS.

In order to suppress the variation of the average current accompanying the switching operation of the phase of the PWM signal, it is preferable to make the current Ic at the time of turning on of the preceding on-pulse BSon and the current Id at the time of turning on of the following on-pulse CSon coincide as much as possible. That is, it is preferable to use the time T from turning off the front-on pulse BSon to turning on the back-on pulse CSon During the period, the current decreases by △I, and the phase-on period ATon is set.

If the current is turned on for the time Ton, the current increases by ΔI, and if it is turned off for the time Toff, the current decreases by ΔI. Therefore, ATon is preferably set as T=Ton+Toff during the continuous on-time as ATon=Ton-TonToff/T.

When ATon=Ton-TonToff/T is set, the off-period from the front-on pulse BSon to the back-on pulse CSon is Toff+TonToff/T. The current rise during the turn-on period is △I×ATon/Ton=△I-△I. Toff/T. The current during the disconnection period is reduced to △I×(Toff+TonToff/T)/Toff=△I+△I. Ton/T. Therefore, the difference between the current rise during the ON period and the current decrease during the OFF period, that is, the current decrease from turning off the previous ON pulse BSon to turning on the latter ON pulse CSon is ΔI. Therefore, the current Ic at the turn-on of the preceding on-pulse wave BSon can be made to match the current Id at the time of turning on the post-on pulse wave CSon. As a result, fluctuations in the average current accompanying the switching operation of the phase of the PWM signal can be suppressed.

The signal generating unit 120 sets a voltage command value shifted from V as the voltage command value so that the continuous on-period ATon becomes Ton−TonToff/T at the phase switching timing tsw.

In addition, in the examples described with reference to FIGS. 3 to 11 , the voltage command value was changed, but the voltage command value may be constant.

Referring to FIG. 1 , FIG. 2 and FIG. 12 , the PWM signal according to the embodiment of the present invention will be described. Fig. 12 is a diagram showing a PWM signal according to an embodiment of the present invention.

As shown in FIG. 12, in this embodiment, the voltage command value is constant. In this embodiment, the phase of the carrier signal CAS is changed at the phase switching timing tsw. Specifically, at the phase switching timing tsw, the carrier signal CAS is switched from the mountain portion to the valley portion. Therefore, the comparison process between the carrier signal CAS and the voltage command value in the comparison unit 126 of the signal generation unit 120 does not need to switch between normal phase and reverse phase. For example, if the carrier signal is greater than the voltage command value, it can be turned off, and if the carrier signal is smaller than the voltage command value, it can be turned on, and the positive phase and reverse phase can be uniformly processed. Therefore, the calculation can be simplified during the switching process of the phase of the PWM signal.

Furthermore, in the example described with reference to FIG. 12 , as in the examples described with reference to FIGS. 5 to 9 , the phase switching timing tsw may also be shifted from the timing of the peak of the carrier signal CAS.

Furthermore, in the examples described with reference to Figures 3 to 9 and Figure 12, the carrier signal CAS is a triangular wave, and in the examples described with reference to Figures 10 and 11, the carrier signal CAS is a sawtooth, but the carrier signal CAS can also be a triangle wave and sawtooth, the triangular wave and sawtooth are switched at the phase switching timing tsw. For example, the carrier signal CAS may be set as a triangular wave in the case of normal phase, and set as a sawtooth wave in the case of reverse phase. Alternatively, the carrier signal CAS may be set as a sawtooth wave in the case of normal phase, and set as a triangular wave in the case of reverse phase.

In the above, the embodiments of the present invention have been described with reference to the drawings (FIG. 1 to FIG. 12). However, this invention is not limited to the said embodiment, In the range which does not deviate from the summary, it can implement in various aspects. The drawings schematically show each component for easy understanding, but the thickness, length, number, etc. of each component shown in the drawings are different from the actual ones for the convenience of making the drawings. In addition, the material, shape, size, etc. of each component shown in the above-mentioned embodiments are examples, and are not intended to be specific. It is not limited, and various changes can be made in the range which does not deviate substantially from the effect of this invention.

AS: connected pulse group

ASoff: connected disconnected pulse

ASon: connected pulse wave

AT: Period of connected pulse groups

AToff: During disconnection

ATon: the period when the connection is on

CAS: carrier signal

NS: Inverted PWM signal

NT: Inverting PWM period

PS: Positive phase PWM signal

PT: during positive phase PWM

T: PWM period

Toff: disconnection period

Ton: During the connection

tsw: Phase switching timing

Claims (13)

A motor drive circuit, which controls the drive of a three-phase motor in a two-phase modulation manner, and includes: a first input terminal, applied with a first voltage; a second input terminal, applied with a voltage lower than the first voltage the second voltage; a capacitor, connected between the first input terminal and the second input terminal; three series bodies, formed by connecting two semiconductor switching elements in series; The pulse width modulation signals input by the three serial bodies respectively, the pulse width modulation signals include the positive phase pulse width modulation signal and the reverse phase pulse width modulation signal, and the phase of the reverse phase pulse width modulation signal is the same as the phase of the pulse width modulation signal The positive-phase PWM signal is different, the signal generating unit switches the phase of the PWM signal at the phase switching timing, and the PWM signal is different from the normal-phase PWM signal and Between the anti-phase PWM signals and before and after the phase switching timing, there are more connected pulse groups, and the connected pulse groups have: connected on-pulse waves, with connected on-periods; and connected off-phase The on-pulse wave has a continuous off-period, and the on-period of the phase is shorter than the on-period of one cycle of the pulse width modulation cycle before or after the phase switching. The motor drive circuit according to claim 1, wherein the set of consecutive pulse waves is within a time range of one cycle of pulse width modulation before and after the phase switching opportunity. The motor drive circuit according to claim 1 or claim 2, wherein the disconnection period is shorter than the disconnection period of one cycle of the pulse width modulation cycle before or after the phase switching. The motor drive circuit as described in claim 1 or claim 2, wherein the ratio of the connection on-period to the connection-off period is the ratio of one cycle of the pulse width modulation cycle before or after the phase switching The ratio of the ON period to the OFF period is the same. The motor drive circuit according to claim 1 or claim 2, wherein the connection on-period is prior to the connection-off period, and the on-period occupies the period of the connected pulse group The ratio is the same as the ratio of the on-period to the pulse width modulation period before the phase switching, and the ratio of the off-period to the period of the connected pulse wave group is the same as the ratio of the off-period to the pulse width after the phase switch. The ratio of the modulation period is the same. The motor drive circuit as described in claim 1 or claim 2, wherein the period of disconnection of the connection is prior to the period of connection of the connection, and the period of the disconnection is occupied by the period of the group of connected pulses The ratio is the same as the ratio of the off-period to the pulse width modulation cycle before the phase switching, and the ratio of the on-period to the period of the connected pulse wave group is the same as the ratio of the on-period to the pulse width after the phase switch. The ratio of the modulation period is the same. The motor drive circuit according to claim 1 or claim 2, wherein the cycle of the connected pulse group is 1/2 of the pulse width modulation cycle before or after the phase switching. The motor driving circuit as described in claim 1 or claim 2, wherein the pulse width modulation signal further has: a front pulse group, located before the connected pulse group; and a rear pulse group, located in the connected pulse group After the group of pulses, the front group of pulses has: a front on pulse with a front on period; and a front off pulse with a front off period, the back pulse group has: a back on pulse a wave having a post-on period; and a post-off pulse having a post-off period, the signal generation section adjusts at least one of the connected pulse group, the preceding pulse group, and the post-pulse group Two pulse wavelengths. The motor drive circuit according to claim 8, wherein the signal generating section adjusts at least two of the consecutive on-period, the preceding on-period, and the subsequent on-period, the consecutive on-period The sum of the adjustment value of , the adjustment value of the preceding turn-on period, and the adjustment value of the post-turn-on period is 0. The motor drive circuit according to claim 8, wherein the signal generating section adjusts the consecutive off period, the previous off period and In at least two of the post-disconnection periods, the sum of the adjustment value of the connected disconnection period, the adjustment value of the pre-disconnection period and the adjustment value of the post-disconnection period is 0. The motor drive circuit according to claim 1 or claim 2, wherein the connected pulses have a plurality of pulses. The motor drive circuit according to claim 1 or claim 2, wherein the connection and disconnection pulses have a plurality of pulses. A motor module, comprising: the motor drive circuit according to any one of claim 1 to claim 12; and a three-phase motor driven by the motor drive circuit.

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