TW202201569A - Die bonding device and manufacturing method of semiconductor device capable of mounting a semiconductor chip (die) on an unmarked substrate with high positioning accuracy - Google Patents

Abstract

The present invention aims to provide a die bonding device that mounts a semiconductor chip (die) on an unmarked substrate with high positioning accuracy. A die bonding device recognizes and measures a position of a characteristic portion of the outer shape of a substrate by an imaging device, saves the measured position as an initial position, defines a reference position on the basis of the measured position, and uses the reference position as a reference to sequentially bond dies with a bonding head.

Description

Wafer bonding apparatus and manufacturing method of semiconductor device

The present disclosure relates to a die bonding apparatus, which can be applied to, for example, a die placement for fan-out panel level packaging or fan-out wafer level packaging.

In the field of electronic component mounting, a temporary substrate and a plurality of semiconductor chips arranged on an adhesive layer formed on the temporary substrate are collectively encapsulated with an encapsulating resin to form an encapsulating resin having a plurality of semiconductor chips and a plurality of semiconductor chips covering the plurality of semiconductor chips. After the package is formed, the temporary substrate including the adhesive layer is peeled off from the package, and then the rewiring layer is formed on the surface where the adhesive layer of the package is attached. At this time, the bonding accuracy between the rewiring layer and the semiconductor wafer depends on the positioning accuracy of the wafer on the temporary substrate. Here, it is necessary to improve the positioning accuracy at the time of mounting the semiconductor wafer on the temporary substrate. [Prior Art Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2014-45013 [Patent Document 2] Japanese Patent Laid-Open No. 2018-133353

[Problems to be Solved by Invention]

The positioning correction mark of the bonding target position is given to the temporary substrate, and the positioning accuracy of the temporary substrate of the semiconductor wafer during temporary fixing can be improved by correcting the bonding positioning position using the mark position. However, where on the temporary substrate the mark is applied is determined according to the structure and size of the semiconductor chip, and the final arrangement relationship between the semiconductor chip and the package. That is, it is necessary to prepare a temporary substrate having predetermined marks according to the structure, size, and arrangement of components of the final product. Therefore, since a plurality of temporary substrates having predetermined marks must be produced for each product, there is a problem that the cost increases.

An object of the present disclosure is to provide a wafer bonding apparatus that mounts a semiconductor wafer (wafer) on a substrate with high positioning accuracy on a substrate to which no marks are applied. [means to solve the problem]

The outlines of the representatives of the present disclosure are briefly described below. That is, the wafer bonding apparatus recognizes and measures the position of the characteristic part of the outer shape of the substrate by the camera, and saves the measured position as the initial position; the reference position is defined based on the measured position, and the reference position is used as the reference. The wafers are sequentially bonded by the bonding head. [Effect of invention]

According to the above-described wafer bonding apparatus, the accuracy of wafer placement can be improved.

Hereinafter, embodiments, modifications, and examples will be described with reference to the drawings. However, in the following description, the same components are assigned the same reference numerals, and overlapping descriptions may be omitted. In addition, in the drawings, the width, thickness, shape, etc. of each part are schematically shown in comparison with the actual state in order to clarify the description, but this is only an example and does not limit the interpretation of the present invention.

A fan-out wafer level package (Fan Out Wafer Level Package: FOWLP) is a package in which a redistribution layer is formed in a wide area exceeding the die area. Fan Out Panel Level Package (FOPLP) is a breakthrough in the idea of FOWLP's comprehensive manufacturing. In FOWLP, for example, a wafer with a diameter of 300mm is mounted on a large number of silicon chips and the package manufacturing is carried out in a lump, thereby reducing the manufacturing cost per package. It is FOPLP that applies the idea of collective manufacturing to panels (panel-shaped substrates) larger than wafers. A printed circuit board or a glass substrate (for example, a substrate for liquid crystal panel production, etc.) is used for the panel.

There are many types of processes in FOPLP, but one of them is a wafer picked up from a wafer on a panel (hereinafter, also referred to as a substrate) that is a temporary substrate, via an adhesive base applied to the substrate. A method of forming a rewiring and a pad (PAD) after bonding and temporary fixing, and encapsulating the package with a sealing resin, peeling the package from the substrate. In this method, in order to maintain yield and quality, it is necessary to mount a wafer on a substrate with high precision, and a high precision such as 3 to 5 μm is required by miniaturization and high-density wiring of the wafer.

Applicable to the high precision of the manufacturing apparatus, although a method of arranging a mark serving as a pre-positioned reference on the substrate for alignment is considered, when the substrate is processed to form a target mark, the size of the manufactured component is changed, etc. on the substrate (as a Difficulty in reusing the mold), and the cost of forming alignment marks on the substrate with an accuracy of within 3 to 5 μm, the increase in the cost of the substrate is related to the increase in the package price. Therefore, it is necessary to mount the wafer on the unmarked plain substrate with high precision, and the manufacturing apparatus becomes expensive. In order to reduce the cost of FOPLP, it is necessary to realize a manufacturing apparatus that can be implemented with high precision and at a low price.

In addition, in FOPLP, it is necessary to bond a large number of wafers with high precision such as 3 to 5 μm on a substrate having a large size (for example, 515 mm×510 mm, etc.) and no positioning reference is provided. However, due to the influence of environmental temperature changes, substrate temperature changes required in the process, and equipment changes over time, the expansion and contraction of the substrate may change during bonding, which affects the accuracy after bonding.

Here, in the embodiment of the present disclosure, the position can be measured by recognizing the features of the external shape of the substrate, such as corners and edges of the substrate, and the reference position of the substrate is calculated, and the wafer is bonded based on the reference position. The recognition of the features of the external shape of the substrates is performed a plurality of times during the bonding of one substrate, and the reference positions are corrected to perform the bonding of the wafers. Thereby, the influence on the bonding accuracy due to changes in the expansion and contraction of the substrate during bonding can be reduced. The present embodiment can be applied to a FOWLP wafer other than the FOPLP temporary substrate.

<First Embodiment> The first embodiment takes FOPLP as an object, performs position measurement by identifying the corners or edges of a rectangular substrate without a mark, and corrects the position, size, and expansion and contraction of the substrate while bonding the wafers. This is explained with reference to FIGS. 1 to 6 . FIG. 1 is a diagram showing an outline of a wafer bonding apparatus according to an embodiment. FIG. 2 is a plan view showing the substrate of the first embodiment. FIG. 3 is a plan view illustrating calculation of the center of the substrate of FIG. 2 . 4 is a plan view showing a state in which wafers are bonded with the center of the substrate as a reference. FIG. 5 is a plan view illustrating expansion and contraction of the substrate. FIG. 6 is a plan view showing a state in which wafers are bonded with the center of the substrate as a reference to correct the expansion and contraction of the substrate.

As shown in FIG. 1 , the wafer bonding apparatus BD according to the first embodiment includes a bonding stage BS for fixing a substrate P, a bonding head BH for bonding the wafer D on the substrate P, an imaging device CM for imaging the wafer D and the substrate P, and a control The control device CNT of the bonding head BH and the imaging device CM. The bonding stage BS includes a vacuum suction mechanism for fixing the substrate P and a mechanism for heating the substrate P. As shown in FIG. The control device CNT includes a CPU (not shown) and a memory device MM that stores programs and data executed by the CPU.

The bonding method of the first embodiment will be described below with reference to FIGS. 2 to 6 .

(step 1) First, after the substrate P is loaded into the bonding stage BS of the wafer bonding apparatus BD, the positions at which the external shape features of the substrate P such as corners and edges of the substrate P can be measured are recognized, and the initial position is stored. However, as shown in FIG. 2 , the substrate P is rectangular in plan view, and extends in the X-axis direction on one side, and extends in the Y-axis direction on the other side crossing one side.

For example, after the control device CNT conveys the substrate P to the bonding stage BS and vacuum-sucks the substrate P, the recognition operation of the corner of the substrate P is started immediately. As shown in FIG. 2 , in the recognition operation, the control device CNT recognizes (measures) the position of the corner of the substrate P by imaging at least two corners of the corners CRU, CLU, CLD, and CRD of the substrate P with the camera device CM , and save the position and distance in the memory device MM.

(step 2) From the position of the corner of the substrate P measured in step 1, a position (substrate reference position) that is a reference such as the center and the corner of the substrate P is defined.

For example, as shown in FIG. 3 , two points of the upper right corner CRU and the upper left corner CLU of the substrate P are identified for position measurement, the straight line SL1 on the upper side of the substrate P is defined and calculated, and the distance between the two points of the corner CRU and the corner CLU is calculated. Midpoint CP1. The straight line SL2 perpendicular to the upper straight line SL1 is calculated from the midpoint CP1, and the center CN of the board P is calculated from the size of the board P (position of 1/2 of the depth size). The XY coordinate system on the substrate is defined by the inclination of the upper straight line SL1 with the center CN as a reference. Here, the center CN is an example of the substrate reference position.

(step 3) The position at which the wafer D is bonded from the substrate reference position is registered in advance, and the wafer D is sequentially bonded at the position.

For example, as shown in FIG. 4 , the position where the wafer D in the lower left is bonded is -x1 in the X direction and -y1 in the Y direction from the center CN serving as the substrate reference position, and the coordinates are (-x1, -y1 ). First, the controller CNT bonds the wafer D to the previously registered positions of 16 (=4×4) by the bonding head BH.

(step 4) After a predetermined elapsed period based on a predetermined time or a predetermined number of times, the position of the initial position registered in advance is measured again with the corner of the substrate P, etc. Step 1, and the displacement from the initial position is measured.

For example, when the control device CNT finishes bonding the wafer D at the position of 16, as shown in FIG. Center CN. In FIG. 5 , the substrate P is smaller than the initial state indicated by the two-dotted line.

(step 5) Changes in the reference position of the substrate, changes in expansion and contraction, etc. are calculated from the results of the measurement in step 4, and the reference position of the substrate and the size of the substrate are corrected.

For example, the control device CNT is based on the center CN of the substrate P calculated in step 2 and the center CN of the substrate P calculated in step 4, the size of the substrate P calculated based on the distance between the two corners calculated in step 1, and the The dimension of the board|substrate P calculated by the distance of the two corners calculated in step 4, the center CN of the board|substrate P, and the dimension of the board|substrate P are corrected.

(step 6) Based on the corrected substrate reference position and substrate size information, the wafer D is bonded by correcting the expansion and contraction and tilting using the substrate reference position for correcting the previously registered position of the bonding wafer D as a reference. Thereby, it is possible to follow the changes in the reference position of the substrate and the size of the substrate to perform bonding.

For example, based on the center CN and the substrate size calculated in step 5, the control device CNT corrects and calculates the position of the position where the bonding is to be performed at the next 16 points registered in advance. The controller CNT bonds the wafer D to the substrate P based on the corrected 16 positions for bonding.

According to the embodiment, bonding can be performed with higher precision even on a substrate without a mark, and with reduced influence of thermal shrinkage and the like. Furthermore, although bonding stage BS is heated, step 1 can be implemented regardless of the temperature when the substrate is transferred to bonding stage BS because it can follow changes in the reference position and substrate size due to thermal shrinkage. Therefore, there is no need to identify actions and wait times.

<Modification of the first embodiment> Hereinafter, several representative modifications of the first embodiment will be illustrated. In the description of the following modified examples, the same reference numerals as those in the above-described embodiment will be used for the same structures and functional parts as those described in the above-described embodiment. Next, in the description of the relevant parts, the description in the above-mentioned embodiment is appropriately applied to the extent that there is no technical contradiction. In addition, a part of the above-mentioned embodiment and all or a part of the plural modifications can be applied appropriately and in combination within the scope of no technical contradiction.

(first modification) There are several methods for calculating the center and the inclination of the substrate P other than the method shown in FIG. 3 . The first modification will be described with reference to FIG. 7 . 7 is a plan view illustrating a method of calculating the center and inclination of the substrate according to the first modification of the first embodiment.

For example, as shown in FIG. 7 , two points of the upper right corner CRU and the upper left corner CLU of the substrate P are identified for position measurement, the straight line SL1 on the upper side of the substrate P is defined and calculated, and the distance between the two points of the corner CRU and the corner CLU is calculated. Midpoint CP1. A straight line SL2 perpendicular to the upper straight line SL1 is defined and calculated from the midpoint CP1. Position measurement is performed by identifying two points of the upper right corner CRU and the lower right corner CRD of the substrate P, defining and calculating the right line SL3 of the substrate P, and calculating the midpoint CP2 of the two points of the corner CRU and the corner CRD. A straight line SL4 perpendicular to the right straight line SL3 is defined and calculated from the midpoint CP2. The intersection of two perpendicular straight lines SL2 and SL4 is calculated as the center CN of the substrate P. As shown in FIG. The XY coordinate system on the substrate is defined by the inclination of the upper straight line SL1 or the right straight line SL3 with the center CN as a reference.

(Second modification example) The second modification will be described with reference to FIG. 8 . 8 is a plan view illustrating a method for calculating the center and inclination of the substrate according to the second modification of the first embodiment.

For example, as shown in FIG. 8 , four points of the corners CRU, CLU, CLD, and CRD of the substrate P are identified for position measurement, and two straight lines connecting the diagonal corners, namely diagonal lines SL5 and SL6, are defined. The intersection of SL5 and SL6 is calculated as the center CN. The center lines SL7 and SL8 of the diagonal lines SL5 and SL6 are defined, and the XY coordinate system on the substrate is defined by the slope of the diagonal line SL7 or the diagonal line SL8 with the center CN as a reference.

(third modification) The third modification will be described with reference to FIG. 9 . 9 is a plan view illustrating a method of calculating the center and inclination of the substrate according to a third modification of the first embodiment.

For example, as shown in FIG. 9 , the position measurement is performed by identifying the edges EG1 and EG2 on the left and right sides of the substrate P, and a straight line SL9 connecting the two points of the edges EG1 and EG2 is defined and calculated, and the midpoint CP3 of the straight line SL9 is calculated. A straight line SL10 perpendicular to the straight line SL9 is defined and calculated from the midpoint CP3. Position measurement is performed on the edges EG3 and EG4 of the upper and lower sides of the substrate P on the identification line SL10 . The midpoint of the edges EG3 and EG4 is calculated as the center CN. The XY coordinate system on the substrate is defined by the inclination of the straight line SL9 or the straight line SL10 using the center CN as a reference.

(Fourth modification example) The fourth modification will be described with reference to FIG. 10 . 10 is a plan view illustrating a method for calculating the center and inclination of the substrate according to a fourth modification of the first embodiment.

For example, as shown in FIG. A straight line parallel to the straight line SL11 is defined from the straight line SL11 to 1/2 of the width of the substrate P as the straight line SL12. Edges EG7 and EG8 on the left and right sides of the substrate P are identified on the straight line SL12, and the positions are measured, and the midpoint CP4 is obtained. A straight line perpendicular to straight line SL11 and straight line SL12 is defined as straight line SL13 through this midpoint CP4. The position measurement is performed by identifying the edge EG9 on the lower side of the substrate P on the straight line SL13, and the distance between the straight line SL11 and the edge EG9 is calculated. From the intersection point CP1 of the straight line SL11 and the straight line SL13, a point of 1/2 of the distance between the straight line SL11 and the edge EG9 calculated is calculated as the center CN.

(Fifth modification example) The fifth modification will be described with reference to FIG. 11 . 11 is a plan view illustrating a method of calculating the center and inclination of the substrate according to a fifth modification of the first embodiment.

For example, as shown in FIG. 11 , the upper left edges EG10 and EG11 of the substrate P are identified, and the position of the intersection is measured, and the angle CLU of the substrate P is obtained. Next, the lower right edges EG12 and EG13 of the substrate P are identified, and the position of the intersection point is measured, and the angle CRD of the substrate P is obtained. A straight line SL14 connecting the two corners CLU and CRD is defined, and the midpoint on the straight line SL14 connecting the two corners CLU and CRD is calculated and used as the center CN. The straight lines SL15 and SL16 in the XY direction are defined from the inclination of the diagonal line SL14 using the center CN as a reference, and the XY coordinate system on the substrate is defined.

(Sixth modification example) The sixth modification will be described with reference to FIG. 12 . 12 is a plan view illustrating a method of calculating the center and inclination of the substrate according to a sixth modification of the first embodiment.

For example, as shown in FIG. 12 , the positions of the edges EG14 and EG15 on the upper and lower sides of the substrate P are identified, and the positions are measured, and the midpoint CP5 is obtained. Similarly, the edges EG16 and EG17 of the two sides are identified to perform position measurement, and the midpoint CP6 is obtained. A straight line SL17 passing through the two midpoints CP5 and CP6 is defined, and the left and right edges EG18 and EG19 of the substrate P located on the straight line SL17 are identified for position measurement, and the midpoint is taken as the center CN. The XY coordinates on the substrate are defined by the inclination of the straight line SL17 using the center CN as a reference.

(Seventh modification example) The seventh modification will be described with reference to FIG. 13 . 13 is a plan view illustrating a method of calculating the center and tilt of the substrate according to a seventh modification of the first embodiment.

For example, as shown in FIG. 13 , the positions of the edges EG20 and EG21 on the upper and lower sides of the substrate P are identified, and the positions are measured, and the midpoint CP7 is obtained. Similarly, the edges EG22 and EG23 on the two sides are identified, and the positions are measured to obtain the midpoint CP8. Next, the positions of the edges EG24 and EG25 on the left and right sides of the substrate P are identified, and position measurement is performed, and the midpoint CP9 is obtained. Similarly, the edges EG26 and EG27 on the two sides are identified and the positions are measured, and the midpoint CP10 is obtained. Define a straight line SL22 passing through the two midpoints CP7, CP8. Also, a straight line SL23 passing through the two midpoints CP9 and CP10 is defined. The intersection of the two straight lines SL22 and SL23 is obtained, and this point is taken as the center CN. The XY coordinate system on the substrate is defined by the inclination of the straight line SL22 or the straight line SL23 using the center CN as a reference.

<Second Embodiment> The second embodiment takes FOWLP as an object, and performs position measurement by identifying the edge of a wafer as a substrate in a circular shape without a mark, and corrects the position, size, and expansion of the substrate while bonding the wafers.

First, the bonding stage according to the second embodiment will be described with reference to FIG. 14 . FIG. 14 is a plan view showing the bonding stage according to the second embodiment. The wafer bonding apparatus BD of the second embodiment is the same as the first embodiment except that the substrate P and the bonding stage BS for fixing the substrate P are different from those of the first embodiment.

As shown in FIG. 14 , the bonding stage BS vacuums and heats both the rectangular substrate (panel) for FOPLP and the circular substrate (wafer) for FOWLP. Rectangular substrates, for example, can mount substrates with a size of 515 mm×510 mm, and circular substrates, for example, can mount substrates with wafer sizes of 12 inches and 8 inches.

The bonding stage BS is provided with a groove VT1 for vacuum suction for substrates and a heater HT1 having a circular shape in the center, a vacuum suction groove VT2 and a heater HT2 for a substrate having a rectangular shape on the outer periphery, and a groove for the substrate transfer jig. Escape hole EH1, EH2. The escape hole EH1 is for the substrate holding claws WSC described later, and the escape hole EH2 is for the substrate positioning claws WPM described later. When placing a circular substrate, only the central circular heater HT1 and vacuum suction groove VT1 are used, and when placing a rectangular substrate, the central circular heater HT1 and outer peripheral heater HT2 and vacuum suction groove VT1 are used. , VT2.

Next, the substrate transfer jig will be described with reference to FIG. 15 . Fig. 15 is a diagram illustrating a substrate transfer jig according to the second embodiment, Fig. 15(a) is a plan view showing the substrate transfer jig, and Fig. 15(b) is a state before the substrate transfer jig is placed on the bonding stage 15(a) is a cross-sectional view taken along line AA of FIG. 15(a), and FIG. 15(c) is a cross-sectional view taken along line AA of FIG.

The substrate conveyance jig WC includes a rectangular substrate WCS with a hole formed in the center, four substrate holding claws WSC and substrate positioning claws WPM held at four places for holding the substrate P. As shown in FIG. 15( b ), the substrate holding claw WSC has a portion WSCa abutting on the upper surface of the substrate WCS and being fixed, and a portion WSCb abutting on the lower surface of the substrate P and holding the substrate P. The upper surface of the portion WSCb holding the substrate P is in contact with the lower surface of the substrate P. As shown in FIG. As shown in FIG. 15( c ), the portion WSCb holding the substrate P is embedded in the escape hole of the bonding stage BS, and the lower surface of the substrate P is in contact with the upper surface of the bonding stage BS. The substrate positioning pawls WPM are fitted into the notch (notch) NT formed in the substrate P, and the substrate P is positioned.

The joining method of the second embodiment will be described with reference to FIGS. 16 to 19 . 16 is a plan view illustrating a method of calculating the center of the substrate according to the second embodiment. FIG. 17 is a diagram explaining detection of the edge of the substrate, FIG. 17( a ) is the edge EG31 , FIG. 17( b ) is the edge EG32 , FIG. 17( c ) is the edge EG33 , and FIG. 17( d ) is the expansion of the edge EG34 picture. FIG. 18 is a view explaining detection of the tilt of the substrate, FIG. 18( a ) is a plan view showing a state without tilt, and FIG. 18( b ) is a plan view showing a state with tilt. Fig. 19 is a diagram illustrating a method of measuring the position of a notch, Fig. 19(a) is a plan view showing a method by pattern matching, and Fig. 19(b) is a plan view showing a method by shape.

The joining method of the second embodiment will be described below with reference to FIGS. 16 to 19 with reference to the differences from the first embodiment. (step 1) First, after the substrate P held by the substrate transfer jig WC is loaded into the bonding stage BS of the wafer bonding apparatus BD, a position that can be measured as a feature of the outer shape of the substrate P such as the edge of the substrate P is recognized, and the initial position is saved. However, as shown in FIG. 16, the board|substrate P is seen as a circular shape in a plane.

For example, the control device CNT transfers the substrate P held by the substrate transfer jig WC to the bonding stage BS, vacuum-sucks the substrate P, and starts the edge recognition operation of the substrate P immediately. As shown in FIG. 16 , in the identification operation, the control device CNT uses the camera device CM to image the four edges of the substrate P, identifies (measures) the positions of the four edges of the substrate P, and stores the positions and distances in the memory device MM.

(step 2) From the positions of the four edges of the substrate P measured in step 1, the position (substrate reference position) and the size of the substrate P as a reference such as the center of the substrate P are defined.

For example, as shown in FIG. 16 , the position measurement is performed by identifying the edges EG31 and EG32 on the left and right sides of the substrate P, and a straight line SL31 connecting the two points of the edges EG31 and EG32 is defined and calculated, and the midpoint CP31 of the straight line SL31 is calculated. A straight line SL32 perpendicular to the straight line SL31 is defined and calculated from the midpoint CP31. Position measurement is performed by identifying the two upper and lower edges EG33 and EG34 of the substrate P on the line SL32. The midpoint of the edges EG33 and EG34 is calculated as the center CN. Moreover, the radius (R) which is the magnitude|size of the board|substrate P is computed from the position of the center CN and edges EG31, EG32, EG33, and EG34. In addition, the detection of the edges EG31 , EG32 , EG33 , and EG34 is performed by edge scanning by the imaging device CM, but it is also possible to measure the change position by height scanning by a laser height sensor or the like.

When measuring the installation inclination of the substrate P, after calculating the center CN of the substrate P, measure the position of the positioning notch NT provided on the substrate P from the position (Xc, Yc) of the center CN and the position (X, Y) of the notch NT. ) to define the axis and calculate the slope. As a method for calculating the position of the notch NT, the position of the notch NT can be measured by pattern recognition (pattern matching) as shown in FIG. 19( a ), and the position of the notch NT can be measured by shape edge recognition as shown in FIG. Location is okay too.

(step 3) As in the first embodiment, the positions of the bonding wafers D are registered in advance from the substrate reference positions, and the reference wafers D are sequentially bonded at the positions.

(step 4) As in the first embodiment, the position of the initial position where the edge of the substrate P was measured and registered in advance in step 1 is measured again based on the set elapsed period of a certain time or a certain number of similar times, and the measurement is performed from the initial position. displacement.

(step 5) As in the first embodiment, changes in the substrate reference position, expansion and contraction, etc. are calculated from the measurement results in step 4, and the substrate reference position and the substrate size are corrected.

(step 6) As in the first embodiment, based on the corrected substrate reference position and substrate size information, the wafer D is bonded by correcting the substrate reference position for correcting the position of the previously registered bonding wafer D as a reference.

In the second embodiment, the center (substrate reference position) and the radius (substrate size) of the wafer placed on the bonding stage are detected, the position is aligned based on the center reference, and the expansion and contraction correction is performed by changing the radius. Thereby, it is possible to follow the changes in the substrate reference position and the substrate size due to thermal shrinkage, and perform bonding.

<Variation of the second embodiment> Hereinafter, several representative modifications of the second embodiment will be illustrated. In the description of the following modified examples, the same reference numerals as those in the above-described embodiment will be used for the same structures and functional parts as those described in the above-described embodiment. Next, in the description of the relevant parts, the description in the above-mentioned embodiment is appropriately applied to the extent that there is no technical contradiction. In addition, a part of the above-mentioned embodiment and all or a part of the plural modifications can be applied appropriately and in combination within the scope of no technical contradiction.

(first modification) Although the processing of the second embodiment is simple, it takes time to measure every four points. Here, in the first modification example, an approximate circle is calculated by the least squares method from the measurement results of the edges of three points, and the center (Xc, Yc) and radius (R) of the approximate circle are obtained. The measurement point is only three points, and the measurement time can be shortened compared with four points.

The joining method of the first modification will be described with reference to FIGS. 20 to 22 . 20 is a plan view illustrating a method of calculating the center of the substrate according to the first modification of the second embodiment. FIG. 21 is a diagram illustrating a method of calculating an approximate circle by the least squares method, and obtaining the center (Xc, Yc) and radius (R) of the approximate circle. FIG. 22 is a diagram showing an equation used in a method of calculating an approximate circle by the least squares method and obtaining the center (Xc, Yc) and radius (R) of the approximate circle.

The points different from the second embodiment will be described below. (step 1) As shown in FIG. 20 , in the identification operation, the control device CNT uses the camera device CM to image the three edges of the substrate P, identifies (measures) the positions of the three edges of the substrate P, and stores the positions and distances in the memory device MM.

(step 2) From the positions of the three edges of the substrate P measured in step 1, the position (substrate reference position) and the size of the substrate P as a reference such as the center of the substrate P are defined.

For example, as shown in FIG. 20 , two edges EG31 and EG32 on the left and right of the substrate P are identified for position measurement, a straight line SL31 connecting the two points of the edges EG31 and EG32 is defined and calculated, and a midpoint CP31 of the straight line SL31 is calculated. A straight line SL32 perpendicular to the straight line SL31 is defined and calculated from the midpoint CP31. Position measurement is performed by identifying the edge EG33 under the substrate P on the line SL32.

21 and 22 , a method of approximating a circle by the least-squares method from the plural measurement points (xi, yi) and calculating the center (Xc, Yc) of the circle will be described. In addition, as shown in FIG. 21 , if the number of measurement points is three or more, an approximate circle can be calculated.

When the coordinates (Xc, Yc) of the center CN of the approximated circle are (a, b) and the radius is set to r, the approximate circle formula is represented by the formula (1) shown in FIG. 22 . Equation (1) can be modified as in Equation (2) shown in FIG. 22 . The parameters A, B, and C of the formula (2) are represented by the formula (3) shown in FIG. 22 .

Parameters A, B, and C are calculated by the least squares method using plural measurement points (xi, yi) (i=1 to n). That is, the parameters A, B, and C are calculated using the equation (4) shown in FIG. 22 .

The formula (4) is partially differentiated by the parameters A, B, and C to obtain the formulas (5) (6) (7) shown in FIG. 22 . Expressions (5), (6) and (7) are expressed as a determinant, and the expression (8) shown in FIG. 22 is obtained, and the expression (8) is transformed into the expression (9) shown in FIG. 22 . The parameters A, B, and C are calculated from the formula (9).

(a, b) are calculated by substituting A and B calculated from the formula (9) into the formula (3). r is calculated by substituting (a, b) calculated from the formula (3) and C calculated from the formula (9) into the formula (3). Here, r corresponds to the radius (R) of the substrate P of the second embodiment.

(Second modification example) The second modification will be described with reference to FIG. 23 . 23 is a plan view illustrating a method for calculating the center and size of the substrate according to the second modification of the second embodiment.

For example, as shown in FIG. 23 , two edges EG31 and EG32 on the left and right of the substrate P are identified for position measurement, a straight line SL31 connecting the two points of the edges EG31 and EG32 is defined and calculated, and the midpoint CP31 of the straight line SL31 is calculated. A straight line SL32 perpendicular to the straight line SL31 is defined and calculated from the midpoint CP31.

A straight line SL33 perpendicular to the straight line SL31 is defined and calculated from the edge EG32. Position measurement is performed by identifying the edge EG34 of the substrate P on the straight line SL33. A midpoint CP32 of the straight line SL33 is calculated, and a straight line SL34 perpendicular to the straight line SL33 is defined and calculated from the midpoint CP32. The center of the circle (Xc, Yc) is calculated from the intersection of the two straight lines SL32 and SL34. A straight line SL35 connecting two points of the edges EG31 and EG34 is defined, and the center of the circle, which is the midpoint, is calculated. Compare and confirm the calculated centers of the two circles.

The radius (R) is the average of the distances between the edges EG31, EG32, and EG34 and the center (Xc, Yc). Alternatively, set the lengths of the sides of the triangle formed by the three points of the edges EG31, EG32, and EG34 as a, b, and c, and calculate the radius ( R). Similar to the first modification, the calculation results of the center (Xc, Yc) and the radius (R) by the least square method of the three points of the edges EG31 , EG32 and EG34 may be compared and averaged.

According to the second modification, as in the first modification, only three measurement points are required, and the measurement time can be shortened compared with the four points of the second embodiment.

(third modification) The bonding stage according to the third modification will be described with reference to FIG. 24 . 24 is a plan view showing a bonding stage according to a third modification of the second embodiment.

As shown in FIG. 24 , in the bonding stage BS of the third modification, as in the second embodiment, both a rectangular substrate (panel) for FOPLP and a circular substrate (wafer) for FOWLP are vacuum suctioned and heating. The bonding stage BS is provided with a groove VT1 for vacuum suction for substrates and a heater HT1 having a circular shape in the center, a vacuum suction groove VT2 and a heater HT2 for a substrate having a rectangular shape on the outer periphery, and a groove for the substrate transfer jig. Escape Trench ET. When placing a circular substrate, only the central circular heater HT1 and vacuum suction groove VT1 are used, and when placing a rectangular substrate, the central circular heater HT1 and outer peripheral heater HT2 and vacuum suction groove VT1 are used. with VT2.

Next, the substrate transfer jig will be described with reference to FIG. 25 . 25 is a diagram illustrating a substrate transfer jig according to a third modification of the second embodiment, FIG. 25( a ) is a plan view showing the substrate transfer jig, and FIG. 25( b ) is a diagram illustrating that the substrate transfer jig is placed on the bonding Fig. 25(a) is a cross-sectional view taken along line AA of the state before the stage, and Fig. 25(c) is a cross-sectional view taken along line AA of Fig. 25(a) showing a state in which the substrate transfer jig is placed on the bonding stage. picture.

The board|substrate conveyance jig WC is provided with the rectangular board|substrate WCS in which the hole was formed in the center, and the board|substrate positioning claws WPM. As shown in FIG.25(b), the board|substrate WCS has the part WSCb which abuts the lower surface of the board|substrate P and holds the board|substrate P. The upper surface of the portion WSCb holding the substrate P is in contact with the lower surface of the substrate P. As shown in FIG. As shown in FIG. 25( c ), the portion WSCb holding the substrate P is buried in the escape groove ET of the bonding stage BS, and the lower surface of the substrate P is in contact with the upper surface of the bonding stage BS. The substrate positioning pawls WPM are fitted into the notch (notch) NT formed in the substrate P, and the substrate P is positioned.

(Fourth modification example) The bonding stage according to the fourth modification will be described with reference to FIG. 26 . 26 is a plan view showing a bonding stage according to a fourth modification.

As shown in FIG. 26 , in the bonding stage BS of the fourth modification, as in the second embodiment, both a rectangular substrate (panel) for FOPLP and a circular substrate (wafer) for FOWLP are vacuum suctioned and heating. Bonding stage BS includes vacuum suction groove VT1 and heater HT1 for substrates having a circular shape in the center, and vacuum suction grooves VT2 and heater HT2 for substrates having a rectangular outer circumference, and a center separation groove ST. When placing a circular substrate, only the heater HT1 and the vacuum suction groove VT1 inside the center separation groove ST are used. At this time, only the inner side of the center separation groove ST is raised by several mm, and the substrate P is lifted up and supported. When placing a rectangular substrate, the heater HT1 on the inner side of the center separation groove ST, the heater HT2 on the outer periphery, and the vacuum suction grooves VT1 and VT2 are used.

Next, the substrate transfer jig will be described with reference to FIG. 27 . 27 is a diagram illustrating a substrate transfer jig according to a fourth modification of the second embodiment, FIG. 27( a ) is a plan view showing the substrate transfer jig, and FIG. 27( b ) is a diagram illustrating that the substrate transfer jig is placed on the bonding Fig. 27(a) is a cross-sectional view taken along line AA of the state before the stage, and Fig. 27(c) is a cross-sectional view taken along line AA of Fig. 27(a) showing a state in which the substrate transfer jig is placed on the bonding stage. picture.

As shown in FIG.27(a), the board|substrate conveyance jig WC is provided with the rectangular board|substrate WCS in which the hole was formed in the center. As shown in FIG.27(b), the board|substrate WCS has the part WSCb which abuts the lower surface of the board|substrate P and holds the board|substrate P. The upper surface of the portion WSCb holding the substrate P is in contact with the lower surface of the substrate P. As shown in FIG. As shown in FIG. 27( c ), the portion WSCb holding the substrate P is embedded in the center separation groove ST of the bonding stage BS, and the lower surface of the substrate P is in contact with the upper surface of the bonding stage BS. The bonding stage BS on the inner side of the center separation groove ST ascends to support the substrate P. As shown in FIG. Further, as described above, since the position of the notch NT can be measured, the substrate positioning pawl WPM of the second embodiment is not required.

Hereinafter, an example of applying the FOPLP will be described as an example, but it is not limited to this, and the FOWLP described in the second embodiment can also be applied. [Example]

FIG. 28 is a schematic plan view showing the reverse wafer bonder of the embodiment. FIG. 29 is a diagram illustrating the operation of the pick-up inversion head, the transfer head, and the bonding head when viewed from the direction of arrow A in FIG. 28 .

The reverse wafer bonder 10 as a wafer bonding apparatus generally includes a wafer supply unit 1 , a pickup unit 2 , a transfer unit 8 , an intermediate stage unit 3 , a bonding unit 4 , a transfer unit 5 , a substrate supply unit 6K, a substrate unloading unit 6H, The control device 7 which monitors and controls the operation of each part.

First, the wafer supply part 1 supplies the wafer D mounted on the board|substrate P. The wafer supply unit 1 includes a wafer holding table 12 that holds the divided wafers 11 , a lift unit 13 indicated by a dotted line that lifts the wafer D from the wafer 11 , and a wafer ring supply unit 18 . The wafer supply unit 1 is moved in the XY directions by driving means not shown, and moves the picked-up wafer D to the position of the lift unit 13 . The wafer ring supply unit 18 has a wafer cassette for accommodating the wafer rings 14 (refer to FIG. 29 ), and sequentially supplies the wafer rings 14 to the wafer supply unit 1 and replaces them with new wafer rings 14 . The wafer supply unit 1 moves the wafer ring 14 to the pickup point so that the desired wafer D can be picked up from the wafer ring 14 . The wafer ring 14 is a jig that fixes the wafer 11 and can be mounted on the wafer supply unit 1 .

The pickup unit 2 includes a pickup inversion head 21 that picks up and inverts the wafer D, and each drive unit (not shown) that lifts, rotates, inverts, and moves the collector 22 in the X-axis direction. With this structure, the inversion head 21 is picked up, a wafer is picked up, the inversion head 21 is rotated 180 degrees, the bumps of the wafer D are inverted to face downward, and the wafer D is transferred to the transfer head 81 .

The transfer unit 8 receives the reversed wafer D from the pickup reverse head 21 and places it on the intermediate stage 31 . The transfer unit 8 has a transfer head 81 including a catcher 82 for sucking and holding the wafer D at the tip thereof, and a Y drive unit 83 for moving the transfer head 81 in the Y direction, similarly to the pickup inversion head 21 .

The intermediate stage unit 3 includes an intermediate stage 31 on which the wafer D is temporarily placed, and a stage identification camera 34 . The intermediate stage 31 is movable in the Y-axis direction by a drive unit not shown.

The bonding portion 4 picks up the wafer D from the intermediate stage 31 and bonds it to the transferred substrate P. Among them, as the substrate P, a glass panel is used. The bonding section 4 includes a bonding head 41 including a collector 42 that suctions and holds the wafer D at the tip like the pickup inversion head 21 , a Y beam 43 as a driving section that moves the bonding head 41 in the Y-axis direction, an imaging substrate P, and the like. The substrate recognition camera 44 and the X-beam 45 as imaging devices for recognizing the bonding position. As shown in FIG. 28 , the X beam 45 is provided in the vicinity of the conveyance rails 51 and 52 , the Y beam 43 extends in the Y axis direction so as to straddle the bonding stage BS, and both ends are moved in the X axis direction by the X beam 45 . freely supported.

The bonding head 41 is a device having a collector 42 that detachably holds the wafer D by vacuum suction, and is attached to the Y beam 43 so as to be freely reciprocating in the Y-axis direction and the Z-axis direction. The bonding head 41 holds and transfers the wafer D picked up from the intermediate stage 31 , and has a function of mounting the wafer D on the substrate P that is adsorbed and fixed to the bonding stage BS. In addition, when the bonding head 41 moves to the intermediate stage 31 side than the X beam 45 , the bonding head 41 ascends so that the collector 42 becomes higher than the X beam 45 .

With this structure, the bonding head 41 picks up the wafer D from the intermediate stage 31 and bonds the wafer D on the substrate P based on the image data of the substrate recognition camera 44 . The bonding head 41 corresponds to the bonding head BH of the embodiment, and the board recognition camera 44 corresponds to the imaging device CM of the embodiment.

The conveyance part 5 is provided with the conveyance rails 51 and 52 which the board|substrate P moves in the X-axis direction. The conveyance rails 51 and 52 are parallel. With this structure, the substrate P is unloaded from the substrate supply unit 6K, moved to the bonding position along the conveyance rails 51 and 52, moved to the substrate unloading unit 6H after bonding, and transferred to the substrate unloading unit 6H. The wafer D is bonded to the substrate P, and the substrate supply unit 6K unloads a new substrate P and waits on the transfer rails 51 and 52 .

The control device 7 includes a memory that stores a program (software) for monitoring and controlling the operation of each part of the flip wafer bonder 10 , and a central processing unit (CPU) that executes the program stored in the memory. For example, the control device 7 acquires the board identification camera 44 and image information from the board identification camera 44, various information such as the position of the bonding head 41, and stores it in the memory, and controls the operation of each component such as the bonding operation of the bonding head 41. .

FIG. 30 is a schematic cross-sectional view showing a main part of the wafer supply unit of FIG. 28 . As shown in FIG. 30, the wafer supply unit 1 includes an expansion ring 15 for holding the wafer ring 14, a support ring 17 for holding the wafer ring 14 and horizontally positioning the dicing tape 16 for adhering a plurality of wafers D, and for holding the wafer D upward. The jacking unit 13 for the square jacking. In order to pick up a predetermined wafer D, the lift unit 13 is moved in the vertical direction by a drive mechanism not shown, and the wafer supply unit 1 is moved in the horizontal direction.

Next, the bonding method (manufacturing method of a semiconductor device) performed in the reverse wafer bonder according to the embodiment will be described with reference to FIG. 31 . FIG. 31 is a flowchart showing a bonding method performed by the reverse wafer bonder of FIG. 28 . Before the following steps, the wafer ring 14 holding the dicing tape 16 having the wafer D and the substrate P having a plurality of regions are carried into the reverse die bonder. The loaded board|substrate P is conveyed to the bonding stage BS, and the center and board|substrate size of the board|substrate P are calculated and registered as an initial value.

(Step S21: Wafer Pickup) The control device 7 moves the wafer holding table 12 so that the picked up wafer D is positioned directly above the lift unit 13 , and positions the wafer to be peeled on the lift unit 13 and the collector 22 . The jacking unit 13 is moved so that the upper surface of the jacking unit 13 contacts the inner side of the dicing tape 16 . At this time, the control device 7 adsorbs the dicing tape 16 to the upper surface of the push-up unit 13 . The control device 7 lowers the collector 22 while performing vacuum suction, makes it land on the wafer D to be peeled off, and sucks the wafer D. The controller 7 lifts the collector 22 to peel the wafer D from the dicing tape 16 . Thereby, the wafer D is picked up by the pickup inversion head 21 .

(Step S22: Pickup reversal head movement) The control device 7 moves the pickup inversion head 21 from the pickup position to the inversion position.

(Step S23: Pickup inversion head inversion) The control device 7 rotates the pick-up inversion head 21 by 180 degrees, inverts the bump surface (surface) of the wafer D to face downward, and takes the posture of transferring the wafer D to the transfer head 81 .

(step S24: transfer head receiving and giving) The controller 7 picks up the wafer D from the collector 22 of the pick-up inversion head 21 via the collector 82 of the transfer head 81, and transfers the wafer D.

(Step S25: Pickup reversal head reversal) The control device 7 reverses the pick-up inversion head 21 so that the suction surface of the collector 22 faces downward.

(step S26: transfer head movement) Before or at the same time as step S25 , the control device 7 moves the transfer head 81 to the intermediate stage 31 .

(Step S27: Mounting the wafer on the intermediate stage) The controller 7 places the wafer D held by the transfer head 81 on the intermediate stage 31 .

(Step S28: transfer head movement) The control device 7 moves the transfer head 81 to the receiving and delivering position of the wafer D.

(Step S29: position movement of the intermediate stage) After step S28 or at the same time, the control device 7 moves the intermediate stage 31 to the receiving and receiving position with the bonding head 41 .

(Step S2A: receiving and receiving the bonding head) The controller 7 picks up the wafer D from the intermediate stage 31 by the collector of the bonding head 41, and transfers the wafer D.

(Step S2B: position movement of the intermediate stage) The control device 7 moves the intermediate stage 31 to the receiving and receiving position with the transfer head 81 .

(Step S2C: Bonding Head Movement) The controller 7 moves the wafer D held by the collector 42 of the bonding head 41 onto the substrate P. As shown in FIG.

(Step S2D: Joining) The control device 7 bonds the wafer D picked up by the collector 42 of the bonding head 41 from the intermediate stage 31 to the substrate P coated with an adhesive base (adhesive layer). More specifically, the control device 7 bonds the wafer D to the substrate P by, for example, steps 1 to 6 of the above-described first embodiment.

(Step S2E: Bonding Head Movement) The control device 7 moves the bonding head 41 to the receiving and receiving position with the intermediate stage 31 .

Moreover, after step S2E, the control apparatus 7 removes the board|substrate P which bonded the wafer D from the conveyance rails 51 and 52 by the board|substrate carry-out part 6H. The substrate P is carried out from the reverse wafer bonder 10 .

After that, by collectively encapsulating the plurality of chips (semiconductor chips) arranged on the adhesive layer of the substrate P with the encapsulating resin, a package body having the plurality of semiconductor chips and the encapsulating resin covering the plurality of semiconductor chips is formed. The substrate P is peeled off, and then a rewiring layer is formed on the surface of the substrate P to which the package is attached to manufacture FOPLP.

As mentioned above, although the invention made by the present inventors has been specifically described based on the embodiments, modifications, and examples, the present disclosure is not limited to the above-mentioned embodiments, modifications, and examples, and various modifications can be made.

For example, in the embodiment, the pickup portion 2 , the transfer portion 8 , the intermediate stage portion 3 , and the joint portion 4 are described as an example, but the pickup portion 2 , the transfer portion 8 , the intermediate stage portion 3 , and the joint portion 4 are respectively two sets. Can.

Furthermore, in the embodiment, an example in which one bonding head 41 is provided on the Y beam 43 is described, but a plurality of bonding heads may be provided.

In addition, although the inversion wafer bonder was demonstrated in the Example, it is applicable also to the wafer bonder which bonds without inverting the wafer picked up from the wafer supply part.

BH: Joint Head BD: Wafer Bonding Device CM: camera CNT: control device D: wafer P: substrate CN: Center (reference position) CLU, CRU, CLD, CRD: corners (features)

[ Fig. 1] Fig. 1 is a diagram showing an outline of a wafer bonding apparatus according to an embodiment. [ Fig. 2] Fig. 2 is a plan view showing the substrate of the first embodiment. [ Fig. 3] Fig. 3 is a plan view illustrating calculation of the center of the substrate of Fig. 2 . [ Fig. 4] Fig. 4 is a plan view showing a state in which wafers are bonded with the center of the substrate as a reference. [ Fig. 5] Fig. 5 is a plan view illustrating the expansion and contraction of the substrate. [ Fig. 6] Fig. 6 is a plan view showing a state in which wafers are bonded with the center of the substrate as a reference to correct the expansion and contraction of the substrate. [ Fig. 7] Fig. 7 is a plan view illustrating a method for calculating the center and inclination of the substrate according to the first modification of the first embodiment. [ Fig. 8] Fig. 8 is a plan view illustrating a method for calculating the center and inclination of the substrate according to the second modification of the first embodiment. [ Fig. 9] Fig. 9 is a plan view illustrating a method for calculating the center and inclination of the substrate according to the third modification of the first embodiment. 10 is a plan view illustrating a method of calculating the center and inclination of the substrate according to the fourth modification of the first embodiment. 11 is a plan view illustrating a method for calculating the center and inclination of the substrate according to the fifth modification of the first embodiment. 12 is a plan view illustrating a method for calculating the center and inclination of the substrate according to a sixth modification of the first embodiment. 13 is a plan view illustrating a method of calculating the center and inclination of the substrate according to the seventh modification of the first embodiment. [ Fig. 14 ] A plan view showing a bonding stage according to the second embodiment. [ Fig. 15] Fig. 15 is a diagram illustrating a substrate transfer jig according to the second embodiment. 16 is a plan view illustrating a method for calculating the center of the substrate according to the second embodiment. [ Fig. 17] Fig. 17 is a diagram illustrating detection of an edge of a substrate. [ Fig. 18] Fig. 18 is a diagram illustrating detection of the tilt of the substrate. [ Fig. 19 ] A diagram illustrating a method of measuring the position of a notch. 20 is a plan view illustrating a method of calculating the center of the substrate in the first modification of the second embodiment. [ Fig. 21] Fig. 21 is a diagram illustrating a method of calculating an approximate circle by the least squares method, and obtaining the center (Xc, Yc) and radius (R) of the approximate circle. [ Fig. 22] Fig. 22 is a diagram showing an equation used in a method of calculating an approximate circle by the least squares method and obtaining the center (Xc, Yc) and radius (R) of the approximate circle. 23 is a plan view illustrating a method of calculating the center and size of the substrate according to the second modification of the second embodiment. [ Fig. 24] Fig. 24 is a plan view showing a bonding stage according to a third modification of the second embodiment. [ Fig. 25] Fig. 25 is a diagram illustrating a substrate transfer jig according to a third modification of the second embodiment. [ Fig. 26] Fig. 26 is a plan view showing a bonding stage according to a fourth modification of the second embodiment. [ Fig. 27] Fig. 27 is a diagram illustrating a substrate transfer jig according to a fourth modification of the second embodiment. [ Fig. 28] Fig. 28 is a schematic plan view showing the reverse wafer bonder of the embodiment. [ Fig. 29] Fig. 28 is a diagram illustrating the operation of the pick-up inversion head, the transfer head, and the bonding head when viewed from the direction of arrow A in Fig. 28 . [ Fig. 30] Fig. 30 is a schematic cross-sectional view showing a main part of the wafer supply unit of Fig. 28 . [ Fig. 31] Fig. 31 is a flowchart showing a bonding method performed by the reverse wafer bonder of Fig. 28 .

P: substrate

CN: Center (reference position)

CLU, CRU, CLD, CRD: corners (features)

D: wafer

Claims (25)

A wafer bonding apparatus including: a bonding head for placing a picked-up wafer on an upper surface of a substrate; an imaging device for photographing the aforementioned substrate; a control device for controlling the aforementioned bonding head and the aforementioned camera device; in, the aforementioned control device, Identify and measure the position of the characteristic part of the external shape of the substrate by the camera device, and save the measured position as the initial position; Define a reference position based on the previously measured position; The wafers are sequentially bonded by the bonding head using the reference position as a reference. The wafer bonding apparatus of claim 1, wherein, the aforementioned control device, After the predetermined time has elapsed or after the predetermined number of joints, the position of the aforementioned feature portion is measured again, and the displacement from the aforementioned initial position is measured; Calculate the change of the reference position of the substrate and the expansion and contraction change of the substrate based on the measured displacement, and correct the reference position and the size of the substrate; Based on the corrected reference position and size information, the position of the bonded wafer is corrected, and the wafer is bonded. The wafer bonding apparatus of claim 1 or 2, wherein, The aforementioned substrate is regarded as a rectangular shape in a plane; The aforementioned features are corners or edges of the aforementioned substrate in plan view; The aforementioned reference position is the center of the aforementioned substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The control device calculates the reference position based on two angles of the substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The control device calculates the reference position based on the three corners of the substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The said control apparatus calculates the said reference position based on the four corners of the said board|substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The control device calculates the reference position based on the four edges of the substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The said control apparatus calculates the said reference position based on the five edges of the said board|substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The control device calculates the reference position based on the four edges and two corners of the substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The control device calculates the reference position based on the six edges of the substrate in a plan view. The wafer bonding apparatus of claim 3, wherein, The control device calculates the reference position based on the eight edges of the substrate in a plan view. The wafer bonding apparatus of claim 1 or 2, wherein, The aforementioned substrate is regarded as a circular shape in a plane; The aforementioned feature portion is an edge of the aforementioned substrate in a plan view; The aforementioned reference position is the center of the aforementioned substrate in a plan view. The wafer bonding apparatus of claim 12, wherein, The control device calculates the reference position based on the four edges of the substrate in a plan view. The wafer bonding apparatus of claim 12, wherein, The control device calculates the reference position based on the three edges of the substrate in a plan view. A method of manufacturing a semiconductor device, comprising: (a) a process of carrying in a wafer ring holding a dicing tape having a wafer; (b) the work of bringing the substrate into it; (c) the process of picking up the wafer from the wafer ring and placing the picked-up wafer on the substrate; in, the aforementioned (c) works, Identify and measure the position of the feature portion of the external shape of the substrate by the camera device, and save the measured position as the initial position; Define a reference position based on the previously measured position; The wafers are sequentially bonded using the aforementioned reference position as a reference. A method of manufacturing a semiconductor device as claimed in claim 15, wherein, the aforementioned (c) works, After the predetermined time has elapsed or after the predetermined number of joints, the position of the aforementioned feature portion is measured again, and the displacement from the aforementioned initial position is measured; Calculate the change of the reference position of the substrate and the expansion and contraction change of the substrate based on the measured displacement, and correct the reference position and the size of the substrate; Based on the corrected reference position and size information, the position of the bonded wafer is corrected, and the wafer is bonded. A method of manufacturing a semiconductor device as claimed in claim 15 or 16, wherein, The aforementioned substrate is regarded as a rectangular shape in a plane; The aforementioned features are corners or edges of the aforementioned substrate in plan view; The aforementioned reference position is the center of the aforementioned substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 17, wherein, In the process (c), the reference position is calculated based on the two corners of the substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 17, wherein, In the process (c), the reference position is calculated based on the three corners of the substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 17, wherein, In the process (c), the reference position is calculated based on the four corners of the substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 17, wherein, In the process (c), the reference position is calculated based on the four edges of the substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 17, wherein, In the process (c), the reference position is calculated based on the five edges of the substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 15 or 16, wherein, The aforementioned substrate is regarded as a circular shape in a plane; The aforementioned feature portion is an edge of the aforementioned substrate in a plan view; The aforementioned reference position is the center of the aforementioned substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 23, wherein, In the process (c), the reference position is calculated based on the four edges of the substrate in a plan view. A method of manufacturing a semiconductor device as claimed in claim 23, wherein, In the process (c), the reference position is calculated based on the three edges of the substrate in a plan view.

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