TWI632838B - Pick-and-place soldering system for dual chip modules and method for assembling dual chip modules - Google Patents
Pick-and-place soldering system for dual chip modules and method for assembling dual chip modules Download PDFInfo
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Abstract
一種雙晶片模組的取置焊接系統包括第一及第二承載台以分別容置多個第一晶片及第二晶片。一校準平台置於兩個承載台之間,利用第一及第二取置臂分別取置第一晶片、第二晶片置放於校準平台。一校準定位視覺模組用以補正兩個晶片的位置及角度。雙晶片取放單元具有第一及第二吸嘴,分別吸取第一晶片及第二晶片,第一晶片與第二晶片相距一預定間距。一組裝置料平台容置一電路基板。一基板定位視覺模組修正電路基板的位置。雙晶片取放單元將第一晶片與第二晶片一起置放於電路基板。本發明還提供雙晶片模組的組裝方法。 A pick and place welding system for a two-chip module includes first and second stages to accommodate a plurality of first and second wafers, respectively. A calibration platform is placed between the two carriers, and the first wafer and the second wafer are respectively placed on the calibration platform by the first and second extraction arms. A calibration positioning vision module is used to correct the position and angle of the two wafers. The dual wafer pick-and-place unit has first and second nozzles for respectively sucking the first wafer and the second wafer, and the first wafer and the second wafer are spaced apart by a predetermined distance. A set of device material platforms houses a circuit substrate. A substrate positioning vision module corrects the position of the circuit substrate. The dual wafer pick and place unit places the first wafer and the second wafer together on the circuit substrate. The invention also provides a method of assembling a bimorph module.
Description
本發明乃是關於一種雙晶片模組的取置焊接系統及雙晶片模組的組裝方法,特別是指一種取置焊接系統以及組裝方法,用以取扱、置放並焊接兩個晶片於一電路基板上。 The invention relates to a two-chip module pick-and-place soldering system and a method for assembling a two-chip module, in particular to a pick-and-place soldering system and an assembling method for picking up, placing and soldering two wafers in a circuit. On the substrate.
由於電子技術的進度,電子產品已設有雙晶片模組。例如手機具有雙攝影鏡頭,以進行更進步的影像處理。雙攝影鏡頭需要兩個感光半導體晶片以相距精準的距離焊接在同一電路板上,否則將造成無法擷取準確的影像。 Due to the progress of electronic technology, electronic products have been equipped with dual-chip modules. For example, a mobile phone has a dual photographic lens for more advanced image processing. A dual photographic lens requires two photographic semiconductor wafers to be soldered to the same board at precise distances, which would otherwise result in an inability to capture accurate images.
為著將兩個感光半導體晶片焊接在同一基板,目前的技術是先將第一感光半導體晶片置於基板,加熱焊料以使第一感光半導體晶片焊接於基板。再將第二感光半導體晶片置於同一基板,並且與第一感光半導體晶片相距一預定的距離。然後加熱焊料以使第二感光半導體晶片焊接於基板。然而,基板在被加熱的過程中,因為矽材料做成的晶片的熱膨脹係數遠比一般基板(PCB)材質低很多,因此在加熱過程中常常會有相對位移產生,而導致兩個感光半導體晶片之間的距離改變,造成組裝上的誤差。 In order to solder two photosensitive semiconductor wafers on the same substrate, the current technology is to first place a first photosensitive semiconductor wafer on a substrate, and heat the solder to solder the first photosensitive semiconductor wafer to the substrate. The second photosensitive semiconductor wafer is then placed on the same substrate and spaced a predetermined distance from the first photosensitive semiconductor wafer. The solder is then heated to solder the second photosensitive semiconductor wafer to the substrate. However, in the process of heating the substrate, since the coefficient of thermal expansion of the wafer made of tantalum material is much lower than that of the general substrate (PCB) material, relative displacement is often generated during the heating process, resulting in two photosensitive semiconductor wafers. The distance between them changes, causing errors in assembly.
本發明所要解決的技術問題,在於提供一種雙晶片模組的取 置焊接系統,可以將兩個晶片準確的相距一預定間距焊接於電路基板上,避免組裝上的誤差。 The technical problem to be solved by the present invention is to provide a dual chip module. By placing a soldering system, the two wafers can be accurately soldered to the circuit substrate at a predetermined interval to avoid assembly errors.
此外,本發明要解決的技術問題,更在於提供一種雙晶片模組的組裝方法,可以同時將所述第一晶片及所述第二晶片準確的相距一預定間距置於一電路基板上,避免組裝上的誤差。 In addition, the technical problem to be solved by the present invention is to provide a method for assembling a dual-wafer module, which can simultaneously place the first wafer and the second wafer at a predetermined distance from each other on a circuit substrate to avoid Assembly error.
為了解決上述技術問題,根據本發明之其中一種方案,提供一種雙晶片模組的取置焊接系統,包括至少一承載台供容置多個第一晶片及多個第二晶片;至少一取置臂,每一所述取置臂具有一取置頭;一校準平台,所述取置頭可動地位於所述至少一承載台與所述校準平台之間,所述取置頭取置一個所述第一晶片或一個所述第二晶片置放於所述校準平台;一校準定位視覺模組分別擷取位於所述校準平台上的所述第一晶片以及所述第二晶片的影像,修正所述第一晶片的位置並產生第一位置資訊,修正所述第二晶片的位置並且加入一預定距離的參數以與所述第一位置資訊相距一預定間距,並產生第二位置資訊;一雙晶片取放單元具有一第一吸嘴及一與第一吸嘴相鄰的第二吸嘴,所述第一吸嘴依據所述第一晶片的第一位置資訊吸取所述第一晶片,所述第二吸嘴依據所述第二晶片的第二位置資訊吸取所述第二晶片,其中所述第一晶片與所述第二晶片相距所述預定間距;一組裝置料平台以容置一電路基板;以及一基板定位視覺模組以擷取上述電路基板的影像並修正上述電路基板的位置;其中所述雙晶片取放單元將所述第一晶片與所述第二晶片一起置放於所述電路基板。 In order to solve the above technical problem, according to one aspect of the present invention, a two-chip module pick-and-place soldering system is provided, comprising at least one carrying platform for accommodating a plurality of first wafers and a plurality of second wafers; An arm, each of the arm has a take-up head; a calibration platform, the pick-up head is movably located between the at least one carrier and the calibration platform, and the pick-up head takes one of the a first wafer or a second wafer is placed on the calibration platform; a calibration positioning vision module respectively captures images of the first wafer and the second wafer located on the calibration platform, and the correction Determining the position of the first wafer and generating first position information, correcting the position of the second wafer and adding a parameter of a predetermined distance to a predetermined distance from the first position information, and generating second position information; The wafer pick-and-place unit has a first nozzle and a second nozzle adjacent to the first nozzle, and the first nozzle picks up the first wafer according to the first position information of the first wafer. Second suction Extracting the second wafer according to the second position information of the second wafer, wherein the first wafer is spaced apart from the second wafer by the predetermined spacing; a set of device material platforms to accommodate a circuit substrate; The substrate positioning vision module captures an image of the circuit substrate and corrects a position of the circuit substrate; wherein the dual wafer pick and place unit places the first wafer and the second wafer together on the circuit substrate.
為了解決上述另一技術問題,根據本發明之其中一種方案,提供一種雙晶片模組的組裝方法,包括下列步驟:取扱一第一晶片,並置放於一校準平台;擷取位在所述校準平台上的所述第一晶片的影像,並修正所述第一晶片的位置,並產生第一位置資訊;利用一雙晶片取放單元的第一吸嘴依據所述第一位置資訊, 吸取所述第一晶片;取扱一第二晶片,並置放於所述校準平台;擷取位在所述校準平台上的所述第二晶片的影像,並修正所述第二晶片的位置,加入一預定距離的參數於所述第二位置資訊以與所述第一位置資訊相距一預定間距,並產生第二位置資訊;利用所述雙晶片取放單元的第二吸嘴依據所述第二位置資訊,吸取所述第二晶片;以及移動所述雙晶片取放單元並同時將所述第一晶片及所述第二晶片置於一電路基板上。 In order to solve the above other technical problem, according to one aspect of the present invention, a method for assembling a bimorph module is provided, comprising the steps of: taking a first wafer and placing it on a calibration platform; An image of the first wafer on the platform, and correcting a position of the first wafer, and generating first position information; using a first nozzle of a dual wafer pick and place unit according to the first position information, Drawing the first wafer; taking a second wafer and placing it on the calibration platform; capturing an image of the second wafer on the calibration platform, and correcting the position of the second wafer, adding a predetermined distance parameter in the second position information at a predetermined distance from the first position information, and generating second position information; using the second nozzle of the dual wafer pick and place unit according to the second Positioning information, drawing the second wafer; and moving the dual wafer pick and place unit and simultaneously placing the first wafer and the second wafer on a circuit substrate.
優選的,本發明的雙晶片模組的取置焊接系統,還包括一容置所述多個第一晶片的第一承載台、一第一取置臂、一容置所述多個第二晶片的第二承載台、及一第二取置臂,所述第一取置臂依序由所述第一承載台取置一個所述第一晶片置於所述校準平台上;當所述雙晶片取放單元由所述校準平台上取走所述第一晶片後,所述第二取置臂由所述第二承載台依序取置一個所述第二晶片置於所述校準平台上;當所述雙晶片取放單元由所述校準平台上取走所述第二晶片後,所述第一取置臂由所述第一承載台依序取置一個所述第一晶片置於所述校準平台上。 Preferably, the pick-and-place soldering system of the dual-chip module of the present invention further includes a first carrying platform for accommodating the plurality of first wafers, a first pick-up arm, and a plurality of second a second carrier of the wafer, and a second pick-up arm, wherein the first pick-up arm sequentially takes a first wafer from the first carrier to be placed on the calibration platform; After the dual wafer pick-and-place unit removes the first wafer from the calibration platform, the second pick-up arm sequentially takes a second wafer from the second carrier to be placed on the calibration platform. After the two wafer pick-and-place unit removes the second wafer from the calibration platform, the first pick-up arm sequentially takes one of the first wafers from the first carrier On the calibration platform.
本發明具有以下有益效果:本發明的雙晶片模組的取置焊接系統具有兩組的承載台,可以組裝兩種不同種類的晶片。兩組的承載台可以共同搭配一個校準平台、以及一個校準定位視覺模組。校準平台與校準定位視覺模組置於兩組的承載台之間。晶片放置在校準平台上,藉由移動校準平台以進行位置補正及角度補正,不需要另外的工具以吸取晶片來進行偏移補正。本發明的雙晶片取放單元可以從校準平台上分次取起第一晶片及第二晶片,同時將兩個晶片帶到組裝置料平台的電路基板上方,雙晶片取放單元具有加熱模組,加熱晶片底部邊緣的充填劑,例如環氧樹脂,可以在封合(bonding)時加熱預固化,可以確保晶片的平面度,並 避免晶片在焊接過程產生位移。雙晶片取放單元配合所述組裝置料平台,可以準確地將兩個晶片同時向下封合至電路基板上。 The invention has the following beneficial effects: the pick and place welding system of the two-chip module of the invention has two sets of carrying platforms, and two different kinds of wafers can be assembled. The two sets of stages can be combined with a calibration platform and a calibration positioning vision module. The calibration platform and the calibration positioning vision module are placed between the two sets of loading platforms. The wafer is placed on the calibration platform. By moving the calibration platform for position correction and angle correction, no additional tools are needed to pick up the wafer for offset correction. The dual wafer pick and place unit of the present invention can take the first wafer and the second wafer in stages from the calibration platform, and simultaneously bring the two wafers onto the circuit substrate of the group device material platform, and the dual wafer pick and place unit has a heating module. a filler that heats the bottom edge of the wafer, such as an epoxy resin, can be pre-cured by heating during bonding to ensure wafer flatness, and Avoid wafer displacement during the soldering process. The dual wafer pick and place unit cooperates with the set of device material platforms to accurately seal the two wafers down to the circuit substrate at the same time.
為了能更進一步瞭解本發明為達成既定目的所採取之技術、方法及功效,請參閱以下有關本發明之詳細說明、圖式,相信本發明之目的、特徵與特點,當可由此得以深入且具體之瞭解,然而所附圖式與附件僅提供參考與說明用,並非用來對本發明加以限制者。 In order to further understand the technology, method and effect of the present invention in order to achieve the intended purpose, reference should be made to the detailed description and drawings of the present invention. The drawings and the annexed drawings are intended to be illustrative and not to limit the invention.
C1‧‧‧第一晶片 C1‧‧‧ first chip
10a‧‧‧第一承載台 10a‧‧‧First carrier
C2‧‧‧第二晶片 C2‧‧‧second chip
10b‧‧‧第二承載台 10b‧‧‧Second carrier
20a‧‧‧第一取置臂 20a‧‧‧First arm
21a‧‧‧第一動力源 21a‧‧‧First power source
22a‧‧‧第一臂部 22a‧‧‧First arm
20b‧‧‧第二取置臂 20b‧‧‧Second arm
21b‧‧‧第二動力源 21b‧‧‧second power source
22b‧‧‧第二臂部 22b‧‧‧ second arm
30‧‧‧校準平台 30‧‧‧ Calibration platform
40‧‧‧校準定位視覺模組 40‧‧‧ Calibration Positioning Vision Module
50‧‧‧雙晶片取放單元 50‧‧‧Double wafer pick and place unit
51a‧‧‧第一吸嘴 51a‧‧‧First nozzle
51b‧‧‧第二吸嘴 51b‧‧‧second nozzle
52‧‧‧加熱模組 52‧‧‧heating module
60‧‧‧組裝置料平台 60‧‧‧Group equipment platform
70‧‧‧基板定位視覺模組 70‧‧‧Substrate positioning vision module
P‧‧‧電路基板 P‧‧‧ circuit substrate
d1‧‧‧預定間距 D1‧‧‧predetermined spacing
d2,d3‧‧‧距離 D2, d3‧‧‧ distance
圖1為本發明的雙晶片模組的取置焊接系統的俯視示意圖。 1 is a top plan view of a take-up welding system of a two-chip module of the present invention.
圖2至圖11分別為本發明的雙晶片模組的取置焊接系統各個組裝步驟的俯視示意圖。 2 to 11 are top plan views showing respective assembly steps of the take-up welding system of the two-chip module of the present invention.
請參考圖1,為本發明之雙晶片模組的取置焊接系統的俯視示意圖。本發明提供一種雙晶片模組的取置焊接系統,其包括一容置多個第一晶片C1的第一承載台10a、一容置多個第二晶片C2的第二承載台10b、一第一取置臂20a、一第二取置臂20b、一校準平台30、一校準定位視覺模組40、一雙晶片取放單元50、一組裝置料平台60以及一基板定位視覺模組70。 Please refer to FIG. 1 , which is a top plan view of the pick and place welding system of the dual wafer module of the present invention. The present invention provides a two-chip module pick-and-place soldering system including a first carrier 10a for accommodating a plurality of first wafers C1, a second carrier 10b for accommodating a plurality of second wafers C2, and a first A take-up arm 20a, a second pick-up arm 20b, a calibration platform 30, a calibration positioning vision module 40, a dual wafer pick-and-place unit 50, a set of equipment material platforms 60, and a substrate positioning vision module 70.
本發明適用於兩個晶片需要以精確的距離焊接於一電路基板P上,第一晶片C1與第二晶片C2可以是不同種類。多個第一晶片C1可以是在一個晶圓上,多個第二晶片C2可以是在另一個晶圓上。晶片例如是可記錄光線變化的半導體晶片,例如CCD(Charge Coupled Device,感光耦合元件)或CMOS(Complementary Metal-Oxide Semiconductor,互補式金屬氧化物半導體),但本發明不限制於此。 The present invention is applicable to two wafers that need to be soldered to a circuit substrate P at a precise distance. The first wafer C1 and the second wafer C2 may be of different kinds. The plurality of first wafers C1 may be on one wafer, and the plurality of second wafers C2 may be on another wafer. The wafer is, for example, a semiconductor wafer that can record light changes, such as a CCD (Charge Coupled Device) or a CMOS (Complementary Metal-Oxide Semiconductor), but the present invention is not limited thereto.
所述第一取置臂20a與第二取置臂20b各具有一個可以吸取 及置放的取置頭(如真空吸頭、吸盤或其他具有搬移能力之裝置...等,圖略)以吸附第一晶片C1與第二晶片C2。第一取置臂20a的取置頭可動地位於所述第一承載台10a與校準平台30之間,第二取置臂20b的取置頭可動地位於所述第二承載台10b與校準平台30之間。 The first arm 20a and the second arm 20b each have a suctionable And the placing head (such as a vacuum head, a suction cup or other device having a moving ability, etc., omitted) is used to adsorb the first wafer C1 and the second wafer C2. The take-up head of the first arm 20a is movably located between the first stage 10a and the calibration platform 30, and the take-up head of the second arm 20b is movably located on the second stage 10b and the calibration platform Between 30.
本實施例各元件的動線安排描述如下,所述校準平台30位於所述第一承載台10a與所述第二承載台10b之間。校準平台30、第一承載台10a與第二承載台10b大致位於同一動線上。另外,校準平台30、雙晶片取放單元50與組裝置料平台60大致位於另一動線上。兩條動線大致呈T字形。此種安排,可提高工作的效率。 The moving line arrangement of each component of this embodiment is described as follows. The calibration platform 30 is located between the first carrier 10a and the second carrier 10b. The calibration platform 30, the first carrier 10a and the second carrier 10b are located substantially on the same moving line. In addition, the calibration platform 30, the dual wafer pick and place unit 50, and the group device material platform 60 are located substantially on the other moving line. The two moving lines are roughly T-shaped. Such an arrangement can increase the efficiency of work.
第一取置臂20a與第二取置臂20b分別位於校準平台30的兩側,第一取置臂20a具有第一動力源21a及第一臂部22a,第一動力源21a驅動第一臂部22a左右來回移動;第二取置臂20b具有第二動力源21b及第二臂部22b。第二動力源21b驅動第二臂部22b左右來回移動。 The first arm 20a and the second arm 20b are respectively located at two sides of the calibration platform 30. The first arm 20a has a first power source 21a and a first arm 22a, and the first power source 21a drives the first arm. The portion 22a moves back and forth, and the second arm 22b has a second power source 21b and a second arm portion 22b. The second power source 21b drives the second arm portion 22b to move left and right.
簡要的說明,本發明依據上述的機構設計,提供一種雙晶片模組的組裝方法,包括下列步驟:取扱一第一晶片C1,並置放於一校準平台30;擷取位在所述校準平台30上的所述第一晶片C1的影像,並修正所述第一晶片C1的位置,並產生第一位置資訊;第一位置資訊代表第一晶片C1校準後的位置;利用一雙晶片取放單元50的第一吸嘴51a依據所述第一位置資訊,吸取所述第一晶片C1;取扱一第二晶片C2,並置放於所述校準平台30;擷取位在所述校準平台30上的所述第二晶片C2的影像,並修正所述第二晶片C2的位置,加入一預定距離的參數於所述第二位置資訊以與所述第一位置資訊相距一預定間距,並產生第二位 置資訊;第二位置資訊代表第二晶片C2校準後的位置;利用所述雙晶片取放單元50的第二吸嘴51b依據所述第二位置資訊,吸取所述第二晶片C2;最後,移動所述雙晶片取放單元50並同時將所述第一晶片C1及所述第二晶片C2置於一電路基板P上。 Briefly, the present invention provides a method for assembling a two-chip module according to the above-described mechanism design, comprising the steps of: taking a first wafer C1 and placing it on a calibration platform 30; The image of the first wafer C1 is corrected, and the position of the first wafer C1 is corrected, and first position information is generated; the first position information represents the position of the first wafer C1 after calibration; and a double wafer pick and place unit is utilized. The first nozzle 51a of the 50 draws the first wafer C1 according to the first position information; takes a second wafer C2 and places it on the calibration platform 30; and captures the position on the calibration platform 30. Image of the second wafer C2, and correcting the position of the second wafer C2, adding a parameter of a predetermined distance to the second position information to be spaced apart from the first position information by a predetermined distance, and generating a second Bit Positioning information; the second position information represents the position of the second wafer C2 after calibration; the second nozzle 51b of the dual wafer pick and place unit 50 draws the second wafer C2 according to the second position information; The twin wafer pick-and-place unit 50 is moved while the first wafer C1 and the second wafer C2 are simultaneously placed on a circuit substrate P.
其中第一吸嘴51a與第二吸嘴51b之間的距離對應於上述第一晶片C1及第二晶片C2之間的預定間距。藉此第一晶片C1及第二晶片C2被校準過,並且由雙晶片取放單元50的第一吸嘴51a與第二吸嘴51b固定。因此本實施例可以同時將所述第一晶片C1及所述第二晶片C2準確的相距一預定間距置於電路基板P上,避免組裝上的誤差。 The distance between the first nozzle 51a and the second nozzle 51b corresponds to a predetermined interval between the first wafer C1 and the second wafer C2. Thereby, the first wafer C1 and the second wafer C2 are calibrated, and the first nozzle 51a of the twin wafer pick-and-place unit 50 is fixed to the second nozzle 51b. Therefore, in this embodiment, the first wafer C1 and the second wafer C2 can be accurately placed on the circuit substrate P at a predetermined interval, thereby avoiding assembly errors.
以下配合圖2至圖11,說明本發明雙晶片組裝的流程如下。如圖2所示,所述第一取置臂20a由所述第一承載台10a取置一個所述第一晶片C1置於校準平台30上。此流程同時也可以將一電路基板P移到組裝置料平台60。 The flow of the dual wafer assembly of the present invention will be described below with reference to FIGS. 2 through 11. As shown in FIG. 2, the first pick-up arm 20a is placed on the calibration platform 30 by the first carrier 10a. This process can also move a circuit substrate P to the group device platform 60.
如圖3所示,校準定位視覺模組40移至校準平台30的上方,並藉由校準定位視覺模組40並配合所述校準平台30的移動以準確地定位第一晶片C1的位置及角度。組裝置料平台60承載電路基板P。基板定位視覺模組70移至組裝置料平台60的上方,並配合所述組裝置料平台60進行電路基板P的位置補正。 As shown in FIG. 3, the calibration positioning vision module 40 moves over the calibration platform 30 and accurately positions the position and angle of the first wafer C1 by aligning the positioning vision module 40 with the movement of the calibration platform 30. . The group device platform 60 carries the circuit substrate P. The substrate positioning vision module 70 is moved above the group device material platform 60, and the position correction of the circuit substrate P is performed in conjunction with the group device material platform 60.
本實施例上述修正所述第一晶片C1的位置的步驟中,包括:利用所述校準定位視覺模組40擷取該第一晶片C1的影像並分析該第一晶片C1的偏移值,所述校準平台30依據所述偏移值沿著X軸、Y軸及θ軸進行該第一晶片C1的偏移補正。 The step of modifying the position of the first wafer C1 in the embodiment includes: capturing the image of the first wafer C1 by using the calibration positioning vision module 40 and analyzing the offset value of the first wafer C1. The calibration platform 30 performs offset correction of the first wafer C1 along the X-axis, the Y-axis, and the θ-axis according to the offset value.
本發明的校準定位視覺模組40的位置大致位於校準平台30上方。校準定位視覺模組40分別擷取位於所述校準平台30上的所述第一晶片C1或所述第二晶片C2的影像,並修正所述第一晶片C1的位置並產生第一位置資訊。 The position of the calibration positioning vision module 40 of the present invention is generally above the calibration platform 30. The calibration positioning vision module 40 respectively captures images of the first wafer C1 or the second wafer C2 located on the calibration platform 30, and corrects the position of the first wafer C1 and generates first position information.
在具體實施例中,校準定位視覺模組40可為一種上視覺檢測裝置,以用於檢視晶片的上表面影像,例如晶片的定位標誌的位置,以利用影像分析判斷晶片的偏移值,並將檢知結果傳遞給控制單元等等(圖未示),以控制後續的偏移補正步驟。 In a specific embodiment, the calibration positioning vision module 40 can be an upper vision detecting device for viewing an image of an upper surface of the wafer, such as a position of a positioning mark of the wafer, to determine the offset value of the wafer by using image analysis, and The detection result is transmitted to a control unit or the like (not shown) to control the subsequent offset correction step.
本實施例利用所述校準平台30依據晶片的偏移值進行補正,包括沿著X軸或Y軸的位移以調整晶片的位置,或者沿著θ軸(也就是Z軸方向)轉動以調整晶片的角度,以補正每一晶片的偏移值。此種方式的優點在於,不需要利用吸取頭移動晶片以進行偏移補正。 The embodiment uses the calibration platform 30 to perform correction according to the offset value of the wafer, including displacement along the X-axis or the Y-axis to adjust the position of the wafer, or rotate along the θ axis (ie, the Z-axis direction) to adjust the wafer. The angle to correct the offset value of each wafer. An advantage of this approach is that there is no need to move the wafer with the pick-up head for offset correction.
以第一晶片C1為例,校準定位視覺模組40擷取該第一晶片C1的影像並分析該第一晶片C1的偏移值,所述校準平台30具有X軸、Y軸及θ軸的位移機構(例如伺服馬達)並依據所述偏移值進行該第一晶片C1的偏移補正。換言之,可以沿著圖3的水平方向、及垂直方向移動,還可以轉動,藉此第一晶片C1在校準平台30被移動至正確的位置以及角度,以完成位置補正以及角度補正。 Taking the first wafer C1 as an example, the calibration positioning vision module 40 captures an image of the first wafer C1 and analyzes an offset value of the first wafer C1. The calibration platform 30 has an X-axis, a Y-axis, and a θ-axis. A displacement mechanism (for example, a servo motor) performs offset correction of the first wafer C1 according to the offset value. In other words, it is possible to move in the horizontal direction and the vertical direction of FIG. 3, and also to rotate, whereby the first wafer C1 is moved to the correct position and angle at the calibration platform 30 to complete position correction and angle correction.
具體而言,以第一晶片C1為例,可分為以下步驟:首先,校準定位視覺模組40擷取該第一晶片C1的影像,並且比對第一晶片C1預定被雙晶片取放單元50吸取的第一位置資訊(X1,Y1),然後分析該第一晶片C1的偏移值。接著,將第一晶片C1的偏移值的檢知結果傳遞給控制單元,控制單元控制所述校準平台30的X軸、Y軸及θ軸的位移機構,以移動所述校準平台30,使第一晶片C1被移動至正確角度與正確位置,亦即位於預定被雙晶片取放單元50吸取的第一位置。藉此,所述第一吸嘴51a依據所述第一晶片C1的第一位置資訊(X1,Y1)吸取所述第一晶片C1。 Specifically, the first wafer C1 can be divided into the following steps: First, the calibration positioning vision module 40 captures the image of the first wafer C1, and compares the first wafer C1 with the dual wafer pick-and-place unit. The first position information (X1, Y1) is taken up by 50, and then the offset value of the first wafer C1 is analyzed. Next, the detection result of the offset value of the first wafer C1 is transmitted to the control unit, and the control unit controls the displacement mechanisms of the X-axis, the Y-axis, and the θ-axis of the calibration platform 30 to move the calibration platform 30 so that The first wafer C1 is moved to the correct angle and the correct position, that is, at a first position that is predetermined to be picked up by the twin wafer pick and place unit 50. Thereby, the first nozzle 51a draws the first wafer C1 according to the first position information (X1, Y1) of the first wafer C1.
如圖4所示,雙晶片取放單元50由所述校準平台30上吸取第一晶片C1。雙晶片取放單元50具有一第一吸嘴51a、及一第二吸嘴51b與第一吸嘴51a相鄰併置,第一吸嘴51a與第二吸嘴51b之間的距離d2對應於組裝後的第一晶片C1及第二晶片C2之間的 預定間距d1(參圖8)。本實施例中,雙晶片取放單元50沿著Y軸移動至校準平台30上方,藉由雙晶片取放單元50的第一吸嘴51a取扱第一晶片C1。 As shown in FIG. 4, the dual wafer pick and place unit 50 draws the first wafer C1 from the calibration platform 30. The dual wafer pick-and-place unit 50 has a first suction nozzle 51a and a second suction nozzle 51b adjacent to the first suction nozzle 51a. The distance d2 between the first suction nozzle 51a and the second suction nozzle 51b corresponds to the assembly. Between the first wafer C1 and the second wafer C2 The predetermined distance d1 (refer to Figure 8). In this embodiment, the dual wafer pick and place unit 50 moves along the Y axis to the calibration platform 30, and the first wafer C1 is taken up by the first nozzle 51a of the dual wafer pick and place unit 50.
此時,校準定位視覺模組40可以移出校準平台30。或者,校準定位視覺模組40可以是位於校準平台30較高的位置而不影響雙晶片取放單元50的進出。 At this point, the calibration positioning vision module 40 can be moved out of the calibration platform 30. Alternatively, the calibration positioning vision module 40 can be located at a higher position of the calibration platform 30 without affecting the entry and exit of the dual wafer pick and place unit 50.
如圖5所示,雙晶片取放單元50持續吸著第一晶片C1並沿著Y軸移出校準平台30。 As shown in FIG. 5, the dual wafer pick and place unit 50 continues to suck the first wafer C1 and move out of the calibration platform 30 along the Y axis.
如圖6所示,所述第二取置臂20b由第二承載台10b依序取置一個所述第二晶片C2置於校準平台30上。 As shown in FIG. 6, the second pick-up arm 20b is sequentially placed on the calibration platform 30 by the second stage Cb.
如圖7所示,藉由校準定位視覺模組40準確地定位第二晶片C2。修正所述第二晶片C2的位置而產生第二位置資訊,過程中,如圖8所示,還加入一預定距離的參數於所述第二位置資訊(X2,Y2)以與所述第一位置相距一預定間距d1。其中電路基板P表面設有分別對應於第一晶片C1與第二晶片C2的兩個定位記號,如圖式中“X”所表示,兩個定位記號之間的距離d3等於第一吸嘴51a與第二吸嘴51b之間的距離d2,也就是等於第一晶片C1及第二晶片C2之間的預定間距d1。 As shown in FIG. 7, the second wafer C2 is accurately positioned by the calibration positioning vision module 40. Correcting the position of the second wafer C2 to generate second position information. In the process, as shown in FIG. 8, a parameter of a predetermined distance is further added to the second position information (X2, Y2) to be the first The positions are separated by a predetermined distance d1. The surface of the circuit board P is provided with two positioning marks respectively corresponding to the first wafer C1 and the second wafer C2, as indicated by “X” in the figure, and the distance d3 between the two positioning marks is equal to the first nozzle 51a. The distance d2 from the second nozzle 51b, that is, is equal to the predetermined interval d1 between the first wafer C1 and the second wafer C2.
以第二晶片C2為例,校準定位視覺模組40擷取該第二晶片C2的影像並分析該第二晶片C2的偏移值,所述校準平台30依據所述偏移值進行該第二晶片C2的偏移補正,所述校準平台30依據上述預定間距d1的參數移動所述第二晶片C2。 Taking the second wafer C2 as an example, the calibration positioning vision module 40 captures the image of the second wafer C2 and analyzes the offset value of the second wafer C2, and the calibration platform 30 performs the second according to the offset value. The offset of the wafer C2 is corrected, and the calibration platform 30 moves the second wafer C2 according to the parameter of the predetermined pitch d1.
具體而言,針對第二晶片C2,首先,校準定位視覺模組40擷取該第二晶片C2的影像,並且比對第二晶片C2預定被雙晶片取放單元50吸取的第二位置資訊(X2,Y2),其中第二位置資訊(X2,Y2)已包括加入一預定距離的參數而與所述第一位置(X1,Y1)相距一預定間距d1。然後分析該第二晶片C2的偏移值。接著,將第二晶片C2的偏移值的檢知結果傳遞給控制單元(圖略),控制單元 控制所述校準平台30的X軸、Y軸及θ軸的位移機構,以移動所述校準平台30,使第二晶片C2被移動至正確角度與正確位置,亦即位於預定被雙晶片取放單元50吸取的第二位置(X2,Y2)。 Specifically, for the second wafer C2, first, the calibration positioning vision module 40 captures the image of the second wafer C2, and compares the second position information that the second wafer C2 is intended to be sucked by the dual wafer pick-and-place unit 50 ( X2, Y2), wherein the second position information (X2, Y2) has included a parameter for adding a predetermined distance and a predetermined distance d1 from the first position (X1, Y1). The offset value of the second wafer C2 is then analyzed. Next, the detection result of the offset value of the second wafer C2 is transmitted to the control unit (not shown), and the control unit Controlling the X-axis, Y-axis and θ-axis displacement mechanism of the calibration platform 30 to move the calibration platform 30 to move the second wafer C2 to the correct angle and the correct position, that is, to be placed on the dual wafer The second position (X2, Y2) that unit 50 draws.
如圖9所示,雙晶片取放單元50沿著Y軸方向移動至校準平台30上方,藉由所述雙晶片取放單元50的第二吸嘴51b由所述校準平台30上吸取第二晶片C2。藉此所述雙晶片取放單元50可以準確地同時以並列的方式吸附第一晶片C1及第二晶片C2。所述第二吸嘴51b依據所述第二晶片C2的第二位置資訊(X2,Y2)吸取所述第二晶片C2,其中所述第一晶片C1與所述第二晶片C2相距所述預定間距d1。雙晶片取放單元50將第一晶片C1與第二晶片C2從校準平台30上取起後,帶到電路基板P上方。 As shown in FIG. 9, the dual wafer pick-and-place unit 50 is moved above the calibration platform 30 along the Y-axis direction, and the second nozzle 51b of the dual wafer pick-and-place unit 50 is sucked by the calibration platform 30. Wafer C2. Thereby, the dual wafer pick-and-place unit 50 can accurately adsorb the first wafer C1 and the second wafer C2 in a side-by-side manner. The second nozzle 51b draws the second wafer C2 according to the second position information (X2, Y2) of the second wafer C2, wherein the first wafer C1 is spaced apart from the second wafer C2 by the predetermined The spacing is d1. The dual wafer pick and place unit 50 takes the first wafer C1 and the second wafer C2 from the calibration platform 30 and then brings them over the circuit substrate P.
本實施例中,較佳的,雙晶片取放單元50還具有一加熱模組52,加熱模組52加熱所述第一晶片C1及所述第二晶片C2,藉此預固化(cured)晶片底部邊緣的充填劑,加熱後並向下封合於電路基板P上,可以確保晶片的平面度,還可以避免第一晶片C1及第二晶片C2在焊接過程中因熱脹冷縮產生的偏移。 In this embodiment, preferably, the dual wafer pick-and-place unit 50 further has a heating module 52. The heating module 52 heats the first wafer C1 and the second wafer C2, thereby precuring the wafer. The filler at the bottom edge, after being heated and sealed down on the circuit substrate P, can ensure the flatness of the wafer, and can also avoid the deviation of the first wafer C1 and the second wafer C2 due to thermal expansion and contraction during the soldering process. shift.
如圖10所示,雙晶片取放單元50沿著Y軸方向移動至組裝置料平台60的上方。藉由基板定位視覺模組70,雙晶片取放單元50同時將第一晶片C1及第二晶片C2置於組裝置料平台60上的電路基板P。當置放晶片於組裝置料平台60,雙晶片取放單元50較佳地施加一些壓力,使被加熱過的第一晶片C1及第二晶片C2更良好的固著於電路基板P。這樣完成一個循環。雙晶片取放單元50置放晶片時,同時,第一取置臂20a可以再由所述第一承載台10a依序取置一個所述第一晶片C1置於所述校準平台30上。 As shown in FIG. 10, the twin wafer pick-and-place unit 50 is moved above the group device stock platform 60 in the Y-axis direction. By the substrate positioning vision module 70, the dual wafer pick and place unit 50 simultaneously places the first wafer C1 and the second wafer C2 on the circuit substrate P on the group device platform 60. When the wafer is placed on the group device platform 60, the dual wafer pick and place unit 50 preferably applies some pressure to better fix the heated first wafer C1 and the second wafer C2 to the circuit substrate P. This completes a loop. When the dual wafer pick-and-place unit 50 is placed on the wafer, the first pick-up arm 20a can be sequentially placed on the calibration platform 30 by the first carrier 10a.
如圖11所示,雙晶片取放單元50再移至校準平台30上方,以吸取第一晶片C1。 As shown in FIG. 11, the dual wafer pick and place unit 50 is moved over the calibration platform 30 to pick up the first wafer C1.
本實施例的雙晶片取放單元50具有Y軸及θ軸的位移機構,配合所述組裝置料平台60。換言之,雙晶片取放單元50只需 要沿著圖式的Y軸方向移動,第一吸嘴51a與第二吸嘴51b之間的距離d2等於第一晶片C1與第二晶片C2相距的預定間距d1。第一晶片C1的第一位置資訊(X1,Y1)的X軸座標(X1)可以是已被預先設定位於第一吸嘴51a的Y軸移動的路徑上;第二晶片C2的第二位置資訊(X2,Y2)的X軸座標(X2)已被預先設定位於第二吸嘴51b的Y軸移動的路徑上。因此雙晶片取放單元50可以不需要沿著X軸移動。 The dual wafer pick and place unit 50 of the present embodiment has a Y-axis and a θ-axis displacement mechanism that cooperate with the set of device material platforms 60. In other words, the dual wafer pick and place unit 50 only needs To move in the Y-axis direction of the drawing, the distance d2 between the first nozzle 51a and the second nozzle 51b is equal to a predetermined distance d1 from the first wafer C1 and the second wafer C2. The X-axis coordinate (X1) of the first position information (X1, Y1) of the first wafer C1 may be a path that has been previously set to move on the Y-axis of the first nozzle 51a; the second position information of the second wafer C2 The X-axis coordinate (X2) of (X2, Y2) has been previously set on the path in which the Y-axis of the second nozzle 51b moves. Therefore, the dual wafer pick and place unit 50 may not need to move along the X axis.
本實施例的組裝置料平台60具有X軸位移機構,可沿著X軸的方向移動補正電路基板P的位置。基板定位視覺模組70可動地設於組裝置料平台60的上方,用以擷取上述電路基板P的影像並配合所述組裝置料平台60的位移以修正上述電路基板P的位置。 The group device material platform 60 of the present embodiment has an X-axis displacement mechanism that can move the position of the correction circuit substrate P in the direction of the X-axis. The substrate positioning vision module 70 is movably disposed above the group device platform 60 for capturing the image of the circuit substrate P and matching the displacement of the group of device platforms 60 to correct the position of the circuit substrate P.
本實施例中,所述基板定位視覺模組70具有Y軸位移機構,移入所述組裝置料平台60上方或移出所述組裝置料平台60上方,藉此可以針對電路基板P進行定位取像。當需要補正電路基板P時,藉由所述組裝置料平台60移動電路基板P的位置。 In this embodiment, the substrate positioning vision module 70 has a Y-axis displacement mechanism, which is moved over the group device platform 60 or removed from the group device platform 60, thereby performing positioning and imaging on the circuit substrate P. . When the circuit substrate P needs to be corrected, the position of the circuit substrate P is moved by the set of device material platforms 60.
當電路基板P需要進行Y軸與θ軸補正時,本實施例可以由雙晶片取放單元50進行補正,調整第一晶片C1與所述第二晶片C2以對準於電路基板P的位置。藉此,所述雙晶片取放單元50可以準確地將所述第一晶片C1與所述第二晶片C2一起置放於所述電路基板P。第一晶片C1與第二晶片C2相距的預定間距d1,也就是對應於電路基板P上的兩個定位記號的位置,亦即圖7中兩個“X”定位記號之間的距離d3。 When the circuit board P needs to perform the Y-axis and the θ-axis correction, the present embodiment can be corrected by the dual-chip pick-and-place unit 50 to adjust the positions of the first wafer C1 and the second wafer C2 to be aligned with the circuit board P. Thereby, the dual wafer pick-and-place unit 50 can accurately place the first wafer C1 and the second wafer C2 on the circuit substrate P together. The predetermined distance d1 between the first wafer C1 and the second wafer C2, that is, the position corresponding to the two positioning marks on the circuit substrate P, that is, the distance d3 between the two "X" positioning marks in FIG.
本發明的組裝置料平台60可以進行兩晶片有180度相位差的製程。取放或取置的機構可以採用線性馬達,再搭配高精度光學尺,以確保移動精度。此外,組裝置料平台60較佳可以設置一輔助加熱裝置(圖略),以適當加熱電路基板P,以供第一晶片C1與第二晶片C2置放於電路基板P上面時,有助於固定與焊接。 The group device platform 60 of the present invention can perform a process in which the two wafers have a phase difference of 180 degrees. The pick-and-place or take-up mechanism can be equipped with a linear motor and a high-precision optical ruler to ensure the accuracy of the movement. In addition, the group device platform 60 may preferably be provided with an auxiliary heating device (not shown) to appropriately heat the circuit substrate P for the first wafer C1 and the second wafer C2 to be placed on the circuit substrate P. Fix and weld.
上述僅為本發明的一種實施方式,本發明並不受限於此,例如,承載台的數量可以是至少一個,同時容置多個第一晶片C1及多個第二晶片C2。取置臂的數量可以是至少一個,每一取置臂具有一取置頭。所述取置頭可動地位於所述至少一承載台與所述校準平台之間,所述取置頭取置一個所述第一晶片C1或一個所述第二晶片C2置放於所述校準平台30。 The above is only one embodiment of the present invention, and the present invention is not limited thereto. For example, the number of the carrying stations may be at least one, and the plurality of first wafers C1 and the plurality of second wafers C2 are accommodated at the same time. The number of the take-up arms may be at least one, and each of the take-up arms has a take-up head. The pick-up head is movably disposed between the at least one carrier and the calibration platform, and the pick-up head takes one of the first wafer C1 or one of the second wafers C2 and is placed on the calibration platform. 30.
本發明之特點及功能在於: The features and functions of the present invention are:
一、本發明的雙晶片模組的取置焊接系統具有兩組的承載台,可以組裝兩種不同種類的晶片。兩組的承載台(10a、10b)可以共同搭配一個校準平台30、以及一個校準定位視覺模組40。校準平台30與校準定位視覺模組40置於兩組的承載台(10a、10b)之間。晶片放置在校準平台30上,利用校準平台30沿著X軸、Y軸及θ軸,以進行位置補正及角度補正,不需要另外的工具以吸取晶片來進行偏移補正。 1. The two-chip module pick-and-place soldering system of the present invention has two sets of carrying stages for assembling two different types of wafers. The two sets of carrying platforms (10a, 10b) can be combined with a calibration platform 30 and a calibration positioning vision module 40. The calibration platform 30 and the calibration positioning vision module 40 are placed between the two sets of carrying platforms (10a, 10b). The wafer is placed on the calibration platform 30, and the calibration platform 30 is used along the X-axis, the Y-axis, and the θ-axis for position correction and angle correction, and no additional tools are needed to pick up the wafer for offset correction.
二、本發明的雙晶片取放單元50可以從校準平台30分次取起第一晶片C1及第二晶片C2,同時將兩個晶片帶到組裝置料平台60的電路基板P上方,雙晶片取放單元50具有加熱模組52,加熱晶片底部邊緣的充填劑,例如環氧樹脂,可以在封合(bonding)時加熱預固化,可以確保晶片的平面度,並避免晶片在焊接過程產生位移。 2. The dual wafer pick and place unit 50 of the present invention can take the first wafer C1 and the second wafer C2 from the calibration platform 30 in stages, and simultaneously bring the two wafers onto the circuit substrate P of the group device platform 60, the double wafer. The pick-and-place unit 50 has a heating module 52, which heats the bottom edge of the wafer, such as epoxy resin, which can be pre-cured by heating during bonding, can ensure the flatness of the wafer, and avoid displacement of the wafer during the soldering process. .
三、雙晶片取放單元50具有Y軸及θ軸的位移機構,配合所述組裝置料平台60,可以準確地將兩個晶片同時向下封合至電路基板P上。 3. The dual wafer pick-and-place unit 50 has a Y-axis and a θ-axis displacement mechanism. With the set of device material platforms 60, the two wafers can be accurately sealed down to the circuit substrate P at the same time.
四、配合可以沿著Y軸及θ軸補正的雙晶片取放單元50,本實施例的組裝置料平台60可以藉由基板定位視覺模組70,僅僅沿著X軸方向進行電路基板P的位置補正。即使電路基板P有Y軸與θ軸的偏移,可以藉由雙晶片取放單元50完成補正。 4. The dual-chip pick-and-place unit 50 can be complemented along the Y-axis and the θ-axis. The group device platform 60 of the present embodiment can perform the circuit board P only along the X-axis direction by the substrate positioning vision module 70. Position correction. Even if the circuit board P has an offset of the Y-axis and the θ-axis, the correction can be completed by the dual-chip pick-and-place unit 50.
以上所述僅為本發明之較佳可行實施例,凡依本發明申請專 利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above description is only a preferred and feasible embodiment of the present invention. Equivalent changes and modifications made by the scope of the invention are intended to be within the scope of the invention.
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TW535463B (en) * | 2000-10-05 | 2003-06-01 | Sanyo Electric Co | Semiconductor device and semiconductor module |
TWI239796B (en) * | 2002-03-11 | 2005-09-11 | Georg Rudolf Sillner | Apparatus for the manufacture and/or processing of semiconductor chips or components and transfer and flip-over module |
CN103594397B (en) * | 2013-11-11 | 2016-02-03 | 厦门市弘瀚电子科技有限公司 | A kind of wafer automatic edge scraping machine |
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TW535463B (en) * | 2000-10-05 | 2003-06-01 | Sanyo Electric Co | Semiconductor device and semiconductor module |
TWI239796B (en) * | 2002-03-11 | 2005-09-11 | Georg Rudolf Sillner | Apparatus for the manufacture and/or processing of semiconductor chips or components and transfer and flip-over module |
CN103594397B (en) * | 2013-11-11 | 2016-02-03 | 厦门市弘瀚电子科技有限公司 | A kind of wafer automatic edge scraping machine |
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