TW202119584A - 具有加熱功能的非導電薄膜以及電子裝置 - Google Patents

具有加熱功能的非導電薄膜以及電子裝置 Download PDF

Info

Publication number
TW202119584A
TW202119584A TW108140209A TW108140209A TW202119584A TW 202119584 A TW202119584 A TW 202119584A TW 108140209 A TW108140209 A TW 108140209A TW 108140209 A TW108140209 A TW 108140209A TW 202119584 A TW202119584 A TW 202119584A
Authority
TW
Taiwan
Prior art keywords
conductive
conductive film
electrically connected
circuit substrate
conductive contacts
Prior art date
Application number
TW108140209A
Other languages
English (en)
Other versions
TWI730493B (zh
Inventor
廖建碩
張德富
Original Assignee
台灣愛司帝科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 台灣愛司帝科技股份有限公司 filed Critical 台灣愛司帝科技股份有限公司
Priority to TW108140209A priority Critical patent/TWI730493B/zh
Priority to CN201911409144.1A priority patent/CN112788845A/zh
Priority to US16/903,491 priority patent/US20210134695A1/en
Publication of TW202119584A publication Critical patent/TW202119584A/zh
Application granted granted Critical
Publication of TWI730493B publication Critical patent/TWI730493B/zh

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/345Arrangements for heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B3/00Ohmic-resistance heating
    • H05B3/20Heating elements having extended surface area substantially in a two-dimensional plane, e.g. plate-heater
    • H05B3/22Heating elements having extended surface area substantially in a two-dimensional plane, e.g. plate-heater non-flexible
    • H05B3/26Heating elements having extended surface area substantially in a two-dimensional plane, e.g. plate-heater non-flexible heating conductor mounted on insulating base
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494Heating methods for reflowing of solder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13023Disposition the whole bump connector protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13075Plural core members
    • H01L2224/1308Plural core members being stacked
    • H01L2224/13082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298Fillers
    • H01L2224/13299Base material
    • H01L2224/133Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16112Disposition the bump connector being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/271Manufacture and pre-treatment of the layer connector preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81007Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the bump connector during or after the bonding process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81234Applying energy for connecting using means for applying energy being within the device, e.g. integrated heater
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81238Applying energy for connecting using electric resistance welding, i.e. ohmic heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83007Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83234Applying energy for connecting using means for applying energy being within the device, e.g. integrated heater
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83238Applying energy for connecting using electric resistance welding, i.e. ohmic heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9211Parallel connecting processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B2203/00Aspects relating to Ohmic resistive heating covered by group H05B3/00
    • H05B2203/011Heaters using laterally extending conductive material as connecting means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B2203/00Aspects relating to Ohmic resistive heating covered by group H05B3/00
    • H05B2203/013Heaters using resistive films or coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/111Preheating, e.g. before soldering

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本發明公開一種具有加熱功能的非導電薄膜以及電子裝置。電子裝置包括一電路基板、設置在電路基板上的一轉接板、被轉接板所承載的至少一電子晶片、設置在轉接板與電路基板之間的一第一非導電薄膜以及設置在至少一電子晶片與轉接板之間的一第二非導電薄膜。至少一電子晶片通過轉接板以電性連接於電路基板,並且第一非導電薄膜或者第二非導電薄膜為一具有加熱功能的非導電薄膜。具有加熱功能的非導電薄膜包括:受熱時會改變形狀的一非導電本體以及設置在非導電本體上或者內部的多個微加熱器。藉此,做為第一非導電薄膜或者第二非導電薄膜的非導電薄膜能透過微加熱器的使用,以對非導電本體進行加熱。

Description

具有加熱功能的非導電薄膜以及電子裝置
本發明涉及一種非導電薄膜以及電子裝置,特別是涉及一種具有加熱功能的非導電薄膜以及一種使用所述非導電薄膜的電子裝置。
目前,IC晶片可能會透過一非導電薄膜而電性連接於一電路板,然而現有的非導電薄膜仍具有改善空間。
本發明所要解決的技術問題在於,針對現有技術的不足提供一種具有加熱功能的非導電薄膜以及一種使用所述非導電薄膜的電子裝置。
為了解決上述的技術問題,本發明所採用的其中一技術方案是,提供一種具有加熱功能的非導電薄膜,其包括:一非導電本體以及多個微加熱器。所述非導電本體受熱時會改變形狀,且多個所述微加熱器設置在所述非導電本體上或者內部。另外,具有加熱功能的所述非導電薄膜還進一步包括:一承載基板以及一設置在所述承載基板上的一黏著層,且所述非導電本體設置在所述黏著層上且被所述承載基板所承載。此外,具有加熱功能的所述非導電薄膜還進一步包括:一電源輸入單元,其設置在所述非導電本體的一頂端或者一底端上。
為了解決上述的技術問題,本發明所採用的另外一技術方案是,提供一種電子裝置,其包括:一電路基板、設置在所述電路基板上的一轉接板、被所述轉接板所承載的至少一電子晶片、設置在所述轉接板與所述電路基板之間的一第一非導電薄膜以及設置在所述至少一電子晶片與所述轉接板之間的一第二非導電薄膜,所述至少一電子晶片通過所述轉接板以電性連接於所述電路基板,其特徵在於,所述第一非導電薄膜或者所述第二非導電薄膜為一具有加熱功能的非導電薄膜,具有加熱功能的所述非導電薄膜包括:受熱時會改變形狀的一非導電本體以及設置在所述非導電本體上或者內部的多個微加熱器。
為了解決上述的技術問題,本發明所採用的另外再一技術方案是,提供一種電子裝置,其包括:一電路基板、被所述電路基板所承載的至少一電子晶片以及設置在所述至少一電子晶片與所述電路基板之間的一非導電薄膜,其特徵在於,所述非導電薄膜包括:受熱時會改變形狀的一非導電本體以及設置在所述非導電本體上或者內部的多個微加熱器。
本發明的其中一有益效果在於,本發明所提供的具有加熱功能的非導電薄膜以及一種使用所述非導電薄膜的電子裝置,其能通過“受熱時會改變形狀的一非導電本體”以及“設置在所述非導電本體上或者內部的多個微加熱器”的技術方案,以使得多個所述微加熱器能針對所述非導電本體進行加熱。藉此,當所述轉接板的多個底端導電接點分別通過多個底端焊接物的電性導通,以分別電性連接於所述電路基板的多個基板導電接點時,分別鄰近多個所述底端焊接物的多個所述微加熱器會對多個所述底端焊接物進行加熱;另外,當所述轉接板的多個頂端導電接點分別通過多個頂端焊接物的電性導通,以分別電性連接於所述至少一電子晶片的多個晶片導電接點時,分別鄰近多個所述頂端焊接物的多個所述微加熱器會對多個所述頂端焊接物進行加熱;此外,當所述至少一電子晶片的多個晶片導電接點分別通過多個焊接物的電性導通,以分別電性連接於所述電路基板的多個基板導電接點時,分別鄰近多個所述焊接物的多個所述微加熱器會對多個所述焊接物進行加熱。
為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與圖式,然而所提供的圖式僅用於提供參考與說明,並非用來對本發明加以限制。
以下是通過特定的具體實施例來說明本發明所公開有關“具有加熱功能的非導電薄膜以及電子裝置”的實施方式,本領域技術人員可由本說明書所公開的內容瞭解本發明的優點與效果。本發明可通過其他不同的具體實施例加以施行或應用,本說明書中的各項細節也可基於不同觀點與應用,在不悖離本發明的構思下進行各種修改與變更。另外,本發明的附圖僅為簡單示意說明,並非依實際尺寸的描繪,事先聲明。以下的實施方式將進一步詳細說明本發明的相關技術內容,但所公開的內容並非用以限制本發明的保護範圍。
應當可以理解的是,雖然本文中可能會使用到“第一”、“第二”等術語來描述各種元件,但這些元件不應受這些術語的限制。這些術語主要是用以區分一元件與另一元件。另外,本文中所使用的術語“或”,應視實際情況可能包括相關聯的列出項目中的任一個或者多個的組合。
[第一實施例]
參閱圖1與圖2所示,本發明第一實施例提供一種具有加熱功能的非導電薄膜F,其包括:一非導電本體20以及多個微加熱器21。其中,非導電本體20受熱時會改變形狀(例如軟化或者部分融化),並且多個微加熱器21可以被設置在非導電本體20上或者內部。
舉例來說,非導電本體20可以先行製作出來,然後再將多個微加熱器21設置在預先製作完成的非導電本體20的頂端或者底端上(也就是說,預先製作完成的非導電本體20可以另外被設置在預先製作完成的非導電本體20的頂端或者底端上)。或者,在製作非導電本體20的同時,讓多個微加熱器21先被包覆在非導電本體20的內部,以使得製作完成後的非導電本體20的內部具有多個微加熱器21在其內。然而,本發明不以上述所舉的例子為限。
舉例來說,微加熱器21可為圍繞狀微加熱器、L形狀微加熱器、U字形微加熱器、單一微加熱器或者一對微加熱器(如圖1所示,微加熱器21可為一對微加熱器)。另外,多個微加熱器21彼此之間可以採用並聯、串聯或者並聯加串聯的方式彼此電性連接。然而,本發明不以上述所舉的例子為限。
更進一步來說,配合圖1與圖2所示,具有加熱功能的非導電薄膜F還進一步包括:一電源輸入單元22,其設置在非導電本體20的一頂端或者一底端上。舉例來說,電源輸入單元22包括設置在非導電本體20的一頂端或者一底端上的一正極接點22P與一負極接點22N。如圖1所示,正極接點22P與負極接點22N都設置在非導電本體20的頂端上,以便於使用者直接在非導電本體20的頂端上對正極接點22P與一負極接點22N輸入電源,藉此以驅動每一微加熱器21進行加熱。然而,本發明不以上述所舉的例子為限。
[第二實施例]
參閱圖3所示,本發明第二實施例提供一種具有加熱功能的非導電薄膜F,其包括:一非導電本體20以及多個微加熱器21,非導電本體受熱時會改變形狀,並且多個微加熱器21可以被設置在非導電本體20上或者內部。由圖3與圖1的比較可知,本發明第二實施例與第一實施例最大的差別在於:在第二實施例中,具有加熱功能的非導電薄膜F還進一步包括:一承載基板23以及一設置在承載基板23上的一黏著層24,並且非導電本體20設置在黏著層24上且被承載基板23所承載。也就是說,具有加熱功能的非導電薄膜F可以預先透過黏著層24而暫時先被承載基板23所承載。當需要使用非導電薄膜F時,只要將附有黏著層24的承載基板23移除後,即可只留下具有非導電本體20與多個微加熱器21的非導電薄膜F以供使用。
[第三實施例]
參閱圖4與圖5所示,本發明第三實施例提供一種電子裝置E,其包括:一電路基板P、設置在電路基板P上的一轉接板B、被轉接板B所承載的至少一電子晶片C、設置在轉接板B與電路基板P之間的一第一非導電薄膜F1以及設置在至少一電子晶片C與轉接板B之間的一第二非導電薄膜F2,並且至少一電子晶片C會通過轉接板B以電性連接於電路基板P。舉例來說,第一非導電薄膜F1或者第二非導電薄膜F2可為一具有加熱功能的非導電薄膜F,並且具有加熱功能的非導電薄膜F包括受熱時會改變形狀的一非導電本體20以及被設置在非導電本體20上或者內部的多個微加熱器21。
更進一步來說,配合圖4與圖5所示,轉接板B包括一絕緣本體10、設置在絕緣本體10的一頂端上的多個頂端導電接點11、設置在絕緣本體10的一底端上的多個底端導電接點12以及設置在絕緣本體10的內部的多個導電連接結構13,且多個導電連接結構13分別電性連接於多個頂端導電接點11且分別電性連接於多個底端導電接點12,以使得每一導電連接結構13電性連接於相對應的頂端導電接點11與相對應的底端導電接點12之間。
更進一步來說,如圖5所示,當非導電薄膜F做為第一非導電薄膜F1而被設置在轉接板B與電路基板P之間時,多個微加熱器21分別鄰近多個底端導電接點12,並且多個微加熱器21能對做為第一非導電薄膜F1的非導電薄膜F進行加熱。再者,多個底端導電接點12能分別通過多個底端焊接物S1的電性導通,以分別電性連接於電路基板P的多個基板導電接點P10,並且多個微加熱器21分別鄰近多個底端焊接物S1,以對多個底端焊接物S1進行加熱。
更進一步來說,如圖5所示,當非導電薄膜F做為第二非導電薄膜F2而被設置在至少一電子晶片C與轉接板B之間時,多個微加熱器21分別鄰近多個頂端導電接點11,並且多個微加熱器21能對做為第二非導電薄膜F2的非導電薄膜F進行加熱。再者,多個頂端導電接點11能分別通過多個頂端焊接物S2的電性導通,以分別電性連接於至少一電子晶片C的多個晶片導電接點C10,並且多個微加熱器21分別鄰近多個頂端焊接物S2,以對多個頂端焊接物S2進行加熱。
舉例來說,微加熱器21可為一圍繞狀,以圍繞底端焊接物S1或者多個頂端焊接物S2;微加熱器14亦可設置在底端焊接物S1的任意三側或者設置在頂端焊接物S2的任意三側;微加熱器14亦可設置在底端焊接物S1的任意兩側或者設置在頂端焊接物S2的任意兩側(如圖5所示);或者,微加熱器14亦可設置在底端焊接物S1的任意一側或者設置在頂端焊接物S2的任意一側。另外,多個微加熱器14可以採用並聯、串聯或者並聯加串聯的方式彼此電性連接。然而,本發明不以上述所舉的例子為限。
藉此,配合圖4與圖5所示,當頂端焊接物S2設置在頂端導電接點11與晶片導電接點C10之間,並且底端焊接物S1設置在底端導電接點12與基板導電接點P10之間時,多個微加熱器14能對多個頂端焊接物S2與多個底端焊接物S1進行加熱,藉此以使得至少一電子晶片C能通過多個頂端焊接物S2的加熱而穩固地固接在轉接板B上,並且使得轉接板B能通過多個底端焊接物S1的加熱而穩固地固接在電路基板P上。舉例來說,頂端焊接物S2與底端焊接物S1可為錫球、錫膏或者任何能用於焊接的導電材料,然而本發明不以上述所舉的例子為限。
更進一步來說,配合圖4與圖5所示,當多個微加熱器21對第一非導電薄膜F1與第二非導電薄膜F2進行加熱時,第一非導電薄膜F1會因為受熱而能穩固地被設置在絕緣本體10與電路基板P之間,以將絕緣本體10與電路基板P之間的空隙填滿而避免產生多餘的空隙,並且第二非導電薄膜F2會因為受熱而能穩固地被設置在至少一電子晶片C與絕緣本體10之間,以將至少一電子晶片C與絕緣本體10之間的空隙填滿而避免產生多餘的空隙。舉例來說,當多個微加熱器14對第一非導電薄膜F1與第二非導電薄膜F2進行加熱時,第一非導電薄膜F1與第二非導電薄膜F2會因為受熱而改變形狀,藉此以將絕緣本體10與電路基板P之間的空隙填滿而避免產生多餘的空隙,並且將至少一電子晶片C與絕緣本體10之間的空隙填滿而避免產生多餘的空隙。
[第四實施例]
參閱圖4與圖5所示,本發明第三實施例提供一種電子裝置E,其包括:一電路基板P、被電路基板P所承載的至少一電子晶片C以及設置在至少一電子晶片C與電路基板P之間的一非導電薄膜F,並且非導電薄膜F包括受熱時會改變形狀的一非導電本體20以及被設置在非導電本體20上或者內部的多個微加熱器21。由圖6與圖4的比較,以及由圖7與圖5的比較可知,本發明第四實施例與第三實施例最大的差別在於:第三實施例的電子裝置E省略轉接板B的使用。
更進一步來說,配合圖6與圖7所示,當至少一電子晶片C被一電路基板P所承載時,非導電薄膜F可以被設置在至少一電子晶片C與電路基板P之間。再者,至少一電子晶片C的多個晶片導電接點C10能分別通過多個焊接物S的電性導通,以分別電性連接於電路基板P的多個基板導電接點P10,並且多個微加熱器21會分別鄰近多個焊接物S,以對多個焊接物S進行加熱。
更進一步來說,配合圖6與圖7所示,當焊接物S設置在晶片導電接點C10與基板導電接點P10之間時,多個微加熱器14能對多個焊接物S進行加熱,藉此以使得至少一電子晶片C能通過多個焊接物S的加熱而穩固地固接在電路基板P上。舉例來說,頂端焊接物S2與底端焊接物S1可為錫球、錫膏或者任何能用於焊接的導電材料,然而本發明不以上述所舉的例子為限。
更進一步來說,配合圖6與圖7所示,當多個微加熱器21對非導電薄膜F進行加熱時,非導電薄膜F會因為受熱而能穩固地被設置在至少一電子晶片C與電路基板P之間,以將至少一電子晶片C與電路基板P之間的空隙填滿而避免產生多餘的空隙。舉例來說,當多個微加熱器14對非導電薄膜F進行加熱時,非導電薄膜F會因為受熱而改變形狀,藉此以將至少一電子晶片C與電路基板P之間的空隙填滿而避免產生多餘的空隙。
[實施例的有益效果]
本發明的其中一有益效果在於,本發明所提供的具有加熱功能的非導電薄膜F以及一種使用非導電薄膜F的電子裝置E,其能通過“受熱時會改變形狀的一非導電本體20”以及“設置在非導電本體20上或者內部的多個微加熱器21”的技術方案,以使得多個微加熱器21能針對非導電本體20進行加熱。藉此,當轉接板B的多個底端導電接點12分別通過多個底端焊接物S1的電性導通,以分別電性連接於電路基板P的多個基板導電接點P10時,分別鄰近多個底端焊接物S1的多個微加熱器21會對多個底端焊接物S1進行加熱;另外,當轉接板B的多個頂端導電接點11分別通過多個頂端焊接物S2的電性導通,以分別電性連接於至少一電子晶片C的多個晶片導電接點C10時,分別鄰近多個頂端焊接物S2的多個微加熱器21會對多個頂端焊接物S2進行加熱;此外,當至少一電子晶片C的多個晶片導電接點C10分別通過多個焊接物S的電性導通,以分別電性連接於電路基板P的多個基板導電接點P10時,分別鄰近多個焊接物S的多個微加熱器21會對多個焊接物S進行加熱。
以上所公開的內容僅為本發明的優選可行實施例,並非因此侷限本發明的申請專利範圍,所以凡是運用本發明說明書及圖式內容所做的等效技術變化,均包含於本發明的申請專利範圍內。
E:電子裝置 P:電路基板 P10:基板導電接點 B:轉接板 10:絕緣本體 11:頂端導電接點 12:底端導電接點 13:導電連接結構 C:電子晶片 C10:晶片導電接點 F:非導電薄膜 20:非導電本體 21:微加熱器 22:電源輸入單元 22P:正極接點 22N:負極接點 23:承載基板 24:黏著層 F1:第一非導電薄膜 F2:第二非導電薄膜 S:焊接物 S2:底端焊接物 S1:頂端焊接物
圖1為本發明第一實施例所提供具有加熱功能的非導電薄膜的示意圖。
圖2為本發明第一實施例所提供的電源輸入單元與微加熱器的相互關係的功能方塊圖。
圖3為本發明第二實施例所提供具有加熱功能的非導電薄膜的示意圖。
圖4為本發明第三實施例所提供的電子裝置的分解示意圖。
圖5為本發明第三實施例所提供的電子裝置的組合示意圖。
圖6為本發明第四實施例所提供的電子裝置的分解示意圖。
圖7為本發明第四實施例所提供的電子裝置的組合示意圖。
F:非導電薄膜
20:非導電本體
21:微加熱器
22:電源輸入單元
22P:正極接點
22N:負極接點

Claims (10)

  1. 一種具有加熱功能的非導電薄膜,其包括: 一非導電本體,其受熱時會改變形狀;以及 多個微加熱器,其設置在所述非導電本體上或者內部。
  2. 如申請專利範圍第1項所述之具有加熱功能的非導電薄膜,還進一步包括:一承載基板以及一設置在所述承載基板上的一黏著層,且所述非導電本體設置在所述黏著層上且被所述承載基板所承載。
  3. 如申請專利範圍第1項所述之具有加熱功能的非導電薄膜,還進一步包括:一電源輸入單元,其設置在所述非導電本體的一頂端或者一底端上。
  4. 如申請專利範圍第1項所述之具有加熱功能的非導電薄膜,其中,當一轉接板被設置在一電路基板上且承載至少一電子晶片時,所述非導電薄膜做為一第一非導電薄膜而被設置在所述轉接板與所述電路基板之間,且所述至少一電子晶片通過所述轉接板以電性連接於所述電路基板;其中,所述轉接板包括一絕緣本體、設置在所述絕緣本體的一頂端上的多個頂端導電接點、設置在所述絕緣本體的一底端上的多個底端導電接點以及設置在所述絕緣本體的內部的多個導電連接結構,且多個所述導電連接結構分別電性連接於多個所述頂端導電接點且分別電性連接於多個所述底端導電接點,以使得每一所述導電連接結構電性連接於相對應的所述頂端導電接點與相對應的所述底端導電接點之間;其中,多個所述微加熱器分別鄰近多個所述底端導電接點,且多個所述微加熱器對做為所述第一非導電薄膜的所述非導電薄膜進行加熱;其中,多個所述底端導電接點分別通過多個底端焊接物的電性導通,以分別電性連接於所述電路基板的多個基板導電接點,且多個所述微加熱器分別鄰近多個所述底端焊接物,以對多個所述底端焊接物進行加熱。
  5. 如申請專利範圍第1項所述之具有加熱功能的非導電薄膜,其中,當一轉接板被設置在一電路基板上且承載至少一電子晶片時,所述非導電薄膜做為一第二非導電薄膜而被設置在所述至少一電子晶片與所述轉接板之間,且所述至少一電子晶片通過所述轉接板以電性連接於所述電路基板;其中,所述轉接板包括一絕緣本體、設置在所述絕緣本體的一頂端上的多個頂端導電接點、設置在所述絕緣本體的一底端上的多個底端導電接點以及設置在所述絕緣本體的內部的多個導電連接結構,且多個所述導電連接結構分別電性連接於多個所述頂端導電接點且分別電性連接於多個所述底端導電接點,以使得每一所述導電連接結構電性連接於相對應的所述頂端導電接點與相對應的所述底端導電接點之間;其中,多個所述微加熱器分別鄰近多個所述頂端導電接點,且多個所述微加熱器對做為所述第二非導電薄膜的所述非導電薄膜進行加熱;其中,多個所述頂端導電接點分別通過多個頂端焊接物的電性導通,以分別電性連接於所述至少一電子晶片的多個晶片導電接點,且多個所述微加熱器分別鄰近多個所述頂端焊接物,以對多個所述頂端焊接物進行加熱。
  6. 如申請專利範圍第1項所述之具有加熱功能的非導電薄膜,其中,當至少一電子晶片被一電路基板所承載時,所述非導電薄膜被設置在所述至少一電子晶片與所述電路基板之間;其中,所述至少一電子晶片的多個晶片導電接點分別通過多個焊接物的電性導通,以分別電性連接於所述電路基板的多個基板導電接點;其中,多個所述微加熱器分別鄰近多個所述焊接物,以對多個所述焊接物進行加熱。
  7. 一種電子裝置,其包括:一電路基板、設置在所述電路基板上的一轉接板、被所述轉接板所承載的至少一電子晶片、設置在所述轉接板與所述電路基板之間的一第一非導電薄膜以及設置在所述至少一電子晶片與所述轉接板之間的一第二非導電薄膜,所述至少一電子晶片通過所述轉接板以電性連接於所述電路基板,其特徵在於,所述第一非導電薄膜或者所述第二非導電薄膜為一具有加熱功能的非導電薄膜,具有加熱功能的所述非導電薄膜包括: 一非導電本體,其受熱時會改變形狀;以及 多個微加熱器,其設置在所述非導電本體上或者內部。
  8. 如申請專利範圍第7項所述之電子裝置,其中,所述轉接板包括一絕緣本體、設置在所述絕緣本體的一頂端上的多個頂端導電接點、設置在所述絕緣本體的一底端上的多個底端導電接點以及設置在所述絕緣本體的內部的多個導電連接結構,且多個所述導電連接結構分別電性連接於多個所述頂端導電接點且分別電性連接於多個所述底端導電接點,以使得每一所述導電連接結構電性連接於相對應的所述頂端導電接點與相對應的所述底端導電接點之間;其中,當所述非導電薄膜做為所述第一非導電薄膜而被設置在所述轉接板與所述電路基板之間時,多個所述微加熱器分別鄰近多個所述底端導電接點,且多個所述微加熱器對做為所述第一非導電薄膜的所述非導電薄膜進行加熱;其中,多個所述底端導電接點分別通過多個底端焊接物的電性導通,以分別電性連接於所述電路基板的多個基板導電接點,且多個所述微加熱器分別鄰近多個所述底端焊接物,以對多個所述底端焊接物進行加熱。
  9. 如申請專利範圍第7項所述之電子裝置,其中,所述轉接板包括一絕緣本體、設置在所述絕緣本體的一頂端上的多個頂端導電接點、設置在所述絕緣本體的一底端上的多個底端導電接點以及設置在所述絕緣本體的內部的多個導電連接結構,且多個所述導電連接結構分別電性連接於多個所述頂端導電接點且分別電性連接於多個所述底端導電接點,以使得每一所述導電連接結構電性連接於相對應的所述頂端導電接點與相對應的所述底端導電接點之間;其中,當所述非導電薄膜做為所述第二非導電薄膜而被設置在所述至少一電子晶片與所述轉接板之間時,多個所述微加熱器分別鄰近多個所述頂端導電接點,且多個所述微加熱器對做為所述第二非導電薄膜的所述非導電薄膜進行加熱;其中,多個所述頂端導電接點分別通過多個頂端焊接物的電性導通,以分別電性連接於所述至少一電子晶片的多個晶片導電接點,且多個所述微加熱器分別鄰近多個所述頂端焊接物,以對多個所述頂端焊接物進行加熱。
  10. 一種電子裝置,其包括:一電路基板、被所述電路基板所承載的至少一電子晶片以及設置在所述至少一電子晶片與所述電路基板之間的一非導電薄膜,其特徵在於,所述非導電薄膜包括: 一非導電本體,其受熱時會改變形狀;以及 多個微加熱器,其設置在所述非導電本體上或者內部。
TW108140209A 2019-11-06 2019-11-06 具有加熱功能的非導電薄膜以及電子裝置 TWI730493B (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW108140209A TWI730493B (zh) 2019-11-06 2019-11-06 具有加熱功能的非導電薄膜以及電子裝置
CN201911409144.1A CN112788845A (zh) 2019-11-06 2019-12-31 具有加热功能的非导电薄膜以及电子装置
US16/903,491 US20210134695A1 (en) 2019-11-06 2020-06-17 Interposer board having heating function and electronic device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW108140209A TWI730493B (zh) 2019-11-06 2019-11-06 具有加熱功能的非導電薄膜以及電子裝置

Publications (2)

Publication Number Publication Date
TW202119584A true TW202119584A (zh) 2021-05-16
TWI730493B TWI730493B (zh) 2021-06-11

Family

ID=75688038

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108140209A TWI730493B (zh) 2019-11-06 2019-11-06 具有加熱功能的非導電薄膜以及電子裝置

Country Status (3)

Country Link
US (1) US20210134695A1 (zh)
CN (1) CN112788845A (zh)
TW (1) TWI730493B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI718812B (zh) * 2019-12-17 2021-02-11 台灣愛司帝科技股份有限公司 微加熱器晶片、晶圓級電子晶片組件以及晶片組件堆疊系統

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW505616B (en) * 2001-05-10 2002-10-11 Chien Hui Chuan Method for producing micro-system chip by injection compression molding
TWI223622B (en) * 2003-03-24 2004-11-11 Chien Hui Chuan Built-in high frequency induction-heating module for injection molding and thereof applications
JP4716277B2 (ja) * 2004-11-26 2011-07-06 国立大学法人京都大学 薄膜形成方法、蒸着源基板、および蒸着源基板の製造方法
US7474540B1 (en) * 2008-01-10 2009-01-06 International Business Machines Corporation Silicon carrier including an integrated heater for die rework and wafer probe
KR101191686B1 (ko) * 2009-12-24 2012-10-16 스미또모 베이크라이트 가부시키가이샤 도전 접속 재료, 전자 부품의 제조 방법, 도전 접속 재료가 부착된 전자 부재 및 전자 부품
KR101939240B1 (ko) * 2011-11-25 2019-01-17 삼성전자 주식회사 반도체 패키지
CN106784241B (zh) * 2016-12-26 2019-04-30 青岛杰生电气有限公司 板上芯片封装方法和板上芯片封装系统
CN109257839B (zh) * 2018-10-31 2021-12-14 宁波石墨烯创新中心有限公司 一种电热膜、其制备方法及应用

Also Published As

Publication number Publication date
US20210134695A1 (en) 2021-05-06
TWI730493B (zh) 2021-06-11
CN112788845A (zh) 2021-05-11

Similar Documents

Publication Publication Date Title
TW544885B (en) Carrier with metal bumps for semiconductor die packages
CN101796729B (zh) 恒温箱式振荡器
JP6476871B2 (ja) 回路基板、蓄電装置、電池パックおよび電子機器
CN103582292B (zh) 印刷线路板、印刷电路板和印刷电路板制造方法
US3576969A (en) Solder reflow device
US9697933B2 (en) PTC device
CN112018049A (zh) 一种芯片封装结构及一种电子设备
TWI730493B (zh) 具有加熱功能的非導電薄膜以及電子裝置
TWI770612B (zh) 晶片移轉系統與晶片移轉方法
TWI710298B (zh) 具有加熱功能的轉接板以及電子裝置
EP3413357A1 (en) High-conductivity and high-voltage solar photovoltaic glass panel
CN103021598B (zh) 过电流保护元件
US10998201B2 (en) Semiconductor encapsulation structure
TWI493576B (zh) 過電流保護元件及其保護電路板
US9661757B2 (en) Connecting power leads to circuit board
TW200522090A (en) Over-current protection apparatus
TW202205934A (zh) 電子裝置及其基板結構以及最佳化加熱區域的布局方法
JP2017134960A (ja) ラミネート型蓄電素子およびラミネート型蓄電素子の製造方法
TWI810571B (zh) 適用於加熱安裝的基板、適用於加熱安裝的電路基板及適用於加熱安裝的治具
CN205987528U (zh) 一种易散热印刷电路板组件
CN111341740A (zh) 一种新型电源管理芯片封装系统
CN206293649U (zh) 免焊电路板式USB Type C 连接器
CN205388972U (zh) 一种高导通高电压太阳能光电玻璃板
CN218732289U (zh) 一种功率器件模块与电子设备
CN214708144U (zh) Mems传感器用pcb板