TW201943008A - Electronic component implementation apparatus and implementation method, and package component manufacturing method - Google Patents

Abstract

The present invention provides a mounting device for mounting an electronic component accurately and efficiently on a support substrate on which the marks for position detection are not formed for each mounting region. A mounting device (1) according to an embodiment includes a stage part (20) for moving a stage (21) on which a support substrate (W) having a plurality of mounting areas is mounted, a mounting unit (40) for moving first and second mounting heads (43) having a plurality of mounting tools (43a, 43b), a first recognition unit that recognizes the entire position of the support substrate (W), and a second recognition unit that recognizes the position of the electronic component held by the mounting tools (43a, 43b). The movement of the stage (21) and the first and second mounting heads (43) is based on the position data of the support substrate (W) and the electronic component, and the correction data of the stage and the tools, so as to allocate the mounting area row in the X-direction mounting line. In addition, the electronic component is controlled so as to be shared and mounted by the first and second mounting heads (43) in a plurality of mounting areas.

Description

Device and method for mounting electronic components, and method for manufacturing packaged components

Embodiments of the present invention relate to a mounting device and a mounting method for an electronic component, and a method for manufacturing a packaged component.

In the past, there are known semiconductor package manufacturing processes such as CSP (Chip Size Package), BGA (Ball Grid Array), etc., using an interposer substrate (relay substrate). In addition, a process called wafer level package (LWP) is also known that does not use an interposer substrate and does not divide the semiconductor wafer into individual semiconductor wafers, and maintains the wafer state for packaging. WLP has the advantage of reducing the thickness and manufacturing cost of a semiconductor package without using an interposer.

In WLP, in order not to protrude a region on a surface on which a semiconductor wafer is formed with electrode pads, it is known to form a fan-in / wafer-level package in which a rewiring layer including a semiconductor package's I / O terminals is formed on the semiconductor wafer (fan in-WLP: FI-WLP). In recent years, fan-out / wafer-level packaging (FO-WLP) has also been proposed in which a region of a semiconductor wafer is protruded to form a redistribution layer including I / O terminals of a semiconductor package. FO-WLP can also be applied to a multi-chip package (Multi Chip Package (MCP)) in which semiconductor chips such as RAM, flash memory, CPU, or plural types of electronic components such as diodes and capacitors are mounted in one package. Attention.

Here, the MCP is the one in which plural types of electronic components are mounted in one package as described above. In such MCPs, variations in the mounting positions of the electronic components mounted in the same package affect each other's electrical characteristics of the package. Therefore, high positioning accuracy is required for the mounting of each electronic component. In the manufacturing process of a semiconductor package using the aforementioned interposer substrate, since alignment marks for position identification are provided in each mounting area on the interposer substrate, the alignment mark is applied to each mounting area and the electronic components are placed in the mounting area. The method of positioning and mounting the mounting area (hereinafter referred to as the area identification method) realizes mounting with high position accuracy.

In the FO-WLP manufacturing process, a plurality of semiconductor wafers are first mounted in a matrix on a supporting substrate in a spaced state, and then the semiconductor wafers are sealed with a resin and the plurality of semiconductor wafers are integrated to form an integrated semiconductor wafer. A semiconductor-like wafer is shaped like a wafer. On this pseudo wafer, a redistribution layer for forming I / O terminals is formed. After the plurality of semiconductor wafers are resin-sealed and integrated, the support substrate is peeled and removed. However, when manufacturing MCP with FO-WLP, there is no image-recognizable pattern that can be used for position recognition in each mounting area of the mounted semiconductor wafer on the supporting substrate. That area identification method is not practical.

When the area identification is not performed, it is suitable to identify the entire position of the support substrate by identifying an alignment mark indicating the outline position of the support substrate or the position of the entire substrate, and depending on the entire position of the support substrate, each mounting area on the support substrate is applicable. A method for mounting a semiconductor wafer (hereinafter referred to as a global identification method). In addition, when the mounting position of the semiconductor wafer of the MCP varies, for example, when a semiconductor wafer having a standard electrode pad diameter (20 μm) and a pitch (35 μm) are considered, the terminals of the semiconductor wafer and On the premise of ensuring a contact area between terminals and avoiding contact between adjacent terminals, it is desirable to suppress the contact area to ± 7 μm or less.

However, in each mounting area such as an intermediate substrate, a mounting device required for mounting a semiconductor wafer on a substrate having an alignment mark is set to a global identification method. When used in the FO-WLP manufacturing process, The mounting accuracy may cause a mounting error of more than ± 7 μm, and a supporting substrate without an alignment mark in each mounting area cannot mount a semiconductor wafer with high accuracy. Therefore, in the manufacturing process of the FO-WLP to which the global identification method is applied, there is no mounting device capable of mounting a semiconductor wafer with a position accuracy of ± 7 μm or less.

If only the mounting accuracy is improved, it is considered that the support substrate used in the FO-WLP process is provided with an alignment mark in advance so as to correspond to each mounting area, and an area identification method is applied. However, the FO-WLP support substrate is peeled off from the pseudo wafer after forming the pseudo wafer, and cannot be used as a product. In order to support the formation of equipment and processes for forming marks on such substrates, it will not only increase equipment costs, equipment installation space, number of processes, etc., but also need to carry out identification area marking every time a semiconductor wafer is mounted in the mounting process. The operation time of one semiconductor wafer is also increased. From this point of view, the application of the area identification method increases the manufacturing cost of the semiconductor package and detracts from the advantages of the WLP.

In addition, in order to cope with mounting errors of a semiconductor wafer, a technique for forming a rewiring layer in consideration of mounting errors of the semiconductor wafer has been proposed. This technology is to measure the mounting error (positional deviation from the ideal position) of each semiconductor wafer on the pseudo wafer before the exposure when the circuit pattern of the pseudo wafer is exposed to the redistribution layer. When scanning each semiconductor wafer, the position information of each circuit pattern included in the drawing data is corrected based on the mounting error of the semiconductor wafer to be exposed. This technology can also be applied to a single-chip package in which one semiconductor package is incorporated into one semiconductor package. However, in the case of MCP, since the drawing data of the circuit pattern is created in a package unit, when the relative position deviation between the semiconductor wafers in the same package is generated, only the position information of the drawn circuit pattern cannot be corrected.

Furthermore, the mounting device used in the FO-WLP manufacturing process is required to shorten the mounting time of the semiconductor wafer. In other words, the formation process of the redistribution layer on the suspected wafer is generally performed collectively on one suspected wafer. In contrast, the mounting process of the semiconductor wafer supporting the substrate is performed separately for each semiconductor wafer. In consideration of such processing time, as compared with the formation process of the redistribution layer, the mounting process of the semiconductor wafer requires time, and it is required to shorten the mounting time of the semiconductor wafer. If only the mounting time is shortened, consider using a mounting device with multiple mounting heads. However, if only a plurality of mounting heads are used, the accuracy of mounting of semiconductor wafers will be further reduced because of the influence of the movement error generated at each mounting head. Therefore, in the mounting device used in the FO-WLP manufacturing process, it is required to improve the mounting accuracy of electronic components such as semiconductor wafers and shorten the mounting time.

In addition, the FO-WLP process is a process in which wafers are referred to as "wafer-level" wafers, that is, wafers that support substrates. In contrast, recently, organic substrates such as glass and epoxy (FR-4) substrates used in printed circuit board manufacturing processes and glass substrates used in the manufacture of liquid crystal display panels have been proposed as supporting substrates. A process for making a substrate for a fan-out, panel, and package (FO-PLP).

In the FO-WLP process, as it is called wafer level, a silicon wafer is used on the support substrate. This is because in the process of forming the redistribution layer, the equipment used in the process of forming the wiring layer of the silicon wafer can be used. Similarly, the manufacturing process of a printed circuit board and the manufacturing process of a liquid crystal display panel also use the formation process of a wiring layer. Therefore, the equipment used for the manufacturing process of the printed circuit board and the manufacturing process of the liquid crystal display panel can be used for the manufacturing process of the FO-PLP.

When an organic substrate and a glass substrate are used as the support substrate, there is an advantage that costs can be reduced compared to a case where a silicon wafer is used. In addition, there is an advantage that the size of the supporting substrate can be made larger than that of a silicon wafer. Because the larger the supporting substrate, the number of semiconductor packages such as MCP that can be produced at one time can be increased, which can improve productivity. Therefore, it is predicted that a demand for a mounting device for an electronic component suitable for a process of such a FO-PLP will arise.

Among them, in the manufacturing process of the printed circuit board, the size of the copper-clad laminated board serving as the base material is 1020 × 1020 mm or 1020 × 1220 mm. When a substrate with a side of more than 1000 mm is used as a support substrate, it is estimated that the convenience of processing is impaired. Therefore, in the FO-PLP process, it is predicted that the copper-clad laminate will be used as a support substrate at a level of 4 divisions. On the other hand, in the manufacturing process of liquid crystal display panels, it is difficult to use more than 5th generation (about 1000 × 1200mm or more), especially the 7th generation (about 1900 × 2200mm or more) glass substrates (so-called Mother glass) manufacturing equipment, it is presumed to use the 3rd to 4th generation (approximately 550 × 650mm to 680 × 880mm) manufacturing equipment that is not used due to the increase in the size of liquid crystal display panels. Therefore, in the FO-PLP process, the size of the support substrate corresponding to the mounting device of the electronic component is expected to be approximately four times the size of the support substrate in the previous FO-WLP process, which is 300 × 300mm. 600 × 600mm

When a semiconductor wafer is mounted on a support substrate having a size of 600 × 600 mm as described above, the stage on which the support substrate is placed becomes larger, so that the moving distance of the mounting head is increased. Therefore, the time required for transferring the semiconductor wafer becomes longer, and it is expected that the mounting efficiency of the semiconductor wafer will decrease. In addition, in the case of MCP, that is, in the case of a plurality of semiconductor wafers having different mounting types, the time required for mounting (plus the size of the semiconductor wafer and the type of adhesive used for mounting the semiconductor wafer) (Pressing time or pressurizing / heating time) are different, and the mounting efficiency of a semiconductor wafer with a long mounting time is affected. Therefore, the mounting efficiency of the package as a whole is reduced due to the long time required for mounting the semiconductor wafer. Therefore, in the mounting device used in the FO-PLP manufacturing process, it is estimated that it is required to improve the mounting accuracy of electronic components such as semiconductor wafers, and also to reduce the mounting time in response to the increase in the size of the supporting substrate.
[Prior technical literature]
[Patent Literature]

[Patent Document 1] JP 2008-041976
[Patent Document 2] JP 2009-259917
[Patent Document 3] International Publication No. 2007/072714
[Patent Document 4] JP 2013-058520

[Problems to be solved by the invention]

The problem to be solved by the present invention is to provide a mounting device and a mounting method for an electronic component, and a manufacturing method of a packaging component to which the mounting method is applied. A support substrate having a pattern such as a mark, particularly a support substrate which is expected to be large-sized, can also be used to mount electronic components such as semiconductor wafers with high accuracy and efficiency in each mounting area.

[Means to solve the problem]

The mounting device for an electronic component according to the embodiment is a mounting device for mounting an electronic component on a support substrate. The mounting device includes a stage unit for mounting a plurality of mounting areas on which the electronic components are mounted. The stage supporting the substrate, and a stage moving mechanism that moves the stage in a Y direction that is perpendicular to the X direction in one direction along the horizontal direction; and a mounting section including: arranged along the X direction and separately The first and second mounting heads are provided with a plurality of mounting tools for holding the electronic components, and the first and second mounting heads for holding the electronic components are set along the X direction by the plurality of mounting tools. The mounting head moving mechanism that moves on the mounting line; the first recognition unit that recognizes the entire position of the support substrate placed on the carrier; the second recognition unit that maintains the recognition in the first and second realities. The positions of the electronic components of the plurality of mounting tools to which the head is mounted; and the memory unit, which includes: stage correction data for correcting the movement position error of the stage caused by the stage movement mechanism, and correction of the aforementioned Tool correction data for the movement position error of the first and second mounting heads on each of the plurality of mounting tools caused by the mounting head moving mechanism; the control unit is based on the identification by the first identification unit The position data of the support substrate, the stage correction data stored in the memory section, the position data of the electronic components held in the plurality of mounting tools identified by the second identification section, and the memory stored in the memory The above-mentioned tool correction data of the part is arranged in order to arrange the listed mounting areas along the X direction in the supporting substrate on the mounting line in order, and at the same time, to arrange the plurality of mounting areas on the mounting line. The electronic component controls the operations of the stage moving mechanism and the mounting head moving mechanism such that the first and second mounting heads share the mounting.

An electronic component mounting method according to an embodiment is a method for mounting electronic components on which a electronic component is mounted on a support substrate, and includes a method of obtaining a stage on which a support substrate having a plurality of mounting areas on which the electronic components are mounted is mounted. Moving position error, a process of memorizing the platform correction data for correcting the moving position error to the memory section; placing the first and second mounting heads arranged in the X direction in one direction along the horizontal direction, and maintaining the aforementioned electronics The moving position error of the plural mounted tools of the component is obtained on the mounting line set along the X direction, and the tool correction data for correcting the moving position error is memorized into the memory section; the support is placed on the carrier A substrate, and a process of identifying the entire position of the support substrate placed on the carrier at the same time; correcting the position of the carrier based on the position data of the support substrate and the carrier correction data obtained from the position identification project of the support substrate While moving so that the rows of the mounting areas along the X direction among the plurality of mounting areas are positioned in order The method of describing the mounting line to move the carrier; the electronic components are received and received interactively by the plurality of mounting tools of the first and second mounting heads, and the electronic components held in the plurality of mounting tools are identified. Based on the identified position data of the electronic component and the tool correction data to correct the movement of the plurality of mounting tools of the first and second mounting heads, and make the first and second mounting heads Move on the mounting line, and use the plurality of mounting tools of the first and second mounting heads to move the electronic component to the mounting area located on the mounting line with the first and second mounting heads. Share the installed project.

A method for manufacturing a package component according to an embodiment includes a process of individually mounting electronic components in a plurality of mounting areas on a supporting substrate, and collectively sealing the electronic components mounted in the plurality of mounting areas to form a suspected wafer or A process similar to a panel, and a process of manufacturing a packaged part by forming a redistribution layer on the aforementioned electronic component of the suspected wafer or the panel. In the method for manufacturing a packaged component according to the embodiment, the mounting process of the electronic component includes: acquiring a movement position error of a stage on which the support substrate is placed; and storing stage correction data for correcting the movement position error in a memory unit. The first and second mounting heads are respectively provided in the X direction arranged in one direction along the horizontal direction, and the moving position errors of the plurality of mounting tools for the electronic components are maintained. Obtained on the installation line, a process of memorizing the tool correction data for correcting the movement position error to the memory section; placing the support substrate on the carrier and identifying the entire position of the support substrate placed on the carrier Engineering; correcting the movement of the carrier based on the position data of the support substrate obtained from the position identification project of the support substrate and the carrier correction data, and at the same time making the actual movement along the X direction in the plurality of mounting areas The column of the installation area is a project that moves the carrier in accordance with the manner of being located on the aforementioned installation line; The aforementioned plurality of mounting tools interactively receive the aforementioned electronic components, identify the positions of the aforementioned electronic components held in the aforementioned plural mounting tools, and correct the aforementioned first part based on the identified position data of the aforementioned electronic components and the aforementioned tool correction data. The plurality of mounting tools of the first and second mounting heads are moved, and the first and second mounting heads are moved on the mounting line, and the plurality of mountings are performed by the first and second mounting heads. The tool allows the electronic component to share the mounting process with the first and second mounting heads in the mounting area located on the mounting line.

Hereinafter, a mounting device and a mounting method for an electronic component according to an embodiment will be described with reference to the drawings. The drawing is a schematic diagram. The relationship between the thickness and the plane size, and the thickness ratio of each part may be different from reality. In the description, the term indicating the up and down direction is used. If there is no special note, it means the relative direction when the mounting surface of the electronic component supporting the substrate described later is used as the upper direction. The front view serves as the reference direction.

[Configuration of mounting device]
FIG. 1 is a plan view showing the configuration of a mounting device for electronic components according to an embodiment, FIG. 2 is a front view of the mounting device shown in FIG. 1, and FIG. 3 is a right side view of the mounting device shown in FIG. 4 is a block diagram showing a configuration of the mounting apparatus shown in FIG. 1. In FIGS. 1 to 3, with reference to FIG. 1, the left-right direction in the mounting device 1 is set to the X direction, the front-back direction is set to the Y direction, and the up-down direction is set to the Z direction. The mounting device 1 shown in these figures includes a component supply unit 10 that supplies electronic components such as a semiconductor wafer t, a stage portion 20 that mounts a stage 21 that supports a substrate W, and a component that takes out the semiconductor wafer t from the component supply unit 10. Transfer section 30, mounting section 40 that receives semiconductor wafer t taken out by transfer section 30 and mounts it on support substrate W placed on stage 21, and control section 50 that controls operations of each section 10, 20, 30, and 40 .

(Part supply department 10)
The component supply part 10 is arrange | positioned in the center of the front side on the base part 1a of the mounting apparatus 1. The component supply unit 10 supplies a semiconductor wafer t, which is an electronic component mounted on the support substrate W. The component supply unit 10 includes a wafer ring 11 that holds a resin sheet S attached to a semiconductor wafer T that is singulated into individual semiconductor wafers t, and a wafer ring 11 that is detachably held and held by an unillustrated XY The wafer ring holder 12 that can be moved in the XY direction by the moving mechanism, and when the semiconductor wafer t is taken out by the transfer unit 30, the unillustrated top of the taken out semiconductor wafer t is lifted from the lower side of the wafer ring 11.起 机构。 From institutions. The jacking mechanism is fixedly provided at the position where the semiconductor wafer t is taken out by the transfer section 30. As the jacking mechanism, a mechanism having a known structure can be used, for example, a mechanism described in Japanese Patent Application Laid-Open No. 2010-056466.

The component supply unit 10 further includes a wafer ring 11 exchange device (not shown). The exchange device includes a storage portion (also referred to as a cassette that includes a plurality of components for accommodating the wafer ring 11 in the up-down direction), and a guide provided between the wafer ring holder 12 and the storage portion. The guide portion of the wafer ring 11 to be transferred. The exchange device supplies the unused wafer ring 11 to the wafer ring holder 12, stores the wafer ring 11 after the semiconductor wafer t has been taken out into the storage section, and supplies the new wafer ring 11 to the wafer ring. Bracket 12. For the supply and storage of the wafer ring 11, a wafer ring holding device 32 included in a transfer section 30 described later is used.

The electronic component mounted on the support substrate W is not limited to one type of semiconductor wafer t, and may be a plurality of types of semiconductor wafers, as well as semiconductor wafers, diodes, and capacitors. The mounting device 1 according to the embodiment is suitable when a plurality of types of electronic components including a semiconductor wafer, a diode, and a capacitor are mounted on a support substrate W to manufacture an MCP. Examples of the configuration of the MCP include a semiconductor wafer having a plurality of types, a semiconductor wafer having one type and a diode and a capacitor, and a semiconductor wafer having a plurality of types and a diode and a capacitor.

(Stage section 20)
The stage part 20 is arrange | positioned at the back center on the base part 1a. The stage unit 20 includes a stage 21 on which a support substrate W having a plurality of mounting areas is placed, and an XY moving mechanism 22 as a stage moving device that moves the stage 21 in the XY direction. The XY moving mechanism 22 causes each row of the mounting area along the X direction of the support substrate W placed on the stage 21 to be sequentially located in a fixed mounting set in a line along the X direction in detail later. In a linear manner, the stage 21 is moved. The XY moving mechanism 22 has the largest supporting substrate W that can be placed on the stage 21, and is larger in the X direction than a half of the size in the X direction of the supporting substrate W (1 / 2X + α). The movement stroke of the range of movement is a movement stroke that can be moved in the Y direction by a range (Y + α) larger than the size in the Y direction of the support substrate W. The stage 21 can suck and hold the supporting substrate W placed thereon by a suction suction mechanism (not shown).

The support substrate W placed on the stage 21 is, for example, a substrate for forming a pseudo-panel based on a pseudo-wafer suitable for manufacturing FO-PLP, and is a glass substrate or an organic substrate (glass / epoxy). (FR-4) substrate, etc.), silicon substrate, metal substrate such as stainless steel, etc., but not limited to this. It is also possible to use a pseudo-wafer-formed substrate suitable for manufacturing using FO-WLP. The pseudo-panel is the same as the pseudo-wafer used in the manufacture of FO-WLP, in which electronic components such as a plurality of semiconductor wafers are arranged in a plane, and the electronic components arranged are sealed with resin to form a single plate. By. Therefore, the shape of the support substrate W used for the formation of the pseudo-panel is not limited to a circular shape, and may be a quadrangle, a polygon, an ellipse, or the like, and the shape is not particularly limited. As the support substrate W, a substrate suitable for use in manufacturing the MCP in the above-mentioned FO-PLP process, that is, a substrate on which a plurality of semiconductor wafers, capacitors, and other electronic components are mounted in each mounting area is preferred.

The support substrate W has a plurality of mounting areas on which electronic components such as a semiconductor wafer t are mounted. However, the plural mounting areas are areas that are assumed to be set on the support substrate W, and marks, patterns, and the like indicating the respective mounting areas are not formed. The support substrate W may include an alignment mark for global identification indicating the position of the entire substrate, but it may not include an alignment mark for area identification indicating the position of each mounting area. The global identification method refers to a method in which electronic components are mounted on a plurality of mounting areas on a substrate when the electronic component is mounted on a plurality of mounting areas on a supporting substrate W at a single position. The area identification method refers to a method of detecting the position of the mounting area of the electronic component each time the electronic component is mounted when the electronic components are mounted in a plurality of mounting areas on the support substrate W. The size of the support substrate W is preferably 300 × 300 mm or more. In this embodiment, a support substrate W of 600 × 600 mm is used as an example. That is, in the mounting device 1 of this embodiment, the stage 21 has a size capable of mounting a support substrate W of 600 × 600 mm.

(Transfer section 30)
The transfer section 30 includes a pair of left and right transfer sections 30A, 30B, an intermediate stage 31, and a wafer ring holding device 32, and the two transfer sections 30A and 30B are arranged in a state of being reversed left and right. The two transfer sections 30A and 30B are arranged on the front and bottom sides of the base portion 1a so as to sandwich the component supply section 10, and have the same structure except that they are reversed left and right. Hereinafter, the structure of the left transfer part 30A is demonstrated, and description of the structure of the right transfer part 30B is abbreviate | omitted.

The transfer unit 30A includes a Y-direction moving device 33 extending from the front end portion of the base portion 1a to the vicinity of the center in the Y direction on the front left side of the base portion 1a. In the Y-direction moving device 33, the Y-direction moving block 34 is supported in the Y direction so as to be able to move freely. On the back of the upper end side of the Y-direction moving block 34, there is provided a rectangular plate-shaped support body 35 extending in the horizontal direction of the X-direction moving block 34 in the X direction, that is, the right direction in the figure. The back surface of the support body 35 is provided with an X-direction moving body 36 which is supported by an X-direction moving device (not shown) so as to be movable in the X direction and has a roughly crank shape in plan view. A transfer head 37 is supported at the right-hand end of the X-direction moving body 36 in the figure. Further, a wafer identification camera 38 is provided on an end portion on the right side of the X-direction moving body 36 shown on the side opposite to the surface supporting the transfer head 37.

In the transfer head 37, in the X direction, two left and right suction nozzles (transfer nozzles) 37a, 37b are provided so that they can move freely in the vertical direction by the Z (up and down) direction moving devices 37c, 37d, respectively. The transfer head 37 is supported by the reversing mechanisms 37e and 37f so that the adsorption nozzles 37a and 37b can be individually reversed up and down. Thereby, the attitudes of the suction nozzles 37a and 37b can be selectively switched to a state where the suction side of the semiconductor wafer t is sucked and held and a state where the suction side is up. The wafer identification camera 38 is used to identify the position of the semiconductor wafer t held in the wafer ring 11 of the component supply unit 10.

In addition, in the transfer portion 30A on the left side, the part number of the suction nozzle located on the outer side (left side in the figure) is set to 37a, and the part number of the Z-direction moving device located on the outer side is set to 37c. The part number of the mechanism is set to 37e. However, the left and right transfer sections 30A and 30B are arranged in a state where the left and right are reversed. Here, since the right side of the transfer portion 30B on the right side is outside, the part number of the suction nozzle on the right side is set to 37a, and the part number of the Z-direction moving device on the right side is set to 37c. The part number of the right reversing mechanism is set to 37e. Among them, the left transfer head 37 is a first transfer head, and the right transfer head 37 is a second transfer head.

The intermediate stage 31 is used to temporarily place the semiconductor wafer t taken out by the suction nozzles 37 a and 37 b of the left and right transfer heads 37, and is provided at a slightly central position of the base portion 1 a between the component supply portion 10 and the stage portion 20. The intermediate stage 31 is provided with two placement nozzles 37a and 37b in accordance with the arrangement of the two suction nozzles 37a and 37b of each of the transfer heads 37 of the left and right transfer portions 30A and 30B, and includes four placement portions 31a to 31d.

The wafer ring holding device 32 is used when the wafer ring 11 is supplied and stored in the wafer ring holder 12 of the component supply unit 10. The wafer ring holding device 32 is provided on the right side end of the support body 35 of the left-side transfer portion 30A, and the surface on the opposite side to the surface on which the X-direction moving body 36 is provided, that is, the front surface. The wafer ring holding device 32 includes a rod-shaped support arm 32a provided in an X-direction moving device (not shown) such as an air cylinder to move forward and backward freely in the X direction, and a front end of the support arm 32a provided in the right direction of the drawing. , Holding the holding portion 32b of the wafer ring 11.

Such a transfer unit 30 sequentially takes out the semiconductor wafer t from the component supply unit 10 and transfers the semiconductor wafer t to the mounting unit 40. When the transfer unit 30 mounts the semiconductor wafer t face up (the electrodes of the semiconductor wafer t face up on the substrate), the semiconductor wafer t taken out from the component supply unit 10 is received by the intermediate stage 31 When the semiconductor wafer t is face-down mounted (the electrode face of the semiconductor wafer t is face-down on a substrate), the semiconductor wafer t is taken out from the component supply unit 10 so that the suction nozzle 37a is received. And 37b are reversed up and down, and the state where the front and back surfaces of the semiconductor wafer t are reversed is transferred to the mounting section 40.

(Mounting section 40)
The mounting section 40 includes two mounting sections 40A and 40B having the same configuration as the left and right transfer sections 30A and 30B. The two mounting portions 40A and 40B are arranged separately from each other on both sides of the rear portion on the base portion 1a so as to sandwich the stage portion 20 in a left-right reversal state. In the following, only the configuration of the left mounting portion 40A will be described for the pair of left and right mounting portions 40, and the description of the configuration of the right mounting portion 40B will be omitted.

The mounting portion 40A includes a support frame 41 extending from the rear end portion of the base portion 1a to the central portion in the Y direction on the left side behind the base portion 1a and extending in the Y direction in a side view. On the right side of the support frame 41, a head support body 42 is supported by the Y-direction moving device 41a so as to be freely movable in the Y direction. The head support 42 extends in the horizontal direction in the X direction, that is, in the right direction as shown in the figure, to the vicinity of the center of the base portion 1a. A mounting head 43 is provided in front of the head support 42 by an X-direction moving device 42a capable of moving in the X-direction.

The mounting head 43 includes two mounting tools 43a and 43b which are arranged in the X direction (left and right in the figure) and are sucked and held on the support substrate W, and the two mounting tools 43a and 43b are individually mounted. The Z-direction moving devices 43c and 43d that move the ground in the Z-direction. Among them, the Y-direction moving device 41a, the X-direction moving device 42a, and the Z-direction moving devices 43c and 43d constitute a mounting head transfer mechanism. Furthermore, the mounting section 40 includes an imaging unit 44 for imaging the semiconductor wafer t held by the mounting tools 43a and 43b.

The mounting tools 43 a and 43 b are provided at the same arrangement interval as the suction nozzles 37 a and 37 b of the transfer head 37. In addition, the mounting tools 43a and 43b are configured by absorbing and holding the semiconductor wafer t with a member capable of seeing the vertical direction. Thereby, the semiconductor wafer t adsorbed and held by the mounting tools 43a, 43b can be seen from the upper side of the mounting tools 43a, 43b. The mounting tools 43a and 43b are provided with a horizontal rotation device (not shown), and can rotate the semiconductor wafer t sucked and held in a horizontal plane. Further, among the mounting tools 43a and 43b, the mounting tool 43b located on the inner side (the center side of the base portion 1a) is mounted with a substrate recognition camera 43f as a first recognition unit. The substrate recognition camera 43f is used to image an alignment mark (global mark) of the support substrate W placed on the stage 21.

In addition, like the transfer portion 30, the left and right mounting portions 40A and 40B are arranged in the mounting portion 40 in a state of being reversed left and right. Therefore, in the left and right mounting portions 40A and 40B, the part numbers of the mounting tools located on the outer sides (the left mounting portion 40A is the left and the right mounting portion 40B is the right) are 43a, The part number of the Z-direction moving device located on the outside is 43c. Among them, the left mounting head 43 is a first mounting head, and the right mounting head 43 is a second mounting head.

The imaging unit 44 is provided above the four mounting sections 31a to 31d of the intermediate stage 31, and includes four wafer recognition cameras 44a to 44d as the second recognition section corresponding to the four mounting sections 31a to 31d. The wafer identification cameras 44a to 44d can image the semiconductor wafer t placed on the placement sections 31a to 31d, and can be imaged and held by the mounting tools 43a and 43b to a mounting tool that moves below the wafer identification cameras 44a to 44d. 43a, 43b semiconductor wafer t. These wafer recognition cameras 44a to 44d are supported by a pair of XY moving devices 44e and 44f in a two-movable manner in the XY direction. The two wafer identification cameras (44a and 44b and 44c and 44d) in groups are arranged at the same arrangement interval as the mounting tools 43a and 43b and the suction nozzles 37a and 37b. A pair of XY moving devices 44e and 44f are supported below the portion of the beam of the camera support frame 44g extending in the X-direction to illustrate a door-type front view. The camera support frame 44g is provided at the front end of the upper surface of the left and right support frames 41 of the mounting portion 40, and is bridged to the left and right support frames 41.

Such a mounting unit 40 receives the semiconductor wafer t taken out from the component supply unit 10 by the transfer unit 30, and mounts the received semiconductor wafer t on the support substrate W placed on the stage 21. At this time, the mounting tools 43a, 43b of the left and right mounting heads 43 mount the semiconductor wafer t on a certain mounting line. This mounting line is a straight line imaginarily set in the X direction within the movement range of the stage 21 in the Y direction, and is managed by the coordinates for the movement of the stage 21 and the mounting tools 43a, 43b. In other words, the installation line is a set of coordinate points on the X axis located on a certain Y axis. In the support substrate W, the mounting areas are generally set in a matrix shape along the XY direction. Therefore, when the semiconductor wafer t is mounted on the support substrate W, the stage 21 is moved and controlled so that the rows along the mounting area in the X direction of the semiconductor wafer t to be mounted are located on the mounting line. The mounting tools 43a and 43b are moved and controlled so that the semiconductor wafer t is mounted on a predetermined mounting area among the mounting areas located on the mounting line.

The mounting heads 43 and 43 of the left and right mounting sections 40A and 40B are respectively on the mounting line, and the mounting area on the supporting substrate W is divided into two in the X direction, that is, left and right are divided into two. The mounting head 43 on the left side and the area on the right side are shared by the mounting head 43 on the right side, and the mounting of the semiconductor wafer t is performed in parallel. At this time, in order to prevent physical interference between the mounting heads 43, the minimum distance that the two mounting heads 43 and 43 can approach is restricted by software or mechanically. The smallest distance that can be approached is called the "closest distance". In addition, the left and right mounting heads 43 and 43 are located at the closest distances, and the mounting tools located on the outer side are each other, that is, the left mounting tool 43a of the left mounting head 43 and the right mounting of the right mounting head 43. The distance between the mounting tools 43a is called "proximity distance". If the dimension in the X direction of the supporting substrate W is less than twice the length of the proximity gap, it is difficult to mount the semiconductor wafer t on the left and right mounting heads 43 simultaneously in the entire region of the supporting substrate W in the X direction. of.

As shown in FIG. 5, there are four sets of mounting tools 43 a and 43 b that are mounted simultaneously on the left and right mounting heads 43 and 43. As shown in FIG. 5A, the first example is a combination of mounting the semiconductor wafer t at the same time with the right mounting tool 43b of the left mounting head 43 and the left mounting tool 43b of the right mounting head 43 at the same time. The second example is a combination of simultaneously mounting the semiconductor wafer t with the right mounting tool 43b of the left mounting head 43 and the right mounting tool 43a of the right mounting head 43 as shown in FIG. 5 (B). The third example is a combination of simultaneously mounting the semiconductor wafer t with the left mounting tool 43a of the left mounting head 43 and the left mounting tool 43b of the right mounting head 43 as shown in FIG. 5 (C). As a fourth example, as shown in FIG. 5 (D), the left mounting tool 43a of the left mounting head 43 and the right mounting tool 43a of the right mounting head 43 simultaneously mount the semiconductor wafer t.

Among them, the combination in which the distance L between the mounting tools 43a and 43b that are simultaneously mounted is the longest is performed by using the mounting tools 43a located outside the left and right mounting heads 43 as shown in FIG. 5 (D). Installed combination. Next, in this combination, the distance L between the mounting tools 43a in a state where the left and right mounting heads 43 are closest to each other is the above-mentioned "proximity interval". Therefore, when the length in the X direction of the support substrate W is less than twice the proximity interval, the semiconductor wafer t cannot be simultaneously mounted on the entire area in the X direction of the support substrate W in the combination of FIG. 5 (D). In this embodiment, the proximity interval is 150 mm. That is, the distance L between the mounting tools 43a and 43b shown in FIG. 5 (D) is 150 mm.

In addition, as the operation program of the mounting head 43, the combination of the mounting tools 43a and 43b that are simultaneously mounted is limited to the combination of FIGS. 5 (A) to (C), and when the combination of FIG. 5 (D) does not exist, " The “proximity gap” is as shown in FIG. 5 (B), and the right mounting tool 43b of the left mounting head 43 and the right mounting tool 43 of the right mounting head 43 are in the state where the left and right mounting heads 43 are at the closest distance. The distance between the mounting tools 43a, or the type shown in FIG. 5 (C), in which the left and right mounting heads 43 are closest to each other, the left mounting tool 43a and the right mounting head 43 The distance between the left mounting tools 43b.

(Control section 50)
The control unit 50 controls the operations of the component supply unit 10, the stage unit 20, the transfer unit 30, and the mounting unit 40 based on the control information stored in the memory unit 51, and places electronic components including the semiconductor wafer t on the support substrate W. Each mounting area is sequentially installed. The memory unit 51 stores stage correction data for correcting the movement position error of the stage 21 obtained by the later-described stage 21 movement position error acquisition process, and the movement positions of the mounting tools 43a and 43b. Tool correction data of the movement position error of the mounting tools 43a, 43b obtained by the error acquisition process, and the movement of the stage 21 and the mounting unit 40 is controlled based on the correction data. The memory unit 51 also stores operation programs for mounting the semiconductor wafer t on the support substrate W, the transfer programs 30 and the mounting unit 40, and the like.

[Motion of mounting device (mounting of electronic components)]
Next, a mounting process for electronic components such as the semiconductor wafer t using the mounting apparatus 1 will be described. When electronic components such as a semiconductor wafer t are mounted in each mounting area of the supporting substrate W, only the global identification method is applicable, because the positioning accuracy of the semiconductor wafer t in each mounting area is not determined because the position recognition of the mounting area is not performed. Depending on the recognition accuracy of the global mark and the like supporting the substrate W, the machining accuracy of the XY moving mechanism 22 of the stage 21, and the X-direction moving device 42a and Y-direction moving device 41a and Z of the mounting tools 43a and 43b Machining accuracy and the like of the devices 43c and 43d. However, a guide rail or the like that guides the movement of the stage 21 or the mounting tools 43a, 43b within a desired range is completed with an accuracy of ± 7 μm or less, which is virtually impossible in metal processing. Furthermore, it is impossible to assemble a guide rail having a desired length on a metal frame or the like with a straight forward movement of ± 7 μm or less. Here, the movement position error of the stage 21 is measured, and the data of the movement of the stage 21 is acquired (corrected). In addition, the movement position errors of the mounting tools 43a and 43b are measured on the mounting line to obtain (correct) data that corrects the movement of the mounting tools 43a and 43b.

[Acquisition process of stage 21 movement position error (stage correction data) (correction process (1))]
The data for correcting the movement position error of the stage 21 is obtained using a correction substrate 71 as shown in FIGS. 6 and 7. The correction substrate 71 is, for example, a substrate made of glass and arranged in a matrix at intervals of dot marks 72 for position identification. The dot marks 72 of the correction substrate 71 are provided at intervals of 3 mm, for example, in a range of 600 mm in length × 600 mm in width. The dot mark 72 is formed of a metal thin film or the like, and can be formed by a film forming technique such as etching or sputtering. The diameter of the dot mark is, for example, 0.2 mm. Such a correction substrate 71 is correctly set on the stage 21. Although the method of setting the correction substrate 71 is not particularly limited, it is performed by, for example, a method described below. The correction substrate 71 has the same size as the support substrate W, and the range of the set point mark is set to the same size as the range including all the mounting areas on the support substrate W.

(Setting of correction substrate 71)
The above-mentioned calibration substrate 71 is set on the stage 21 manually by an operator. After setting the calibration substrate 71 on the stage 21, setting of the calibration substrate 71 is performed by performing parallel adjustment of the calibration substrate 71 (adjustment in which the arrangement direction of the dot marks 72 is aligned with the XY direction). The parallel adjustment is performed by using the substrate recognition camera 43f of the left mounting head 43 among the substrate recognition cameras 43f for supporting imaging of the global mark of the substrate W. First, as shown in FIG. 6, on the calibration substrate 71 placed on the stage 21, a dot mark 72 located at a left front corner of the calibration substrate 71 becomes the center of the imaging field V of the substrate recognition camera 43 f. Adjust the position of the stage 21.

From this state, the stage 21 is moved to the left in the X direction at a low speed (a speed at which the point of view 72 within the field of view V of the camera 22 is slowly moved). At this time, the operator monitors the image captured by the substrate recognition camera 43f with a monitor, and stops the movement of the stage 21 if the position of the dot mark 72 captured by the substrate recognition camera 43f deviates from the imaging field V upward or downward. , Manually adjust the tilt of the correction substrate 71 in a direction without deviation. The imaging field of view V in FIG. 6 shows an example of a state in which the position of the point mark 72 appearing in the imaging field of view V gradually shifts downward as the stage 21 moves.

After adjusting the inclination of the correction substrate 71, the position of the stage 21 is adjusted so that the dot mark 72 at the front left corner becomes the imaging field V center of the substrate recognition camera 43f, and the stage 21 moves to the left in the X direction at a low speed. . The worker similarly monitors the position of the point mark 72 for deviation with a monitor. Next, if the position is deviated, the movement of the stage 21 is stopped, and the inclination of the correction substrate 71 is adjusted. This operation is repeated over the entire range of the X-direction movable range of the stage 21 until the point mark 71 is projected on the monitor screen without exceeding the imaging field V. The movement of the stage 21 performed by such an operator is performed by a touch panel, a joystick operation, or the like.

(Acquisition of movement position error (correction data) of stage 21)
Next, the position of the point mark 72 of the correction substrate 71 set on the stage 21 is identified by the above-mentioned method using the substrate recognition cameras 43f provided on the left and right mounting heads 43 to obtain the movement position error of the stage 21 and the position based thereon. Correct the information. The identification of the dot mark 72 is performed by moving the correction substrate 71 in a state where the left and right substrate recognition cameras 43f are stopped at predetermined positions, respectively. For example, as shown in FIG. 7, the imaging of the dot mark 72 on the correction substrate 71 is performed from the dot mark 72 located at the left end of the rear of the correction substrate 71 (located on the rear side of the base portion 1a) toward the right in the X direction with the dot mark 72. Arranged at a pitch of 3 mm, the pitch movement is started, and the folding is performed in the forward direction (the side on the front side of the base portion 1a) in order. At this time, among the point marks 72 on the correction substrate 71, the point marks 72 provided on the left half of the area are captured by the left-side substrate recognition camera 43f, and the point marks 72 provided on the right half of the area are used on the right substrate. The recognition camera 43f performs imaging.

Specifically, the stage 21 is positioned on the center of the XY movement stroke of the XY moving mechanism 22 (this position is referred to as the origin position), and the left substrate recognition camera 43f is positioned on the left of the correction substrate 71. The center of the half point mark group (the position shown by the symbol 71A in FIG. 7), so that the right substrate recognition camera 43f is located at the center of the right half point point mark group on the correction substrate 71 (the position shown by the symbol 71B in FIG. 7). ). From this state, while keeping the left and right substrate recognition cameras 43f stopped, the operator observes the monitor while operating the XY moving mechanism 22, and the upper left point mark 72 of the left half of the point mark group is located on the left side of the substrate recognition camera. The center of the imaging field V of 43f moves the correction substrate 71. Thereby, the upper left point mark 72 of the right half point mark group is located within the imaging field of view V of the right substrate recognition camera 43f. Among the left and right point mark groups, the upper left point mark 72 becomes the first point mark 72.

After the first point mark 72 is positioned at the center of the imaging field of view V of the substrate recognition camera 43f, the detection operation of the point mark 72 by the left and right substrate recognition cameras 43f is started. After that, the automatic control by the control unit 50 is performed first. The detection operation is started by the operator pressing (touching) the start button of the detection operation displayed on the touch panel. After the detection operation of the point mark 72 is started, the first point mark 72 is imaged first. The captured image of the first point mark 72 is processed using a known image recognition technology, and a positional deviation of the point mark 72 from the center of the imaging field V of the substrate recognition camera 43f is detected. The detected positional deviation is stored in the storage unit 51 as information paired with the movement position (XY coordinates) of the stage 21. After the position recognition of the point mark 72 is completed, the stage 21 is moved in order to position the next (second) point mark 72 within the field of view of the camera in the aforementioned movement sequence. In the example of FIG. 7, since the second dot mark 72 is located to the right of the first dot mark 72, the stage 21 is moved to the left in the X direction by 3 mm.

The movement of the stage 21 is performed based on the reading value of the linear encoder of the XY moving mechanism provided in the stage 21. As a scale of the linear encoder, a glass scale having a small thermal expansion coefficient is preferably used as a thermal measure. After the movement of the stage 21 is completed, the position deviation of the second point mark 72 is detected in the same manner as the first point mark 72a, and is stored in the memory unit 51 as information paired with the XY coordinates of the stage 21 at this time. The imaging of the dot mark 72 is performed after the stage 21 is stopped and after waiting only for the time when the vibration generated when the stage 21 is stopped has subsided. This operation is performed on all the dot marks 72 on the calibration substrate 71 to obtain the movement position deviation data of the dot marks 72 corresponding to the respective positions, and the data is stored in the storage unit 51 as the stage correction data.

(Acquisition of correction data accompanying thermal expansion of the support substrate W)
In order to improve the bonding property of the bonding die-bond film used for the semiconductor wafer t, a heater may be provided on the stage 21 to heat the support substrate W. In this case, since the temperature of the support substrate W is changed (rises) before and after being placed on the stage 21, the support substrate W is thermally expanded accordingly. If the support substrate W is thermally expanded, even if the stage 21 and the mounting head 55 are moved with high accuracy, the extension of the support substrate W may cause a deviation in the mounting position.

Here, the thermal expansion amount of the support substrate W generated by the heating of the heater is measured in advance and grasped in advance. When the semiconductor wafer t is mounted on the support substrate W, the coefficient (percentage) corresponding to the thermal expansion amount grasped in advance is multiplied by the correction data. It is preferable to control the movement of the stage 21. At this time, due to factors such as the shape and arrangement of the heater and the structure of the stage 21, the entire support substrate W may not necessarily be uniformly thermally expanded, and the distribution of thermal expansion may be grasped together. For example, a region on the support substrate W is divided into a plurality of grid-like regions such as 10 rows × 10 columns, and the amount of thermal expansion (displacement due to thermal expansion at each measurement point) is measured in each divided region. Next, the coefficients of the correction data of the platform 21 in each area may be switched.

In addition, the amount of thermal expansion of the support substrate W is measured at each predetermined elapsed time from when the support substrate W is placed on the stage 21 until the thermal expansion of the support substrate W becomes saturated with respect to the temperature of the stage 21 and is determined in advance. A coefficient of thermal expansion amount according to each predetermined elapsed time may be used. In this case, the coefficient corresponding to the amount of thermal expansion may be obtained for each of the regions divided into a plurality of regions on the support substrate W. Next, when mounting the semiconductor wafer t, each elapsed time after the support substrate W is placed on the stage 21 is switched to a coefficient corresponding to the elapsed time, and the coefficient is multiplied by the correction data to make the stage 21 mobile. Thereby, without waiting until the thermal expansion of the support substrate W becomes saturated with respect to the temperature of the stage 21, the mounting of the semiconductor wafer t can be started on the support substrate W, and the mounting of the semiconductor wafer t can be performed with high efficiency, and High-precision implementation.

(Correction of moving position of stage 21)
When the stage 21 is moved, among the stage correction data obtained by the obtaining process of the movement position error of the stage 21, the stage correction obtained by using the substrate recognition camera 43f provided on the left mounting head 43 is referred to. The data corrects the moving position of the stage 21. The control unit 50 controls the XY moving mechanism 22 so that each line of the mounting area along the X direction on the support substrate W placed on the stage 21 is sequentially positioned on the mounting line. At this time, the control unit 50 refers to the position information (XY coordinates) of the mounting area stored in the storage unit 51 and the above-mentioned stage correction data, and calculates a correction value required when the line of the mounting area is positioned on the mounting line. Next, the moving position of the stage 21 when the line of the mounting area is positioned on the mounting line is corrected by only the points of the calculated correction value. When the stage 21 has a heater, it is preferable to multiply the coefficient based on the thermal expansion amount of the support substrate W by the correction data of the stage 21.

In addition, the stage correction data acquired by the substrate recognition camera 43f provided on the right mounting head 43 is used to correct the moving position of the right mounting head 43. That is, because the substrate recognition cameras 43f of the left and right mounting heads 43 capture the dot marks 72 set at a certain arrangement interval on the same correction substrate 71, as long as the stage 21 (correction substrate 71) moves in parallel, the cameras 43f are recognized from the left and right substrates. The position deviation of the point mark 72 recognized by the captured image should be consistent. However, when the stage 21 is moved, there may be a slight return movement in the horizontal plane, that is, a swing. In this case, even if the movement error of the stage 21 is corrected by using the stage correction data acquired by the left-side substrate recognition camera 43f, it is estimated that the actual implementation of the mounting tools 43a, 43b of the mounting head 43 on the right side is performed. Installation accuracy may also be insufficient. Here, the movement position of the mounting head 43 on the right is based on the difference between the stage correction data obtained by the left-side substrate recognition camera 43f and the stage correction data obtained by the right-side substrate recognition camera 43f. Correction. This makes it possible to ensure the mounting accuracy of the left and right mounting heads 43 even when the stage 21 is deflected.

[Acquisition process (correction process (2)) of the movement position error (the first tool correction data) of the installed tools 43a and 43b]
The data (the first tool correction data) for correcting the movement position errors in the XY directions of the mounting tools 43a and 43b are obtained using the correction substrate 71 in the same manner as the stage 21 correction. Therefore, it may be performed continuously with the above-mentioned calibration process (1). In obtaining the correction data, in a state where the stage 21 is stopped at the origin position, for example, an area having a predetermined width in the Y direction centered on the mounting line is shown. The position of the position mark 72 in the correction data acquisition area Dt ".) Is recognized while the substrate recognition cameras 43f included in the left and right mounting heads 43 are individually moved. The board identification camera 43f of each mounting head 43 performs correction on the entire range of the movable range of the mounting head 43 in the X direction in the X direction, and performs point correction in the data acquisition area Dt with respect to the Y direction within a set predetermined width range. 72 videos.

Specifically, first, the substrate recognition camera 43f of the left mounting head 43 is moved to the left end of the movable range of the left mounting head 43 in the X direction, that is, the rear side of the correction data acquisition area Dt, so that The dot mark 72 is located at the center of the imaging field V of the substrate recognition camera 43f. In this state, the detection operation is started by the operator pressing (touching) the start button of the detection operation displayed on the touch panel.

After the detection operation is started, the substrate recognition camera 43f starts to move toward the right side in the X direction at the arrangement interval of the dot marks 72. When the X direction is within a movable range, it turns forward while sequentially imaging the correction data acquisition area Dt. Dot mark 72. Next, the substrate recognition camera 43f recognizes the position of the point mark 72 in the same manner as the acquisition of the stage correction data, obtains the first tool correction data as correction data for correcting the movement position of the mounting tools 43a, 43b, and stores it in the memory unit 51. The same operation is performed on the board identification camera 43f of the mounting head 43 on the right side, and the first tool correction data of the mounting tools 43a and 43b of the mounting head 43 on the right side are acquired and stored in the memory unit 51. In addition, although the predetermined width of the correction data acquisition area Dt can be appropriately set in accordance with the size of the electronic component mounted on the support substrate W, it may be set within a range of 30 mm to 100 mm. In addition, the width may be one minute for the electronic component.

The above-mentioned acquisition process of the stage correction data and the tool correction data is basically performed when the mounting device 1 is operated, and the movement of the stage 21 and the mounting head 43 may be controlled based on the measurement results. However, the stage 21 and the mounting head 43 may be incorporated with a mounted heater or the like that assists the semiconductor wafer t. In this case, there is a case where the temperature of each part of the device rises and the mechanical accuracy decreases due to thermal expansion. Further, as the mounting process of the semiconductor wafer t of the mounting apparatus 1 proceeds, the heat of a motor or the like of a moving apparatus that moves the mounting head 43 may cause a decrease in the mechanical accuracy of each part of the apparatus. In consideration of such a movement error due to temperature rise, it is not limited to one time during the operation of the device, and it may be performed periodically.

(Correction of moving position of mounting tools 43a, 43b)
The correction of the moving position when moving the left and right mounting heads 43 will be described. First, when the mounting head 43 on the left side is moved to the mounting position on the mounting line, the first tool correction data obtained by obtaining the movement position error of the mounting tools 43a and 43b is referred to the first tool correction data. The tool correction data obtained by the substrate recognition camera 43f provided in the mounting head 43 corrects the movement positions of the mounting tools 43a and 43b. The control unit 50 controls the movement of the mounting head 43 in the X direction in order to mount the semiconductor wafer t held on the mounting tools 43a, 43b in the mounting area of the mounting line in order to mount in a predetermined mounting area. The device 42a and the device 41a move in the Y direction. At this time, the control unit 50 refers to the position information (XY coordinates) of the mounting area stored in the storage unit 51 and the above-mentioned first tool correction data, and calculates such that the center of the semiconductor wafer t matches the center of the mounting area. Correction value required for positioning. Next, the moving positions of the mounting tools 43a and 43b when the semiconductor wafer t is mounted on the mounting area are corrected by only the points of the calculated correction value.

In addition, the situation of the right mounting head 43 is the same as that of the left mounting head 43. Referring to the first tool correction data obtained by using the substrate recognition camera 43f provided on the right mounting head 43, the correction of the mounting tools 43a and 43b is performed. moving position. In addition, in this embodiment, the relative positional relationship between the two mounting tools 43a, 43b and the substrate recognition camera 43f on each mounting head 43 is preferably assembled with a certain degree of accuracy by a jig or the like. Thereby, the positioning accuracy of the semiconductor wafer t and the like can be further improved.

[Acquisition process (correction process (3)) of obtaining the movement position error (second tool correction data) of the mounted tools 43a, 43b]
The data (second tool correction data) to correct the Z-direction movement position error of the installed tools 43a and 43b, after the correction process (1), (2), the state of the stage correction data and the first tool correction data is applied Next, the semiconductor substrate t or the test wafer ts is mounted on the mounting line at a predetermined pitch on the support substrate W or the test support substrate Ws, and the position deviation from the target position of the mounted wafer is measured. Get.

Specifically, a support substrate Ws for a test is placed on the stage 21. The support substrate Ws for the test may be the support substrate W used for manufacturing, but it is sufficient if the mounting area can be secured at least on the mounting line, which is about the same as the correction data acquisition area Dt shown in FIG. 7. Large-sized substrates are also possible. When the supporting substrate Ws is placed on the stage 21, the same operation as that of the semiconductor wafer t transfer process and the semiconductor wafer t mounting process described later is performed, and a preset mounting interval along the mounting line is used as correction data acquisition. For example, the test wafer ts is mounted with an adhesive at intervals of 1 mm. The adhesive may be attached to the support substrate Ws in advance. The implementation is performed in a global identification manner.

When the mounting of the test wafer ts is completed, the support substrate Ws is detached from the stage 21, and the mounting position deviation from the target position of each wafer ts is measured with an inspection device (not shown). Relevant data obtained in this way indicating the relationship between the target position on the installation line and the deviation of the installation position with respect to the target position is stored in the memory unit 51 as the second tool correction data. This operation is performed individually for each of the mounting tools 43a, 43b of the left and right mounting heads 43, and the second tool correction data is obtained for each of the mounting tools 43a, 43b.

In addition, the set mounting interval is smaller than the dimension in the X direction of the wafer t. For example, when the mounting interval is 1 mm and the size of the wafer ts is 4 × 4 mm, the wafer ts cannot be continuously arranged on the mounting line. In this case, the position of the support substrate Ws may be shifted in the Y direction, and the wafer ts may be mounted along the mounting line in a plurality of times. That is, first, the wafer ts is mounted along the mounting line at intervals larger than 4 mm. After that, the position of the support substrate Ws is moved in the Y direction by a distance larger than 4 mm. At this position, the wafer ts was mounted along the mounting line with a displacement of 1 mm in the X direction from the previous time. This operation is repeated until the installation interval is filled.

In addition, the wafer ts for the test may be mounted on the support substrate Ws for the test with the area mark by the global identification method, and the position deviation from the mounting position of the mounted wafer ts may be recognized by the substrate recognition camera 43f.

(Correction of moving position of mounting tools 43a, 43b)
The correction of the moving positions of the mounting tools 43a and 43b will be described. When moving each mounting tool 43a, 43b on the mounting area of the mounting line, the target position on the mounting line that is the second tool correction data stored in the memory unit 51, which is referenced, is different from the mounting position relative to the target position. For the correlation data, the correction value is calculated from the value of the mounting position deviation corresponding to the mounting area. Next, the correction is performed only by the points that calculate the correction value of the moving position of the mounting head 43 when the mounting tools 43a, 43b are moved to the mounting area. In addition, if there is no target position that coincides with the position of the mounting area in the second tool correction data, for example, the mounting position of two target positions adjacent to the position of the mounting area is deviated by a one-shot or The polynomial may be interpolated to calculate a correction value of the deviation of the mounting position corresponding to the position of the mounting area.

[Mounting process of electronic components]
After the above-mentioned calibration processes (1) to (3), the mounting process of the electronic components such as the semiconductor wafer t to the support substrate W is performed.

(1) Carrying-in process of wafer ring 11 First, an unused wafer ring 11 is carried into a wafer ring holder 12 from a storage unit (not shown), and the wafer ring 11 is fixed to the wafer ring holder 12. At this time, as shown in FIG. 8, the support arm 32 a of the wafer ring holding device 32 provided on the left-side transfer portion 30A is moved to the right in the drawing, and the holding portion 32 b is moved to the holding position of the wafer ring 11. . In this state, the wafer ring 11 is moved from the storage portion to the position shown by the two-point chain line, and the rear end of the wafer ring 11 in the storage portion is held to the position shown by the solid line. Pull out to move the wafer ring 11 onto the wafer ring holder 12. When the wafer ring 11 is positioned on the wafer ring holder 12, the wafer ring 11 held by the chuck portion 32 b is released, the support arm 32 a is moved to the left in the figure, and the clamping portion 32 b is moved to the standby position. The wafer ring 11 located on the wafer ring holder 12 holds the resin sheet S in a stretched state by a stretching mechanism (not shown) provided in the component supply unit 10.

(2) Setting process of supporting substrate W
(2-1: Supply of substrate W)
The support substrate W held by a transfer robot (not shown) is supplied to the stage 21. A transfer robot (not shown) includes a transfer arm that holds and holds the support substrate W, and carries the support substrate W from the left side of the mounting device 1 through the space under the door of the support frame 41 of the left mounting portion 40A into the stage 21 . After the support substrate W is supplied onto the stage 21, the transfer arm is retracted from the mounting device 1. The supply process of the supporting substrate W may be performed in parallel with the carrying-in process (1) of the wafer ring 11 or may be performed individually.

(2-2: Detection of global flags)
The global mark of the support substrate W placed on the stage 21 is detected, and the position of the support substrate W is identified. For example, as shown in FIG. 9, among the four corners of the supporting substrate W, the global marks A, B, and C provided at the three corners are sequentially captured by the substrate recognition cameras 43 provided on the left and right mounting heads 43. . Specifically, the left-side mounting head 43 and the loader 43 are positioned directly below the substrate recognition camera 43f of the mounting head 43 on the left side (the upper left in FIG. 9) with the global mark A located on the supporting substrate W. The stage 21 moves relatively, and the entire area is marked with A. Next, the right side of the mounting head 43 and the stage 21 are positioned so that the global identification mark B located on the right rear of the support substrate W (top right in FIG. 9) is directly below the substrate recognition camera 43f of the mounting head 43 on the right. Relative movement, the entire camera is marked B. Finally, the right side of the mounting head 43 and the stage are positioned so that the global identification mark C on the right of the support substrate W (bottom right in FIG. 9) is directly below the substrate recognition camera 43f of the mounting head 43 on the right. 21 is relatively moved, and the entire camera is marked C. The positions of the three global marks A, B, and C are detected based on the captured image, and the positional deviations in the XY direction and the θ direction of the support substrate W are obtained based on the positions of the three global marks A, B, and C ( Horizontal rotation direction). The positional deviation of the support substrate W can be obtained by various known methods, and is not particularly limited to this method.

An example of a method for detecting a positional deviation is described below. In FIG. 9, the solid line indicates the support substrate W actually placed on the stage 21. The two-dot chain line indicates the support substrate W in a state where it is placed on the stage 21 with no positional deviation. The support substrate W described by the two-dot chain line is an ideal state. At this time, the center of the support substrate W coincides with the center position O (x0, y0) of the stage 21.

First, the positions of the three global marks A, B, and C provided on the supporting substrate W are detected by a known image recognition technique, and the inclination θ1 of the line component AB connecting the global marks A and B relative to the X direction with respect to the X direction is connected to the global The inclination θ (= (θ1 + θ2) / 2) of the support substrate W is obtained by averaging the inclination θ2 of the line components BC with respect to the Y direction of the marks B and C. Next, using the center position O of the stage 21 as the rotation center, the support substrate W is virtually rotated so that the inclination θ disappears. This state is indicated by a dotted line in FIG. 9. The movement amount (Δx1, Δy1) of the midpoints M1 (x1, y1) of the global marks A and C located at the diagonals at this time is obtained. The total value (Δx1 + Δx2, Δy1 + Δy2) of the calculated movement amount (Δx1, Δy1) and the difference (Δx2, Δy2) between the center point M2 (x2, y2) and the coordinate O after the movement (Δx1 + Δy2) is used as the support substrate The positional deviation in the XY direction of W is obtained.

When the positional deviation of the support substrate W on the stage 21 is calculated, the positional deviation is corrected, and the stage 21 is moved on the support line so that the row of the mounting area where the semiconductor wafer t is initially mounted is located on the mounting line. . Specifically, the stage 21 is moved to the position of the solid line shown in FIG. 10, and the line of the mounting area located at the rear of the support substrate W is positioned on the mounting line. In addition, in FIG. 10, the installation line is shown by a one-dot chain line for convenience. At this time, the movement of the stage 21 on which the rows of each mounting area are located on the mounting line is based on the correction data of the positional deviation of the support substrate W obtained from the identification of the global marks A, B, and C, and is stored in The stage correction data of the memory unit 51 is corrected. As in this embodiment, when the XY moving mechanism 22 of the stage 21 does not have a θ stage (θ moving mechanism), the tilt of the support substrate W is adjusted by the θ adjustment mechanism provided in the mounting head 43 to adjust the mounted semiconductor wafer t. To correct the tilt.

(3) Transfer of semiconductor wafer t
(3-1: Detection of the position of the semiconductor wafer t)
After the wafer ring 11 is held on the wafer ring holder 12, the semiconductor wafer t initially taken out from the wafer ring 11 is located at a take-out position. The take-out position is set at the center of the wafer ring holder 12 in the state shown in FIG. 10. The order in which the semiconductor wafer t on the wafer ring 11 is taken out is stored in the memory unit 51 in advance, and the control unit 50 controls the movement of the wafer ring holder 12 in accordance with this sequence. Therefore, after the first semiconductor wafer t is taken out, the wafer ring holder 12 moves the wafer ring 11 at a pitch in accordance with the order stored in the memory portion 51.

After the first semiconductor wafer t is located at the take-out position, in order to bring the semiconductor wafer t and the next taken-out semiconductor wafer t adjacent to the semiconductor wafer t in the X direction, the semiconductor wafer t is taken into the wafer identification camera 38 on the left-hand transfer portion 30A. , The Y-direction moving block 34 and the X-direction moving body 36 are moved. In other words, the wafer identification camera 38 includes an imaging field of a size that simultaneously captures two adjacent semiconductor wafers t held on the wafer ring 11. The two alignment marks provided at a pair of corners of the semiconductor wafers t are imaged by the wafer recognition camera 38. The positions of the respective semiconductor wafers t are detected based on the positions of the two alignment marks of each of the semiconductor wafers t captured. When the position of the semiconductor wafer t initially taken out is deviated from the taken-out position, the wafer ring holder 12 is moved to correct the position.

The detection of the positional deviation of the semiconductor wafer t located at the extraction position is not particularly limited, and it can be performed in accordance with various known methods. For example, the position of each alignment mark is detected from a captured image of two alignment marks provided at diagonal positions on the semiconductor wafer t by a known image recognition technique. The inclination of the line points connecting the two marks is obtained from the obtained position of the mark, and the inclination of the line points between the connecting marks in the semiconductor wafer t without positional deviation stored in the memory unit 51 in advance is compared with the inclination, and The difference is detected as a tilt deviation of the semiconductor wafer t. Moreover, the difference between the position of the midpoint between the actual alignment marks and the position of the midpoint between the alignment marks of the semiconductor wafer t without positional deviation stored in the memory section 51 is used as the positional deviation in the XY direction of the semiconductor wafer t. Find it out.

(3-2: Take-out of semiconductor wafer t)
After recognizing the positional deviation of the two semiconductor wafers t, the left suction nozzle 37a of the left transfer head 37 is moved directly above the semiconductor wafer t located at the removal position. Next, the Z-direction moving device 37c is driven to lower the suction nozzle 37a, and the suction surface of the suction nozzle 37a is brought into contact with the upper surface (electrode formation surface) of the semiconductor wafer t. After the suction nozzle 37a comes into contact with the semiconductor wafer t, the semiconductor wafer t is sucked and held to the suction nozzle 37a. The timing at which the suction force is applied by the suction nozzle 37a may be set to an appropriate time point before the suction nozzle 37a comes into contact with the semiconductor wafer t, at the same time, or after the contact.

After the left suction nozzle 37a sucks and holds the semiconductor wafer t, the suction nozzle 37a is raised to the original height. At this time, a lifting mechanism (not shown) is operated in accordance with the ascent of the suction nozzle 37a, and the peeling from the semiconductor wafer t of the resin sheet S is assisted. After the left suction nozzle 37a that sucks and holds the semiconductor wafer t is raised to the original height, or in parallel with the ascent, the right suction nozzle 37b is positioned directly above the take-out position while the next semiconductor wafer t is located at the take-out position. Similarly to the left suction nozzle 37a, the semiconductor wafer t is taken out in the right suction nozzle 37b.

The left and right suction nozzles 37a and 37b of the left transfer head 37 respectively hold and hold the semiconductor wafer t, and then the left and right suction nozzles 37a of the left transfer head 37 are moved by the Y-direction moving block 34 and the X-direction moving body 36. As shown in FIG. 10, 37 b are located on the mounting portions 31 a and 31 b of the intermediate stage 31. In this state, the left and right suction nozzles 37a and 37b are lowered, and the semiconductor wafer t held by the left and right suction nozzles 37a and 37b is placed on the mounting portions 31a and 31b.

In addition, in the above-mentioned take-out process, the semiconductor wafer t which should be taken out to the side of the semiconductor wafer t located at the take-out position does not exist, that is, the semiconductor wafer t located at the take-out position is a row to which the semiconductor wafer t belongs In the case of a terminal semiconductor wafer t. In this case, the semiconductor wafer t located at the head of the next row becomes the semiconductor wafer t to be taken out next. When the semiconductor wafer t is located in a range that can be taken into the imaging field of view of the wafer identification camera 38, two semiconductor wafers t are imaged simultaneously. On the other hand, when it is not in a range where the imaging field of view can be taken, two semiconductor wafers t are individually imaged. In the case of individual imaging, the imaging of the next (second) semiconductor wafer t may be performed before the first semiconductor wafer t located at the extraction position, or after the first semiconductor wafer t is removed.

(3-3: Acceptance of semiconductor wafer t)
After the semiconductor wafer t is placed on the mounting portions 31a and 31b of the intermediate stage 31, the mounting head 43 of the left mounting portion 40A moves to the intermediate stage 31. As shown in FIG. 11, the left and right mounting tools 43a, 43b is located above the placing portions 31a and 31b. After the left and right mounting tools 43a and 43b are positioned on the mounting portions 31a and 31b, the Z-direction moving devices 43c and 43d are driven to lower the mounting tools 43a and 43b, and the mounting tools 43a and 43b abut against the semiconductor wafer t, respectively. After the mounting tools 43a and 43b abut against the semiconductor wafer t, the semiconductor wafer t is sucked and held to the mounting tools 43a and 43b. The timing of the suction and holding may be set to an appropriate timing before, or at the same time as, or after the abutment of the mounting tools 43a and 43b to the semiconductor wafer t. After the mounting tools 43a and 43b suck and hold the semiconductor wafer t, the mounting tools 43a and 43b are raised to the original height by the Z-direction moving devices 43c and 43d. Thereby, the two semiconductor wafers t are simultaneously received by the mounting tools 43a and 43b.

Among them, (3-1) and (3-2) of the process (3), which are performed by the transfer unit 30B on the right side, are performed concurrently with the receipt and delivery of the semiconductor wafer t. At this time, the same applies to the transfer head 37 on the right side, and the semiconductor is processed in the order of the suction nozzle 37b on the inner side from the suction nozzle 37a on the outer side (because it is reversed from the left side of the transfer head 37 on the right side and the suction nozzle 37a on the right side). Take out the wafer t. In addition, the removal position where the transfer unit 30 takes out the semiconductor wafer t from the component supply unit 10 is a single position. Therefore, the extraction of the semiconductor wafer t by the transfer portion 30A on the left side and the extraction of the semiconductor wafer t by the transfer portion 30B on the right side are performed alternately.

(4) Installation process of semiconductor wafer t
(4-1: Position detection and movement of semiconductor wafer t)
After the mounting tools 43a and 43b receive the semiconductor wafer t, the semiconductor wafers t held on the mounting tools 43a and 43b are image-absorbed and held by the wafer recognition cameras 44a and 44b of the imaging unit 44 disposed above the mounting sections 31a and 31b. This imaging is performed by allowing members of the mounting tools 43a and 43b to see through. Based on the imaging images of the wafer identification cameras 44a and 44b, the positions of the semiconductor wafers t held and held on the mounting tools 43a and 43b are detected. This position detection can be performed by a well-known image recognition technique in the same manner as in (3-1) of the above-mentioned process (3). Based on the detected position of the semiconductor wafer t, a positional deviation of the semiconductor wafer t is obtained.

The position detection of the semiconductor wafer t may be performed on the placement sections 31 a and 31 b. At this time, after the semiconductor wafer t is imaged by the identification cameras 44a and 44b, the mounting tools 43a and 43b adsorb and hold the semiconductor wafer t. After the imaging of the semiconductor wafer t by the identification cameras 44a and 44b is completed, as shown in FIG. 12, the mounting tools 43a and 43b move over the rows of the mounting area of the supporting substrate W on the mounting line along the X direction. .

(4-2: Mounting of semiconductor wafer t)
Among the left and right mounting tools 43a and 43b, the mounting head 43 first positions the semiconductor wafer t held on the left mounting tool 43a in the mounting area of the mounting semiconductor wafer t held on the left mounting tool 43a. While moving. At this time, since the semiconductor wafer t held by the left mounting tool 43a is the semiconductor wafer t originally mounted on the support substrate W, the left mounting tool 43a is moved to the row of the mounting area on the mounting line. Located on the leftmost mounting area.

The movement position at this time is corrected based on the first and second tool correction data stored in the memory unit 51 and the position deviation of the semiconductor wafer t calculated by (4-1: detection and movement of the position of the semiconductor wafer t). . Moreover, in the (2-2: detection of global mark) process, when the inclination θ of the support substrate W is detected, the inclination θ is also corrected by the mounting tool 43a. After that, the mounting tool 43 a is lowered and the semiconductor wafer t is mounted on a desired mounting area of the support substrate W.

The bonding of the semiconductor wafer t to the support substrate W is performed using an adhesive force such as an adhesive sheet and a die attach film (DAF) attached to the surface of the support substrate W or the lower surface of the semiconductor wafer t in advance. The bonding of the semiconductor wafer t may be performed by providing a heater on the stage 21 in advance and pressing the semiconductor wafer t against the heated support substrate W. The heater may be built in the mounting tool 43a. After only pressing the semiconductor wafer t for a predetermined time, the adsorption of the semiconductor wafer t is released, and the mounting tool 43a is raised to the original height.

After the completion of the mounting by the mounting tool 43a, first move the mounting head on the mounting area of the mounted semiconductor wafer t held on the right mounting tool 43b to position the semiconductor wafer t held on the right mounting tool 43b. 43. After the semiconductor wafer t held on the right mounting tool 43b is positioned on the mounting area, the semiconductor wafer t is mounted on the mounting area by the same operation as the above-mentioned left mounting tool 43a. After the mounting of the semiconductor wafer t by the left and right mounting tools 43 a and 43 b is completed, the left mounting head 43 moves to the intermediate stage 31.

Among them, (3-1) and (3-2) of the process (3) are performed in parallel with the mounting process of the semiconductor wafer t, which is performed by the transfer unit 30A on the left side. Therefore, when the mounting head 43 on the left side moves to the mounting portions 31 a and 31 b of the intermediate stage 31, the semiconductor wafer t to be mounted next is placed on the mounting portions 31 a and 31 b. Therefore, after moving to the left mounting head 43 on the intermediate stage 31, the semiconductor wafer t is immediately received from the mounting portions 31a and 31b, and then (4-1) and (4-2) of the process (4) are performed. Thereafter, this operation is repeated until the mounting of the semiconductor wafer t to all the mounting regions on the support substrate W is completed.

Even when the semiconductor wafer t is being mounted by the mounting tools 43a and 43b of the mounting head 43 on the left side, the mounting portions 31c and 31d of the intermediate stage 31 are moved by the transfer portion 30B on the right side. In the stage where the transfer of the semiconductor wafer t is completed, the mounting of the semiconductor wafer t by the mounting head 43 of the mounting section 40B on the right is started. This operation is the same as (4-2) of the above-mentioned process (4) described with the example of the mounting portion 40A on the left. The same applies to the mounting head 43 on the right side. The semiconductor wafer t is processed from the mounting tool 43a on the outside (because it is reversed from the mounting head 43 on the left and to the right) in the order of the mounting tool 43b on the inside. Installed. The same applies to the mounting of the semiconductor wafer t on the right mounting portion 40B, and is the same as the mounting portion 40A on the left, and is repeated until the mounting of the semiconductor wafer t to all the mounting areas on the support substrate W is completed. The action.

At this time, the left mounting portion 40A and the right mounting portion 40B divide the area on the support substrate W in the left and right (X direction) into two equal parts, and share the respective areas for mounting the semiconductor wafer t. Therefore, the mounting head 43 of the mounting portion 40A on the left side and the mounting head 43 of the mounting portion 40B on the right side can not only perform (4-1) and (4-2) of the above process (4) interactively, but also Simultaneously in parallel. The mounting of the semiconductor wafer t also moves the stage 21. That is, when the left and right mounting heads 43 mount the semiconductor wafer t in the mounting area supporting the substrate W, the mounting tools 43a outside the mounting heads 43 are respectively set at predetermined positions on the mounting lines (hereinafter, referred to as "Mounting position".) Controls the movement position by mounting method.

This mounting position is set at a position shown by the reference numerals 71A and 71B of the support substrate W placed in a regular positional relationship with the stage 21 at the origin position, for example. In this embodiment, the distance between the two mounting positions is set to "a distance that is an integral multiple (n times) of a distance (2P) that is twice the placement interval (distance between the centers) P of the mounting area") . The distance (2P × n) between the mounting positions is equal to or more than the close interval, and the distance (2P × n) is set to be narrower in accordance with the arrangement state of the mounting area supporting the substrate W therein. It is important that the distance between the mounting positions is preferably set as the distance between the mounting positions that is equal to or more than the proximity interval and the value closest to the proximity interval (2P × n). In this case, since the mounting position by the mounting tool 43a on the outside of each mounting head 43 is set at a fixed position on the mounting line, the stage 21 is in the mounting area on the mounting line supporting the substrate W. In the middle, the movement control is performed so that the mounting region where the semiconductor wafer t is mounted by the outer mounting tool 43a is sequentially located at the mounting position. Of course, this movement control is performed by adding the stage correction data stored in the memory unit 51.

More specifically, first, the stage 21 is in a row of the mounting area on the support substrate W on the mounting line so that the semiconductor wafer is initially mounted by the mounting tool 43a on the outside of the mounting head 43 on the left side. The mounting area of t moves sequentially in the mounting position on the left. After mounting the semiconductor wafer t in the mounting area on the left mounting position, the mounting area next to the mounting area is mounted by the mounting tool 43b on the inside (right) of the mounting head 43 on the left side. Semiconductor wafer t. The movement when mounting the semiconductor wafer t in the adjacent mounting area with the inner mounting tool is performed by moving the mounting head 43 as described above. At this time, the mounting area 43a on the outer side (right) of the mounting head 43 on the right side initially mounts the semiconductor wafer t on the mounting area because it is located on the right side and is mounted on the outer side (right). The semiconductor wafer t is mounted on the tool 43a, and then the semiconductor wafer t is mounted on the inside (right) mounting tool 43b.

When the semiconductor wafer t is mounted by the mounting tool 43b on the inner side (left) of the mounting head 43 on the right side, the stage 21 is in the row of the mounting area on the supporting substrate W on the mounting line so that The mounting area of the second semiconductor wafer t is moved by the left mounting tool 43a to the left mounting position. In this way, the stage 21 sequentially positions the mounting area on which the semiconductor wafer t is mounted by the left and right mounting tools 43a. During the mounting of a series of semiconductor wafers t (mounting of four semiconductor wafers t) of the mounting tools 43a, 43b of the left and right mounting heads 43, the support substrate W stops at a fixed position, and the next Prior to the mounting of the semiconductor wafer t (the next mounting of the four semiconductor wafers t), the supporting substrate W is moved by the stage 21 so that the next mounting region of the supporting substrate W is located at the mounting position. In addition, in the above-mentioned correction process (1), if there is a deviation in the position recognition result of the point mark by the substrate recognition camera 43f of the left and right mounting heads 43, the movement is performed to correct the deviation point.

(5) After the mounting and unloading process of the support substrate W is completed with respect to the mounting of the semiconductor wafer t in all mounting areas on the support substrate W, the transfer unit 30 and the mounting unit 40 are temporarily stopped, and the implementation from the semiconductor wafer t is performed. The loading of the stage 21 supporting the substrate W is completed, and the stage 21 is loaded into the stage 21 newly supporting the substrate W. The carrying out of the support substrate W from the stage 21 is performed by a transfer robot different from the transfer robot described in the above process (2). This transfer robot penetrates the transfer arm from the right side of the mounting device 1 through the space under the door of the support frame 41 of the right mounting portion 40B, receives the support substrate W on the stage 21, and passes through the door of the support frame 41 The space below will support the substrate W out. The carried-out support substrate W is carried to a sealing process S2 described later. A new support substrate W is set on the stage 21 in the same manner as the above-mentioned process (2).

(6) The wafer ring 11 exchange process is the same as described above. The semiconductor wafer t is repeatedly mounted on the supporting substrate W. When the semiconductor wafer t on the wafer ring 11 is gone, the wafer ring 11 and the new wafer are removed. Ring 11 exchange. This exchange is performed in the same manner as the above-mentioned process (1) using the wafer ring holding device 32 provided on the left-side transfer section 30A. That is, when the semiconductor wafer t on the wafer ring 11 is not present, the holding of the wafer ring 11 by the stretching mechanism (not shown) provided in the component supply unit 10 is released. After that, the wafer ring holding device 32 stores the wafer ring 11 from the wafer ring holder 12 into the storage section (not shown) in the operation opposite to the process (1), and then moves the new one in the operation of the process (1). The wafer ring 11 is supplied from the storage portion to the wafer ring holder 12.

As shown in FIG. 13, a plurality of semiconductor wafers t1 to t3 may be mounted in one mounting area MA. In this case, as described above, after the mounting of the first semiconductor wafer t1 is completed, the wafer ring 11 on which the second semiconductor wafer t2 is mounted is set in the component supply unit 10, and the mounting of the first semiconductor wafer t2 is set on the stage 21. A support substrate W of one semiconductor wafer t1. Next, by performing the same operation as described above, the mounting of the second semiconductor wafer t2 is sequentially performed on each mounting region MA where the first semiconductor wafer t1 is mounted. In this way, after the second semiconductor wafer t2 is mounted on all the mounted regions MA of the semiconductor wafer t1, the wafer ring 11 on which the third semiconductor wafer t3 is mounted is set in the component supply section 10, and then The stage 21 sets the supporting substrate W on which the semiconductor wafers t1 and t2 have been mounted, and the third semiconductor wafer t3 is mounted by the same operation. In this manner, a plurality of semiconductor wafers t1 to t3 are mounted in each mounting region MA of the support substrate W.

When a plurality of semiconductor wafers t1 to t3 are mounted in one mounting area MA, after the first semiconductor wafer t1 is mounted to all the supporting substrates W as described above, it is not limited to switching to the mounting of the second semiconductor wafer t2. method. For example, after the mounting of the first semiconductor wafer t1 on one support substrate W is completed, the semiconductor wafer t supplied from the component supply unit 10 may be switched to the second semiconductor wafer t2. The third semiconductor wafer t3 is also the same. After the mounting of the second semiconductor wafer t2 is completed on one support substrate W, the third semiconductor wafer t3 may be switched. That is, a plurality of types of semiconductor wafers t may be mounted on a supporting substrate W unit. At this time, since the supporting substrate W is not removed from the stage 21 until the mounting of the semiconductor wafers t of all kinds is completed on one supporting substrate W, the mounting accuracy of the plurality of kinds of semiconductor wafers t can be further improved.

In the method of mounting the semiconductor wafers t of the respective varieties to all the support substrates W, the support substrate W for mounting the semiconductor wafers t1 of the first variety is temporarily removed from the stage 21 to mount the semiconductors of the second variety. The wafer t2 is placed on the stage 21 again. Therefore, when the first-type semiconductor wafer t1 is mounted and when the second-type semiconductor wafer t2 is mounted, the position of the support substrate W on the stage 21 is deviated, that is, the placement position is deviated. Even if it happens to be the same position on the stage 21, it will generally deviate. Although the position of the support substrate W is identified by global identification, there may be a deviation in the identification position of the support substrate W due to factors such as an identification error. Therefore, it is presumed that the relative position accuracy between the first variety and the second variety is reduced only by this portion. On the other hand, when the semiconductor wafer t1 of the first type and the semiconductor wafer t2 of the second type are continued to be mounted without removing the support substrate W from the stage 21, it is possible to prevent positional deviation due to recognition errors. Therefore, the relative position accuracy between the first and second varieties can be improved.

The number of semiconductor wafers t mounted on the plurality of mounting regions of each support substrate W is not limited to one type. One support substrate W may be divided into a plurality of regions, and different types of semiconductor wafers t may be mounted in each region. For example, the semiconductor wafer ta of type A may be mounted in the first area on one side and half of the support substrate W bisected in the Y direction, and the semiconductor wafer tb of type B may be mounted on the second area of the remaining half. A type A semiconductor package is manufactured from the first region where the type A semiconductor wafer ta is mounted. A B-type semiconductor package is manufactured from a region where the B-type semiconductor wafer tb is mounted.

At this time, the semiconductor wafer ta of type A and the semiconductor wafer tb of type B have different circuit patterns of the rewiring layer formed in the post-process, and the exposure patterns for rewiring formation are also different. Therefore, it is estimated that it becomes more and more difficult to correct the mounting errors of the semiconductor wafers ta and tb by the exposure process. When the mounting device and the mounting method of the embodiment are applied, the mounting can be performed with high relative position accuracy between the semiconductor wafer ta of type A and the semiconductor wafer tb of type B. Therefore, the exposure processing for the area where the semiconductor wafer ta of the type A is mounted and the exposure processing for the area where the semiconductor wafer tb of the type B is mounted can be collectively performed, which can improve production efficiency.

When the semiconductor wafer ta of type A is installed in the first area and the semiconductor wafer tb of type B is installed in the second area, the size of the semiconductor wafer ta of type A and the semiconductor wafer tb of type B may be different. If the mounting pitch of the product is different from that of the B type. In this case, when the semiconductor wafer ta of type A is mounted and the semiconductor wafer tb of type B is mounted, the semiconductor wafer ta, tb of a plurality of types can be satisfactorily changed by switching the feeding amount of the stage 21. Mounted to a plurality of regions of the support substrate W. Similarly, a combination of the C-type and D-type semiconductor wafers constituting the first multi-chip package is mounted in the first region of the support substrate W, and the E-type and F-type semiconductors constituting the second multi-chip package are mounted in the second region. Combinations of semiconductor wafers are also possible. In any of these mountings, each type of semiconductor wafer t may be mounted on a plurality of supporting substrates W, or a plurality of types of semiconductor wafers may be mounted on a supporting substrate W unit. These specific installation works are as described above.

In addition, in these cases, the identification of the global mark of the supporting substrate W may be performed only once, and it is not necessary to identify the supporting substrate W again when the semiconductor wafer t is moved from the mounting area from the first area to the second area. Global markup is fine. In addition, when a heater or the like is provided on the stage 21 to heat the support substrate W, the correction data of the stage 21 may be switched in the first region where the semiconductor wafer t is mounted first and then in the second region where it is mounted. This allows the semiconductor wafer t (tb) of the semiconductor wafer t (tb) to be compatible with the thermal expansion amount of the portion corresponding to the second region of the support substrate W while the semiconductor wafer ta of the A type is mounted in the first region. The mounting accuracy is maintained at high precision.

When mounting a plurality of types of semiconductor wafers t in the above-mentioned support substrate W unit, a wafer supply mechanism using a tape feeder as the component supply unit 10 may be provided with a plurality of tape feeders corresponding to a plurality of types. When a tape feeder is used, the wafer transfer device 30A and the mounting portion 40A on the left side and the transfer portion 30B and the mounting portion 40B on the right side are equipped with dedicated wafer supply mechanisms on both sides of the clamping part supply portion 10, respectively. can. In this case, different types of semiconductor wafers t or different combinations of semiconductor wafers t can be supplied to the left and right transfer portions 30A, 30B and the mounting portions 40A, 40B. Therefore, it is effective when the above-mentioned support substrate W is divided into two regions to separately manufacture different semiconductor packages.

The semiconductor substrate t of the above-mentioned one type, or a plurality of types of semiconductor wafers t1, t2, t3, or the semiconductor wafers ta, tb, and the like, after completion of mounting, are sent to the post-processing shown below to manufacture a semiconductor package Kind of package parts. That is, the supporting substrate W on which the mounting of the semiconductor wafer is completed is sequentially sent to the sealing process and the formation process of the redistribution layer. In the sealing process, a gap between the semiconductor wafers mounted on the support substrate W is filled with a resin, thereby forming a pseudo panel or a pseudo wafer. The suspected panel or pseudo wafer is sent to the formation process of the redistribution layer. In the formation process of the redistribution layer, a semiconductor wafer manufacturing process, a printed circuit board manufacturing process, or a display panel manufacturing process circuit implementation process is performed, that is, a photosensitive material coating process such as a photoresist material, and exposure of the photosensitive material. And development process, etching process, ion implantation process, stripping process of photoresist, etc., through these processes, a redistribution layer is formed on a semiconductor wafer like a panel or a pseudo wafer. The suspected panel or pseudo-wafer forming the redistribution layer is sent to a dicing process, where the suspected panel or pseudo-wafer is singulated to produce a package component of a semiconductor package.

Therefore, as shown in FIG. 14, the method for manufacturing a package component according to the embodiment includes a mounting process S1 for mounting electronic components in a plurality of mounting areas on a supporting substrate W, and a method for mounting the components in the plurality of mounting areas. Electronic components are collectively sealed to form a suspected wafer or pseudo-panel sealing process S2, a redistribution process S3 by forming a redistribution layer on an electronic component of the suspected wafer or pseudo-panel, and cutting the suspected panel or pseudo-wafer to manufacture package components Cutting works S4. The rewiring process S3 includes a coating process S31 of the above-mentioned photosensitive material, an exposure and development process S32 of the photosensitive material, an etching process S33, an ion implantation process S34, a photoresist peeling process S35, and the like. The mounting process of the electronic component in the manufacturing method of the package member of this embodiment is implemented based on the mounting method of the electronic component of this embodiment. In the method of manufacturing a package component according to the embodiment, the electronic component mounted on each mounting region of the support substrate W may be one semiconductor wafer t as described above, a plurality of semiconductor wafers, or a plurality of semiconductor wafers of the same type. can. There are no particular restrictions on the type and number of electronic components.

In the mounting device 1 according to the above embodiment, the left and right mounting heads 43 and 43 each including two mounting tools 43a and 43b are positioned in the plurality of mounting areas on the support substrate W with respect to each other. The semiconductor wafer t is mounted on several mounting areas set in advance along the X direction. At this time, the movement of the stage 21 by the XY moving mechanism 22 as the stage moving mechanism of the stage unit 20 is performed by using a stage correction that corrects the movement position error of the stage 21 and is stored in the memory unit 51 in advance. Information is corrected. In addition, the Y-direction moving device 41a and the X-direction moving device 42a, which are mounting head moving mechanisms of the left and right mounting heads 43, are moved on the mounting line of each mounting tool 43a, 43b by using: acquired in advance and memorized in The first tool correction data in the memory section 51 is a tool correction data for correcting the movement position error of the left and right mounting tools 43a and 43b on each mounting line, and a mounting tool for correcting the movement to the mounting position. The second tool correction data of the tool correction data of the position error at the time of mounting performed by 43a and 43b is corrected.

With this, when the left and right mounting heads 43 respectively mount the semiconductor wafer t at different positions on the mounting line with respect to the support substrate W by the two mounting tools 43a and 43b, the same can be achieved with respect to the support substrate W. The mounting error of the semiconductor wafer t in each mounting region on the upper surface is reduced. In addition, by using the left and right mounting heads 43 each having a plurality of (2) mounting tools 43a and 43b to mount the semiconductor wafer t in a plurality of mounting areas of the support substrate W, the mounting time of one semiconductor wafer t can be achieved. (The number of man-hours required for mounting one semiconductor wafer t as the mounting apparatus 1) is reduced. Therefore, reduction in man-hours and improvement in mounting accuracy can be achieved.

That is, in the mounting device 1 of the embodiment, the left and right mounting heads 43 are provided with a total of two mounting tools 43a, 43b, respectively, and are usually set along the arrangement direction (X direction) of the mounting tools 43a, 43b. The semiconductor wafer t is mounted on a certain mounting line. Therefore, the mounting positions performed by the four mounting tools 43a and 43b are concentrated on one line. While suppressing an increase in the mounting time based on the time required for the movement of the mounting tools 43a and 43b, it is possible to simplify the use of A pattern for generating a movement position error of each of the mounting tools 43a and 43b generated during the mounting movement. This makes it possible to ensure the movement position accuracy of each mounting tool 43a, 43b by a simple correction method, suppress a reduction in mounting efficiency, and improve the mounting accuracy of the semiconductor wafer t.

In addition, since the movement position error of the stage 21 is corrected by the stage correction data, the stage 21 can be moved with high accuracy by a preset movement amount. This makes it possible to improve the positioning accuracy when each row of the mounting region supporting the substrate W is positioned on the mounting line. Further, when obtaining the stage correction data, the positions of the dot marks 72 provided on one calibration substrate 71 at equal intervals are identified at respective fixed positions by the substrate recognition cameras 43f provided on the left and right mounting heads 43. Thereby, it is possible to grasp the difference in the moving position error between different regions on the same stage 21, and to carry out the semiconductor wafer t at different positions on the stage 21 (different positions on the mounting line) by using the left and right mounting heads 43. The same can be ensured during mounting.

Therefore, it is possible to achieve a mounting accuracy of ± 7 μm or less and a working time of 0.4 seconds or less at the same time. As a result, the electronic components including the semiconductor wafer t can be mounted with high accuracy with respect to the support substrate W in which no mark for position detection is provided in each mounting area, so that the mutual interval becomes a predetermined interval, Furthermore, the electronic component including the semiconductor wafer t on the support substrate W can be mounted with high productivity. That is, by simultaneously mounting the left and right mounting portions 40A and 40B in parallel, it is possible to shorten the man-hours required for the mounting of the semiconductor wafer t, and at the same time, the mounting of the semiconductor wafer t on a certain mounting line and the The correction of the movement position of the stage correction data and the tool correction data can achieve the improvement of the mounting accuracy and the prevention of the reduction of productivity at the same time.

For example, it is considered that the stage 21 on which the support substrate W is placed is not moved, and the mounting tools 43a and 43b of the left and right mounting heads 43 are sequentially moved in the respective mounting areas on the support substrate W, and the mounting tools 43a and 43b are sequentially moved. The correction data for protecting the entire region on the supporting substrate W is created on the side. At this time, as compared with the case where the correction data is created on the substrate stage side, an enlarged correction data is required, and the time required for correction becomes longer. That is, the mounting tools 43a and 43b are different from the substrate stage 21 in that the semiconductor wafer t is mounted on the support substrate W, and an up-and-down mechanism is necessary. Therefore, in addition to the movement position error of the mounting head moving mechanism, the positional deviation in the XY direction due to the up and down movement of the mounting tools 43a and 43b should be considered as the correction data.

Here, when preparing the correction data on the mounting head side and used to obtain the stage correction data for stage 21, the movement position error measured at intervals shorter than 3 mm, for example, at short intervals such as every 1 mm pitch, should be necessary. If the movement position deviation is measured at a pitch of 1 mm with respect to a movement range of 600 mm × 600 mm, measurement at 600 points × 600 points or 360,000 points becomes necessary. Compared with the case of measurement at a 3 mm pitch (3 mm pitch is 40,000 points), The measurement site is 9 times. Therefore, the measurement time is also 9 times. For example, in the mounting device 1 of the embodiment, if it takes about 4 to 5 hours to obtain the stage correction data, it takes 36 to 45 hours. This is not practical.

Therefore, each of the left and right mounting heads 43 includes two mounting tools 43a and 43b, and a total of four mounting tools 43a, 43b. The semiconductor wafer t is usually mounted on a certain mounting line. The implementation device 1 of the embodiment having a configuration in which the correction data is corrected and the movement position errors of the mounting tools 43a and 43b are corrected by the tool correction data is understood to improve the mounting accuracy of the semiconductor wafer t and the semiconductor wafer. The man-hours required for t's mounting are shortened, achieving high productivity and being extremely effective.

Among them, when the left and right mounting heads 43 are provided with two mounting tools 43a and 43b, two semiconductor wafers t can be mounted in one reciprocation, and the configuration includes only one mounting head 43 and the left and right mounting heads. Compared with the configuration in which each of the mounting tools 43 includes one mounting tool, the total moving distance of the mounting head 43 can be simply shortened. This is because when the support substrate W is increased in size of 600 × 600 mm or more, the reduction in man-hours due to the shortened moving distance of the mounting head 43 is effective. Furthermore, in the mounting device 1 of the embodiment, since the mounting of the four mounting tools 43a, 43b of the left and right mounting heads 43 is carried out, the mounting area of the supporting substrate W is kept at a fixed level. When the mounting line is moved, the moving distance of the mounting head 43 can be further shortened.

In addition, even if the left and right mounting heads 43 each include two mounting tools 43a and 43b, the mounting position is set to a fixed position so that each mounting area of the support substrate W is sequentially located at a fixed mounting position, When the mounting head 43 performs the mounting of the semiconductor wafer t alternately, while the semiconductor wafer is mounted on one mounting head, the other mounting head is on standby. Among them, even if a plurality of mounting tools are provided for each mounting head, the working hours cannot be sufficiently shortened. Furthermore, the mounting positions of the left and right mounting heads 43 are individually set to the left and right, and the support substrate cannot be moved until the mounting of the semiconductor wafer by the left and right mounting heads 43 is completed. In this case, there is a possibility that the standby time of the mounting head may be generated, and the reduction of man-hours may be prevented.

In the mounting device 1 of the embodiment, the left and right mounting heads 43 are provided with a total of two mounting tools 43a, 43b, respectively. Usually, the semiconductor wafer t is mounted on a certain mounting line, and the left and right mounting heads 43 are adjusted at the same time. It is possible to mount semiconductor wafers at the same time with the left and right mounting heads 43 simultaneously. After mounting the semiconductor wafer t with one mounting tool 43a of one mounting head 43, the mounting of the semiconductor wafer t by the other mounting tool 43b is performed by moving the mounting head 43. Therefore, it is possible to shorten or reduce the waiting time when mounting the semiconductor wafer t with the left and right mounting heads 43. That is, the mounting of the semiconductor wafer t by the mounting tools 43a and 43b provided on the left and right mounting heads 43 can be performed more efficiently. This makes it possible to efficiently perform the mounting of electronic components such as the semiconductor wafer t performed by the four mounting tools 43a and 43b in total, and it is also possible to reduce the number of man-hours of the mounting device 1 as a whole.

As shown in FIG. 13, the mounting device 1 of the above embodiment mounts a plurality of types of semiconductor wafers t1, t2, and t3 in one mounting area MA, or mounts one or a plurality of types of semiconductor wafers t and t. Diodes or capacitors are effective. As mentioned above, when mounting multiple types of electronic components in one mounting area, the relative positional deviation of the plurality of electronic components in one mounting area (package) may cause deviations in the relative positions of the electronic components. Therefore, it is corrected to one mounting area during exposure. It is difficult to apply a technique of mounting error that can be applied to a single chip package in which a semiconductor chip is assembled in a mounting area (package). Therefore, it is necessary to improve the position accuracy of the plurality of electronic components by themselves. In view of this, since the mounting device 1 of the embodiment can improve the mounting accuracy of each electronic component including the semiconductor wafer t, even when a plurality of electronic components are mounted in one mounting area, it can be improved in one mounting. Relative position accuracy of plural electronic components in the area.

In addition, in the above-mentioned embodiment, the semiconductor wafer t is mounted on the support substrate W on a certain mounting line. The fixed mounting line may be set at the same position in the Y direction that the mounting device 1 usually does not change. For example, the fixed mounting line may be set in the Y direction in accordance with conditions such as the size of the support substrate W. . The mounting line set along the X direction may be at least a position from the start of the mounting of the electronic component to the end of the mounting to the end of the mounting.

Further, in the above-mentioned embodiment, the stage correction data for correcting the movement error of the stage 21 may be acquired in the entire range of the movable range of the stage 21, and at least each mounting area on the support substrate W may be located in the mounting area. The position may be acquired within the range where the stage 21 moves. The same applies to the tool correction data for correcting the movement position errors of the mounting tools 43a and 43b, and it is also possible to obtain the entire range of the movable range of the mounting tools 43a and 43b, at least in each mounting area on the support substrate W. When mounting the semiconductor wafer t, it may be acquired within the range of movement of the mounting tools 43a and 43b. In addition, for the stage correction data and tool correction data, the actual measurement value of the movement position error of the stage 21 and the movement position error of the mounting tools 43a and 43b may be used, or the correction value to offset the movement position error may be used. Measured value processor. It is mainly used to correct the movement position error data of the mounting table 21 and the mounting tools 43a and 43b.

In the mounting device 1 according to the above embodiment, the example in which the semiconductor wafer t is mounted on the support substrate W with the electrode formation surface (upper surface) facing upward is mainly described as an example. With this limitation, the semiconductor wafer t can also be mounted on the support substrate W with its surface facing down, with its electrode forming surface facing down.

When the mounting device 1 according to the embodiment is mounted face-down, the semiconductor wafer t taken out by the suction nozzles 37a and 37b of the transfer section 30 is not placed on the intermediate stage 31, but is reversed by the reversing mechanism 37e. And 37f reverse the suction nozzles 37a and 37b. In this state, the suction nozzles 37 a and 37 b are moved on the intermediate stage 31, and the semiconductor wafer t is received from the suction nozzles 37 a and 37 b to the mounting tools 43 a and 43 b of the mounting section 40.

The operation after receiving the semiconductor wafer t by the mounting tools 43a and 43b can be performed in the same manner as the above-mentioned process (4). In addition, although the position of the semiconductor wafer t before mounting can be detected, the wafer identification cameras 44a to 44d can also be used, but the camera that sucks and holds the semiconductor wafer t held by the mounting tools 43a and 43b from the lower side is arranged in The vicinity of the intermediate stage 31 may be arranged instead of the intermediate stage 31. why? In the face-down bonding, although the semiconductor wafer t is held and held on the mounting tools 43a and 43b with the electrode formation surface facing downward, the alignment mark of the semiconductor wafer t is usually provided on the electrode formation surface, and the wafer identification camera 44a ~ 44d The imaging mark of the semiconductor wafer t cannot be imaged.

Here, if a camera is provided to image the semiconductor wafers t held and held on the mounting tools 43a, 43b from below, it is possible to directly image the alignment marks of the semiconductor wafer t held and held on the mounting tools 43a, 43b. When the wafer identification cameras 44a to 44d are used, the positional relationship between the alignment marks and the outer position of the semiconductor wafer t is identified in advance at the stage where the position of the alignment mark of the semiconductor wafer t is detected by the wafer identification camera 38. Next, after the semiconductor wafer t is sucked and held on the mounting tools 43a and 43b, the semiconductor wafer t is imaged by the mounting tools 43a and 43b by the wafer recognition cameras 44a to 44d, and the outer shape of the semiconductor wafer t is obtained from the imaging image The position and the positional relationship between the previously identified alignment mark and the external position of the semiconductor wafer t can be detected by detecting the position of the semiconductor wafer t that is held and held on the mounting tools 43a and 43b.

In the embodiment described above, an example has been described in which two mounting tools 43a, 43b are respectively provided on the left and right mounting heads 43, but it is not limited to this, and the number of mounting tools may be three or more. However, as the number of mounting tools increases, the proximity interval becomes larger, so the size of the support substrate W for mounting the semiconductor wafer t is preferably set. In the 600 × 600 mm support substrate W exemplified in the present embodiment, it is preferable that the number of mounting tools with respect to one mounting head 43 is two to three.

In the above-mentioned embodiment, an example in which one mounting head 43 is arranged on the left side as the first mounting head and one mounting head 43 is arranged on the right side as the second mounting head is described, but it is not limited to this. It is also possible to arrange the plural mounting heads 43 separately. That is, the first and second mounting heads do not necessarily have to be constituted by a single mounting head, but may be constituted by a plurality of mounting heads. In this case, the plural mounting heads may be arranged in the Y direction, and may be configured so as to be independently movable in the XYZθ directions. At this time, the support frame 41 that supports the Y-direction moving device 41a may be shared among a plurality of mounting heads, or may be separately provided for each mounting head.

Furthermore, in the embodiment described above, the support substrate W is not provided with a mark for position detection in each mounting area. Although it is described that it is removed during the manufacturing process of the package component, it is not limited to this. According to the mounting device and the mounting method according to the embodiment, for example, a position detection mark is provided in each mounting area, that is, it is not necessary to rely on a position detection mark with respect to a substrate used as a part of a packaging component. It is also possible to mount semiconductor wafers (electronic components) with high accuracy and efficiency.

[Example]

Next, examples of the present invention and evaluation results thereof will be described.

(Example 1)
With the mounting device 1 of the above embodiment, the actual mounting of a semiconductor wafer on a support substrate is performed under the following conditions. The target mounting accuracy is within ± 7 μm, and the target working time is within 0.45 seconds.
＜ Installation conditions ＞
・ Semiconductor wafer t size: 4mm × 4mm
・ Number of installations (vertical × horizontal): 14 × 7 per 98 mounting heads (98 in total)
7 x 7 (49 counts) x 4 mounting tools per mounting tool, mounting pitch (vertical x horizontal): 12 mm x 60 mm per mounting head
24mm × 60mm for each mounting tool
・ Joining time: 0.1 second ・ Joint load: 5N (Newton)

FIG. 15 is a virtual representation of a mounting area set on the support substrate W. FIG. However, only the global mark is set on the actual support substrate W, and the mounting area cannot be viewed. As shown in FIG. 15, on the supporting substrate W for measurement, 49 mountings are set at 7 positions in the X direction and 7 mounting positions in the Y direction with respect to the mounting tools 43a and 43b of the left and right mounting heads 43 respectively. region. Use the symbols A1 to A49 for the mounting area of the left mounting tool 43a of the left mounting head 43 and symbols B1 to B49 for the mounting area of the right mounting tool 43b of the left mounting head 43. The mounting area of the mounting tool 43a is indicated by symbols C1 to C49, and the mounting area of the right mounting tool 43b of the right mounting head 43 is indicated by symbols D1 to D49.

Together with the left and right mounting heads 43, the mounting area of the left mounting tool 43 a is indicated by the reversed four corners (□), and the mounting area of the right mounting tool 43 b is indicated by the blackened four corners (■). In the region on the left half of the support substrate W, the mounting area of each of the mounting tools 43a, 43b of the left mounting head 43 is set, and in the region of the right half, the actual mounting tools 43a, 43b of the right mounting head 43 are set. Loading area. The mounting areas of the left and right mounting tools 43a and 43b are set so as to be alternately arranged in the X direction. The interval between the mounting areas is set to 12 mm. In other words, for the X direction, a total of 14 mounting areas are set at 12 mm intervals, and for the Y direction, 7 mounting areas are set at 60 mm intervals.

As shown in FIG. 15, along with the left half area and the right half area, the upper left installation areas A1 and C1 are used as starting points, and the X direction indicated by the dotted arrow in the figure is a trajectory of reentry, by The left and right mounting tools 43a and 43b are interactively mounted. From the time when the mounting tool 43a, 43b of each mounting head 43 sucks and holds the first semiconductor wafer t, the mounting tool 43a on the left side starts to descend toward the first mounting area A1, and the mounting tool 43b on the right side ends. The elapsed time (referred to as "the time required for mounting") until the end of the mounting of the last (49th) semiconductor wafer t to the original height (the time required for mounting) is 41.2 seconds. Thereby, the mounting position deviations of the 98 semiconductor wafers t mounted on the support substrate W are measured with an inspection device. The results are shown in Table 1.

In Table 1, the symbols of the mounting area in FIG. 15 are respectively represented by English letters and numbers. That is, the English letters (A, B, C, and D) corresponding to the mounting tools 43a and 43b are described as columns of the table, and numbers are described as rows of the table. The amount of positional deviation in the X direction and the Y direction of the semiconductor wafer t in each mounting region is shown for each mounting tool 43a, 43b. The unit is micrometer [μm]. Under the data of the mounting position deviation of the semiconductor wafer t of each mounting tool 43a, 43b, the average value, minimum value, maximum value, maximum value, and minimum value of the position deviation of each mounting tool 43a, 43b are recorded separately. The width, σ value, and 3 σ value are described on the right side with the same values that take into account all deviations from the mounting position.

As shown in Table 1, the maximum value of the positional deviation in the X direction of the semiconductor wafer t is 3.1 μm of the mounting area number D1 caused by the right mounting tool 43 b of the right mounting head 43, and the minimum value is the right mounting head 43. The mounting area number C35 of the left mounting tool 43a is -3.3 μm. The maximum position deviation in the Y direction is 3.2 μm of the mounting area number B2 caused by the right mounting tool 43b of the left mounting head 43 and the minimum value is caused by the right mounting tool 43b of the right mounting head 43. -2.8 μm of mounting area number D43. It was confirmed that the mounting accuracy of the 196 semiconductor wafers t was within ± 7 μm of the target. Since the time required for mounting is 41.2 seconds, the time required for mounting one semiconductor wafer t is 41.2 seconds / 98 = 0.42 seconds. Therefore, the working time is 0.42 seconds, and the number of productions per hour is about 8570 (= 3600 seconds / 0.42 seconds).

(Comparative example 1)
The semiconductor wafer t is mounted on each mounting area of the support substrate W under the same conditions as in Example 1 except that the stage correction data and tool correction data are not used. Table 2 shows the measurement results of the mounting position deviations of the 196 semiconductor wafers t mounted on the support substrate W by an inspection device.

As shown in Table 2, the maximum value of the positional deviation in the X direction of the semiconductor wafer t is 8.8 μm of the mounting area number B7 caused by the right mounting tool 43b of the left mounting head 43 and the minimum value is the right mounting head 43. -27.0 μm of mounting area number C43 caused by the left mounting tool 43a. The maximum position deviation in the Y direction is 23.7 μm of the mounting area number C23 caused by the left mounting tool 43a of the right mounting head 43 and the minimum value is the mounting caused by the left mounting tool 43a of the right mounting head 43. Area number C45-22.7 μm. In Comparative Example 1, it was confirmed that the mounting accuracy of the semiconductor wafer t could not satisfy the target within ± 7 μm at all.

In addition, although several embodiments of the present invention have been described, these embodiments are merely examples and are not intended to limit the scope of the present invention. These novel embodiments may be implemented in various other forms, and various omissions, substitutions, and changes may be made without departing from the scope of the invention. These embodiments and modifications are included in the scope and gist of the invention, as well as the inventions described in the scope of patent application and their equivalent scope.

1‧‧‧installed device

10‧‧‧Parts Supply Department

11‧‧‧wafer ring

12‧‧‧ Wafer ring holder

20‧‧‧Department

21‧‧‧ carrier

22‧‧‧XY moving mechanism

30, 30A, 30B ‧‧‧ Transfer Department

31‧‧‧ intermediate stage

37‧‧‧ transfer head

40, 40A, 40B ‧‧‧ Installation Department

41‧‧‧ Support Framework

41a‧‧‧Y direction moving device

42a‧‧‧X-direction mobile device

43‧‧‧mounted head

43a, 43b‧‧‧Mounting tools

43c, 43d‧‧‧Z direction moving device

43f‧‧‧ substrate identification camera

44‧‧‧ camera unit

44a, 44b, 44c, 44d‧‧‧‧Chip Identification Camera

50‧‧‧Control Department

51‧‧‧Memory Department

W‧‧‧Support substrate

t‧‧‧semiconductor wafer

T‧‧‧semiconductor wafer

[Fig. 1] A plan view showing a mounting device according to the embodiment.

[FIG. 2] A front view showing a mounting device according to the embodiment.

[Fig. 3] A right side view showing the mounting device of the embodiment.

[FIG. 4] A block diagram showing a configuration of a mounting device according to the embodiment.

5 is a diagram showing a combination of mounting operations performed by a mounting tool of the mounting device of the embodiment.

FIG. 6 is a diagram illustrating a preparation process of a calibration process of a substrate stage and a mounting tool in the mounting apparatus of the embodiment.

FIG. 7 is a diagram showing a calibration process of a substrate stage and a mounting tool in the mounting apparatus of the embodiment.

[FIG. 8] A plan view showing an example of the operating state of the mounting device according to the embodiment, and a diagram showing the operating state of the wafer ring exchange.

[Fig. 9] A diagram for explaining a method for correcting a movement position error of a substrate stage in the mounting device of the embodiment.

10 is a plan view showing an example of an operating state of the mounting device according to the embodiment, and a view showing a state where the left and right transfer heads and the left and right mounting heads are located at different positions, respectively.

[FIG. 11] A front view showing the mounting device according to the embodiment, and the parts supply section and the left and right transfer sections are omitted.

[FIG. 12] A front view showing a mounting device according to the embodiment, and a view showing the entire component supply section and the transfer section omitted.

13 is a plan view showing an example of electronic components to be mounted in one mounting area using the mounting device of the embodiment.

14 is a flowchart showing a manufacturing process of the package component according to the embodiment.

FIG. 15 is a plan view showing a support substrate on which a semiconductor wafer is mounted using the mounting devices of Example 1 and Comparative Example 1. FIG.

Claims (5)

An electronic component mounting device for mounting electronic components on a supporting substrate, comprising: The stage unit includes a stage on which the support substrate having a plurality of mounting areas on which the electronic components are mounted is mounted, and the stage is moved in a Y direction perpendicular to the X direction in one direction along the horizontal direction. Carrier moving mechanism The mounting section includes first and second mounting heads arranged along the X direction and each including a plurality of mounting tools for holding the electronic components, and the mounting section for holding the electronic components by the plurality of mounting tools. A mounting head moving mechanism that moves the first and second mounting heads independently and simultaneously moves on a mounting line set along the X direction; A first identification unit that identifies the entire position of the support substrate placed on the carrier; A second identification unit for identifying the positions of the electronic components of the plurality of mounting tools held on the first and second mounting heads; The memory unit stores: stage correction data for correcting the movement position error of the stage caused by the stage movement mechanism, and correction of the first and second stages of the installation line caused by the movement mechanism of the mounting head. Tool correction data of the head positional error of the movement position of each of the plurality of installed tools; The control unit is based on the position data of the support substrate recognized by the first recognition unit, the stage correction data stored in the memory unit, and the data stored in the plurality of mounting tools recognized by the second recognition unit. The position data of the electronic component and the tool correction data stored in the memory section are arranged in order to arrange the list of the mounting areas along the X direction in the support substrate on the mounting line in order, The electronic components in the plurality of mounting areas of the mounting line control the operations of the stage moving mechanism and the mounting head moving mechanism so that the first and second mounting heads share the mounting. The mounting device according to claim 1, wherein the stage has a size on which the support substrate can be placed, and the support substrate includes the first and second mounting heads, the outer surface in the X direction and the outer surface. The dimension in the X direction which is more than twice the close interval between the mounting tools. The mounting device according to claim 1, wherein the stage has a size on which the support substrate can be placed, and the support substrate has a size in the X direction of 300 mm or more. The mounting device according to any one of claim 1 to claim 3, wherein the mounting section mounts a plurality of the electronic components in one of the mounting areas of the support substrate. The mounted device according to any one of claim 1 to claim 3, further comprising: a component supply unit that supplies the aforementioned electronic components; The transfer unit includes first and second transfer nozzles that receive the electronic components from the component supply unit and transfer the electronic components to the plurality of mounting tools of the first or second mounting head, respectively.