TW201740515A - 半導體封裝及其製造方法 - Google Patents

半導體封裝及其製造方法 Download PDF

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TW201740515A
TW201740515A TW105117128A TW105117128A TW201740515A TW 201740515 A TW201740515 A TW 201740515A TW 105117128 A TW105117128 A TW 105117128A TW 105117128 A TW105117128 A TW 105117128A TW 201740515 A TW201740515 A TW 201740515A
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Taiwan
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adhesive
die
semiconductor
semiconductor die
semiconductor device
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TW105117128A
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TWI697988B (zh
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李傑恩
金本吉
金陽錫
崔旭
俞升宰
李英宇
邱彥納拉
班東和
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艾馬克科技公司
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    • B81B3/00—Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
    • B81B3/0064—Constitution or structural means for improving or controlling the physical properties of a device
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Abstract

一種半導體封裝以及一種製造一半導體封裝之方法。作為一非限制性的例子，此揭露內容的各種特點是提供一種半導體封裝以及一種製造其之方法，其包括一第一半導體晶粒、在所述第一半導體晶粒上的複數個和彼此間隔開的黏著劑區域、以及一黏著至所述複數個黏著劑區域的第二半導體晶粒。

Description

半導體封裝及其製造方法
本發明關於半導體裝置及其製造方法。
現有的半導體裝置以及用於製造半導體裝置的方法是不足的，其例如是產生過低的靈敏度、過多的成本、減低的可靠度、或是過大的封裝尺寸。習知及傳統的方式的進一步限制及缺點對於具有此項技術的技能者而言，透過此種方式與如同在本申請案的其餘部分中參考圖式所闡述的本揭露內容的比較將會變成是明顯的。
此揭露內容的各種特點是提供一種半導體封裝以及一種製造一半導體封裝之方法。作為一非限制性的例子，此揭露內容的各種特點是提供一種半導體封裝以及一種製造其的方法，其包括一第一半導體晶粒、在所述第一半導體晶粒上的複數個和彼此間隔開的黏著劑區域、以及一黏著至所述複數個黏著劑區域的第二半導體晶粒。
100‧‧‧半導體裝置
110‧‧‧電路板
111‧‧‧絕緣層(介電層)
111a‧‧‧第一表面
111b‧‧‧第二表面
112a‧‧‧第一電路圖案
112b‧‧‧第二電路圖案
113‧‧‧導電貫孔
114a‧‧‧第一保護層(介電層)
114b‧‧‧第二保護層(介電層)
115‧‧‧導電的焊盤
116‧‧‧導電的黏著層
119‧‧‧單元
120‧‧‧第一半導體晶粒
121‧‧‧導電凸塊
122‧‧‧底膠填充
130‧‧‧黏著劑區域
130a、130b、130c、130d、130e、130f‧‧‧黏著劑區域
131‧‧‧第一黏著劑區域
132‧‧‧第二黏著劑區域
140‧‧‧第二半導體晶粒
141‧‧‧通孔
142‧‧‧焊墊
143‧‧‧導線
150‧‧‧外殼(蓋子)
151‧‧‧通孔
200‧‧‧半導體裝置
230‧‧‧黏著劑區域
231‧‧‧中央彈性體
232‧‧‧第一黏著層
233‧‧‧第二黏著層
圖1A及1B是根據本揭露內容的各種特點的一種具有高靈敏度的半導 體裝置的橫截面圖以及一部分切去的平面圖。
圖2A至2F是描繪在根據本揭露內容的各種特點的一種具有高靈敏度的半導體裝置中的各種黏著劑配發區域的平面圖。
圖3是根據本揭露內容的另一實施例的一種具有高靈敏度的半導體裝置的橫截面圖。
圖4A至4I是描繪根據本揭露內容的各種特點的一種製造一具有高靈敏度的半導體裝置的方法的橫截面圖。
以下的討論是藉由提供本揭露內容的例子來呈現本揭露內容的各種特點。此種例子並非限制性的，並且因此本揭露內容的各種特點的範疇不應該是必然受限於所提供的例子之任何特定的特徵。在以下的討論中，所述措辭"例如"、"譬如"以及"範例的"並非限制性的，並且大致與"舉例且非限制性的"、"例如且非限制性的"、及類似者為同義的。
如同在此所利用的，"及/或"是表示在表列中藉由"及/或"所加入的項目中的任一個或多個。舉例而言，"x及/或y"是表示三個元素的集合{(x)、(y)、(x,y)}中的任一元素。換言之，"x及/或y"是表示"x及y中的一或兩者"。作為另一例子的是，"x、y及/或z"是表示七個元素的集合{(x)、(y)、(z)、(x,y)、(x,z)、(y,z)、(x,y,z)}中的任一元素。換言之，"x、y及/或z"是表示"x、y及z中的一或多個"。
在此所用的術語只是為了描述特定例子之目的而已，因而並不欲限制本揭露內容。如同在此所用的，單數形是欲亦包含複數形，除非上下文另有清楚相反的指出。進一步將會理解到的是，當所述術語"包括"、 "包含"、"具有"、與類似者用在此說明書時，其指明所述特點、整數、步驟、操作、元件及/或構件的存在，但是並不排除一或多個其它特點、整數、步驟、操作、元件、構件及/或其之群組的存在或是添加。
將會瞭解到的是，儘管所述術語第一、第二、等等在此可被使用以描述各種的元件，但是這些元件不應該受限於這些術語。這些術語只是被用來區別一元件與另一元件而已。因此，例如在以下論述的一第一元件、一第一構件或是一第一區段可被稱為一第二元件、一第二構件或是一第二區段，而不脫離本揭露內容的教示。類似地，各種例如是"上方的"、"在…之上"、"下方的"、"在…之下"、"側邊"、"橫向的"、"水平的"、"垂直的"、與類似者的空間的術語可以用一種相對的方式而被用在區別一元件與另一元件。然而，應該瞭解的是構件可以用不同的方式來加以定向，例如一半導體裝置可被轉向側邊，因而其"頂"表面是水平朝向的，並且其"側"表面是垂直朝向的，而不脫離本揭露內容的教示。
同樣將會理解到的是，除非另有明確相反地指出，否則耦接、連接、附接、與類似者的術語是包含直接及間接(例如，具有一介於中間的元件)的耦接、連接、附接、等等。例如，若元件A耦接至元件B，則元件A可以是透過一中間的信號分佈結構來間接耦接至元件B、元件A可以是直接耦接至元件B(例如，直接黏著至、直接焊接至、藉由直接的金屬到金屬的接合來附接、等等)、等等。
在圖式中，結構、層、區域、等等的尺寸(例如，絕對及/或相對的尺寸)可能會為了清楚起見而被誇大。儘管此種尺寸大致是指出一種範例實施方式，但是它們並非限制性的。例如，若結構A被描繪為大於區 域B，則此大致是指出一種範例實施方式，但是除非另有指出，否則結構A一般並不需要是大於結構B。此外，在圖式中，相同的元件符號可以是指整個討論中的相似的元件。
所述揭露內容的某些實施例是有關於一種具有高靈敏度的半導體裝置以及一種其製造(或是製作)方法。
一般而言，一種微機電系統(MEMS)封裝是表示一種具有許多被整合在相同的晶片上的電子電路及機械構件的系統。用於製造所述MEMS封裝的技術是源自於用在製造半導體晶片的矽製程技術。所述MEMS封裝是以一種三維的結構來加以製造，其具有被整合在一矽基板上的微加工構件，其例如是包含一閥、一馬達、一泵、一齒輪及/或一振膜。儘管一MEMS封裝可被利於在此提出的各種例子中，但是本揭露內容的範疇並不限於MEMS封裝。
根據本揭露內容之一特點，其提供有一種半導體裝置，所述半導體裝置包含一電路板；一第一半導體晶粒，其電連接至所述電路板；在所述第一半導體晶粒上的複數個和彼此間隔開的黏著劑區域；一第二半導體晶粒，其是黏著至所述複數個黏著劑區域並且電連接至所述電路板；以及一外殼，其是黏著至所述電路板，同時覆蓋所述第一半導體晶粒、所述黏著劑區域以及所述第二半導體晶粒。
根據本揭露內容的另一特點，其提供有一種半導體裝置，所述半導體裝置包含一第一半導體晶粒；在所述第一半導體晶粒上的複數個和彼此間隔開的黏著劑區域；以及一黏著至所述複數個黏著劑區域的第二半導體晶粒。
根據本揭露內容的又一特點，其提供有一種製造一半導體裝置的方法，所述製造方法包含製備一電路板；將一第一半導體晶粒電連接至所述電路板；在所述第一半導體晶粒上形成複數個和彼此間隔開的黏著劑區域；將一第二半導體晶粒附著至所述複數個黏著劑區域，並且將所述第二半導體晶粒電連接至所述電路板；以及將一外殼附著至所述電路板以覆蓋所述第一半導體晶粒、所述黏著劑區域以及所述第二半導體晶粒。
參照圖1A及1B，根據本揭露內容的各種特點的一種具有高靈敏度的半導體裝置的橫截面圖以及部分切去的平面圖被描繪。
如同在圖1A及1B中所繪，根據本揭露內容的各種特點的具有高靈敏度的半導體裝置100包含一電路板110、一第一半導體晶粒120、複數個黏著劑區域130、一第二半導體晶粒140、以及一外殼150。
在此，所述第一半導體晶粒120可以藉由例如是導電凸塊121來電連接至所述電路板110，並且所述第二半導體晶粒140可以藉由例如是導線143來電連接至所述電路板110。
所述電路板110例如可包含一絕緣層111(或是介電層)，其具有一實質平面的第一表面111a以及一與所述第一表面111a相對的實質平面的第二表面111b；第一電路圖案112a，其被形成在所述絕緣層111的第一表面111a上；第二電路圖案112b，其被形成在所述絕緣層111的第二表面111b上；以及導電貫孔113，其是將所述第一電路圖案112a以及所述第二電路圖案112b彼此連接。注意到的是，所述電路板110僅僅是一例子而已，並且各種基板結構的任一種都可被利用(例如，有核心及無核心的基板、中介體結構、單層或是多層的重佈線結構、等等)。
在此，所述絕緣層111的第一表面111a以及所述第一電路圖案112a可以被例如是一第一保護層114a(或介電層)所覆蓋，並且所述絕緣層111的第二表面111b以及所述第二電路圖案112b可以被例如是一第二保護層114b(或介電層)所覆蓋。
同時，所述第一電路圖案112a的一預設的電路圖案例如可以電連接至所述第一半導體晶粒120，所述第一電路圖案112a的另一預設的電路圖案例如可以電連接至所述第二半導體晶粒140，並且所述第一電路圖案112a的又一預設的電路圖案例如可以機械式及/或電性連接至所述外殼150。
一導電的黏著層116例如可被形成在連接至所述外殼150的第一電路圖案112a上。當從一平面來觀看時，所述導電的黏著層116例如可以具有一實質矩形的環(參看圖1B)。為此目的，當從一平面來觀看時，黏著至所述外殼150的第一電路圖案112a(或是其之部分)例如亦可以具有一實質矩形的環。
此外，導電的焊盤(land)115可被形成在所述第二電路圖案112b的特定的電路圖案上，並且稍後可以被安裝在一外部的裝置之上。由於所述導電的焊盤115具有比一般的導電球小的厚度，因此所述半導體裝置100的整體厚度可被降低。
在此，所述導電的焊盤115例如可以是被形成在所述第二電路圖案112b上的一鎳/金(Ni/Au)電鍍層、一鎳/鈀/金(Ni/Pd/Au)電鍍層、一焊料電鍍層、以及其等同物中之一，但是本揭露內容的特點並不限於此。導電球或凸塊可以連接至所述第二電路圖案112b的特定的電路圖案，而不是 所述導電的焊盤115。
所述第一半導體晶粒120是電連接至所述電路板110的第一電路圖案112a。換言之，所述第一半導體晶粒120可包含一或多個導電凸塊121，其是電連接至所述第一電路圖案112a。所述導電凸塊121例如可以是銅柱、具有焊料蓋的銅柱或柱體、導電球、焊料球、以及其等同物中之一，但是本揭露內容的特點並不限於此。
所述第一半導體晶粒120可包含一數位信號處理器(DSP)、一網路處理器、一電源管理單元、一音訊處理器、一射頻(RF)電路、一無線基頻系統單晶片(SoC)處理器、一感測器、一感測器控制器、以及一例如是特殊應用積體電路(ASIC)的電路，但是本揭露內容的範疇並不限於此。
此外，一底膠填充(underfill)122可以填入一在所述第一半導體晶粒120與所述電路板110之間的間隙。換言之，所述導電凸塊121可以被所述底膠填充122所圍繞。因此，避免所述導電凸塊121因為在所述第一半導體晶粒120與所述電路板110的熱膨脹係數之間的差異而破裂或受損是可行的。
所述複數個黏著劑區域130可被形成在所述第一半導體晶粒120上，以水平地和彼此間隔開。舉例而言，所述複數個黏著劑區域130可被形成在所述第一半導體晶粒120的角落處。所述複數個黏著劑區域130可被形成在一被形成於所述第一半導體晶粒120上的第一黏著劑區域131上、以及在一被形成於所述第一半導體晶粒120上並且黏著至所述第二半導體晶粒140，同時覆蓋(例如，完全地覆蓋、部分地覆蓋、覆蓋至少一頂端部分、等等)所述第一黏著劑區域131的第二黏著劑區域132上。注意到 的是，所述第二黏著劑區域132並不需要以所述第一黏著劑區域131為中心。
實際上，所述第一黏著劑區域131可被形成在所述第一半導體晶粒120上以具有一實質半球的形狀，並且所述第一黏著劑區域131的一表面可以被所述第二黏著劑區域132所覆蓋(例如，完全地覆蓋、部分地覆蓋、覆蓋至少一頂端部分、等等)。因此，所述第二黏著劑區域132亦可被形成以具有一實質半球的形狀。實際上，所述第一黏著劑區域131(例如，一液體黏著劑)首先可被配發在所述第一半導體晶粒120的一頂表面上以接著加以固化，並且所述第二黏著劑區域132(例如，一液體黏著劑)接著可被配發在所述第一黏著劑區域131上。接著，在所述第二半導體晶粒140被安裝在所述第二黏著劑區域132上之後，所述第二黏著劑區域132被固化，因而所述第二半導體晶粒140是透過所述第二黏著劑區域132來黏著至所述第一半導體晶粒120。換言之，所述第二半導體晶粒140是在一個其漂浮在上方的狀態中(例如，在一介於所述第一半導體晶粒120的頂表面與所述第二半導體晶粒140的底表面之間的間隙下)，透過所述黏著劑區域130而被黏著到所述第一半導體晶粒120之上。
所述複數個黏著劑區域130的每一個可以具有一在約10μm到約50μm的範圍內的厚度。若所述黏著劑區域130的厚度小於10μm，則所述半導體裝置100可能會有降低的靈敏度。然而，若所述黏著劑區域130的厚度大於50μm，則一般可能會更難以製造所述半導體裝置100，並且所述半導體裝置100的厚度可能會增加。在此，所述第一黏著劑區域131可以具有一在約5μm到約25μm的範圍內的厚度，並且所述第二黏著劑區域132可以具有一在約5μm到約25μm的範圍內的厚度。
所述複數個黏著劑區域130可以是一塑性體、一彈性體、一熱塑性彈性體、一熱固的樹脂、一光可固化樹脂、以及其等同物中的至少一種，但是本揭露內容的範疇並不限於此。例如，所述複數個黏著劑區域130可以是一種聚矽氧烷基的熱固的環氧樹脂。此外，所述第一黏著劑區域131以及所述第二黏著劑區域132可以是由不同的材料、或是相同的材料所做成的。所述黏著劑區域130例如可以是非導電的。
尤其，所述第一黏著劑區域131以及所述第二黏著劑區域132可以具有不同的模數。例如，所述第一黏著劑區域131的模數可以是相對高的，並且所述第二黏著劑區域132的模數可以是相對低的。換言之，所述第一黏著劑區域131的模數可以是高於所述第二黏著劑區域132的模數、或是所述第二黏著劑區域132的模數可以是低於所述第一黏著劑區域131的模數。換言之，由於所述第一黏著劑區域131是相對硬的(或是堅硬的)，因此其可以穩固地支撐所述第二半導體晶粒140。然而，由於所述第二黏著劑區域132是相對軟的(或是柔性的)，其容許被施加至所述第二半導體晶粒140的外部應力能夠輕易地被釋放，藉此改善所述第二半導體晶粒140的靈敏度。
所述第二半導體晶粒140是被黏著至所述複數個黏著劑區域130，並且電連接至所述電路板110。換言之，所述第二半導體晶粒140可以直接黏著至所述複數個黏著劑區域130中的第二黏著劑區域132(例如，在不直接接觸到所述第一黏著劑區域131下、等等)，並且可以藉由所述導線143(例如，接合線、等等)來電連接至所述電路板110的第一電路圖案112a。
所述第二半導體晶粒140可包含一MEMS裝置、或是可包含各種半導體裝置的任一種，其許多的例子是在此加以提供。所述MEMS裝置可包含一通孔141。例如，所述第二半導體晶粒140可以是一用於感測一外部壓力的壓力感測器、一用於感測一聲波的麥克風、一濕氣感測器、一粒子或氣體感測器、以及其等同物中之一，但是本揭露內容的特點並不限於此。
同時，所述第二半導體晶粒140具有一實質平面的底表面，其是與所述黏著劑區域130的第二黏著劑區域132直接接觸(例如，在不直接接觸到所述黏著劑區域130的第一黏著劑區域131下)。注意到的是，在各種的範例實施例中，所述第二半導體晶粒140的底表面可以接觸所述第一黏著劑區域131，例如是在所述第二黏著劑區域的黏著劑固化之前，被壓在所述第一黏著劑區域131之上。
例如，所述第二半導體晶粒140的約5%到約30%的底表面可以黏著至所述黏著劑區域130。換言之，所述第二半導體晶粒140的約95%到約70%的底表面可以直接被露出到外部的空氣。當小於5%的第二半導體晶粒140的底表面黏著至所述黏著劑區域130時，所述第二半導體晶粒140例如可能會不穩固地黏著到所述第一半導體晶粒120之上。此外，當超過30%的第二半導體晶粒140的底表面黏著至所述黏著劑區域130時，所述第二半導體晶粒140的靈敏度可能會降低。
所述導線143是將所述電路板110的第一電路圖案112a電連接至所述第二半導體晶粒140。在此，所述導線143首先被球體接合至所述電路板110的第一電路圖案112a，並且其次被針腳(stitch)接合到所述第二 半導體晶粒140的焊墊142，藉此最小化一導線迴路的高度。
所述外殼(或蓋子)150是機械式連接至被形成在所述電路板110的第一電路圖案112a上的導電的黏著層116。在此，所述外殼150包含至少一通孔151，其例如是容許壓力或聲波或是空氣能夠輕易地傳輸至所述第二半導體晶粒140。此外，所述外殼150可以是由一種金屬所做成的。所述外殼150例如可以是由銅、鋁、鍍鎳的鐵以及其等同物中之一所做成的，但是此揭露內容的範疇並不限於此。此外，所述外殼150例如可以是透過所述導電的黏著層116以及所述第一電路圖案112a而接地的。
此外，空間被提供在所述外殼150的一內部區域中，亦即在所述第一半導體晶粒120、複數個黏著劑區域130、第二半導體晶粒140以及外殼150的每一個之間，並且所述導線143可以直接被曝露到例如是空氣。
此外，一絕緣層可以進一步被形成在所述外殼150的內表面上，藉此防止所述導線143電性短路。例如，雙馬來醯亞胺三嗪(BT)、一苯酚樹脂、聚醯亞胺(PI)、苯環丁烯(BCB)、聚苯並噁唑(PBO)、環氧樹脂、以及其等同物及其混合物中之一可被塗覆在所述外殼150的內表面上，因而所述導線143不會電性短路至所述外殼150。
此外，一種例如是矽膠、活性氧化鋁或氯化鈣的吸收濕氣的吸收劑可以進一步被塗覆在所述外殼150的內表面上，藉此防止貫穿到所述外殼150內的濕氣影響到所述第二半導體晶粒140的效能。
所述吸收劑可以和所述絕緣層混合，以接著被塗覆在所述外殼150的內表面上。
在某些實例中，所述外殼150可以是由一種絕緣材料所做成 的。在此，所述外殼150可以利用一種絕緣(或是非導電的)黏著劑而被黏著至所述電路板110。
如同在圖1B中所繪，所述複數個黏著劑區域130的每一個都可包含所述第一黏著劑區域131以及所述第二黏著劑區域132，其可被配置在所述第一半導體晶粒120及/或所述第二半導體晶粒140的角落處。當以一平面(或是平面圖)觀看時，若所述第二半導體晶粒140具有一比所述第一半導體晶粒120小的尺寸，則所述黏著劑區域130可能會稍微流出到所述第二半導體晶粒140的外部。然而，當以一平面(或是平面圖)觀看時，若所述第二半導體晶粒140的尺寸等於或小於所述第一半導體晶粒120的尺寸，則所述複數個黏著劑區域130較佳的是被形成在所述第一半導體晶粒120以及所述第二半導體晶粒140的內部的區域而不是所述角落，以避免所述黏著劑區域130流出。
如上所述，在根據本揭露內容的各種特點的半導體裝置100中，由於所述第二半導體晶粒140是藉由所述複數個和彼此間隔開並且具有一預設厚度的黏著劑區域130來黏著到所述第一半導體晶粒120之上，因此所述第二半導體晶粒140的靈敏度被改善。換言之，由於所述第二半導體晶粒140是與所述第一半導體晶粒120間隔開(或是漂浮在)一預設的高度(大約10μm到約50μm)，並且將所述第二半導體晶粒140附著至所述第一半導體晶粒120的複數個黏著劑區域130是彼此間隔開一預設的距離，因此所述第二半導體晶粒140的相關外部壓力或聲波的靈敏度可被改善。
此外，所述複數個間隔開的黏著劑區域130可以改善被施加至所述第二半導體晶粒140的外部應力的輻射效能，並且可以抑制電性雜 訊。
參照圖2A至2F，描繪在根據本揭露內容的各種特點的一種具有高靈敏度的半導體裝置中的各種的黏著劑配發區域的平面圖被描繪。
如同在圖2A中所繪，黏著劑區域130a大致可被配置(或設置)在所述第一半導體晶粒120的四個角落處。如同在圖2B中所繪的，黏著劑區域130b可被配置成大致在所述第一半導體晶粒120的四個角落處以及大致在其中心處。如同在圖2C中所繪的，黏著劑區域130c可以大致沿著所述第一半導體晶粒120的四個側邊來加以配置。如同在圖2D中所繪的，黏著劑區域130d可被配置成大致在所述第一半導體晶粒120的四個側邊以及中心處。如同在圖2E中所繪，黏著劑區域130e可被配置成大致在所述第一半導體晶粒120的四個側邊的中心處。如同在圖2F中所繪，黏著劑區域130f可被配置成大致在所述第一半導體晶粒120的四個側邊的中心處、以及在其中心處。注意到的是，在此相關所述第一半導體晶粒120來展示黏著劑區域130的範例圖示的任一個中，所述第二半導體晶粒140可以取代所述第一半導體晶粒120，以相關所述第二半導體晶粒140來展示範例的黏著劑區域130的設置。
所述黏著劑區域130a至130f的配置圖案是為了更佳的理解本揭露內容而藉由舉例來加以提供，並且儘管在此未加以描繪，但是所述黏著劑區域130a至130f可以用各種其它的方式來加以配置。然而，所述黏著劑區域130a至130f的每一個應該包含所述第一黏著劑區域131、以及覆蓋所述第一黏著劑區域131的第二黏著劑區域132，並且所述黏著劑區域130a至130f應該是彼此間隔開一預設的距離，藉此改善被黏著到所述黏著 劑區域130a至130f之上的第二半導體晶粒140的靈敏度。
參照圖3，根據本揭露內容的另一實施例的一種具有高靈敏度的半導體裝置的橫截面圖被描繪。
如同在圖3中所繪，根據本揭露內容的另一實施例的具有高靈敏度的半導體裝置200可包含具有膜的形式的黏著劑區域230。例如，所述黏著劑區域230可包含一中央彈性體231、一被形成在所述彈性體231的一底表面上並且黏著至所述第一半導體晶粒120的第一黏著層232、以及一被形成在所述彈性體231的一頂表面上並且黏著至所述第二半導體晶粒140的第二黏著層233。
所述膜類型的黏著劑區域230首先可以被黏著至所述第一半導體晶粒120，並且所述第二半導體晶粒140接著可以被黏著至所述第一半導體晶粒120。或者是，所述膜類型的黏著劑區域230首先可以被黏著至所述第二半導體晶粒140的一底表面，並且所述第一半導體晶粒120接著可以被黏著至所述第二半導體晶粒140的一底表面。
由於所述中央彈性體231具有一比所述第一及第二黏著層232及233小的模數，因此所述第二半導體晶粒140的靈敏度不會因為所述中央彈性體231而降低。換言之，由於所述中央彈性體231的模數是相對低的，被施加至所述第二半導體晶粒140的外部應力可以輕易地加以釋放。此外，由於所述第一及第二黏著層232及233的模數是相對高的，因此所述第一及第二黏著層232及233可以穩固地被黏著至所述中央彈性體231。
同時，所述膜類型的黏著劑區域230例如可以具有前述在圖1A、1B以及2A至2F中所描繪的黏著劑區域130以及130a至130f的所有 特點(例如，設置、等等)。
如上所述，在根據本揭露內容的另一實施例的具有高靈敏度的半導體裝置200中，由於彼此間隔開一預設的距離並且具有一預設的厚度的複數個黏著劑區域230亦被形成在所述第一半導體晶粒120與所述第二半導體晶粒140之間，因此所述第二半導體晶粒140的靈敏度可被改善。此外，由於所述半導體裝置200的黏著劑區域230需要單一固化的製程，因此所述半導體裝置200的製程可加以簡化。
參照圖4A至4I，描繪根據本揭露內容的各種特點的一種製造一具有高靈敏度的半導體裝置的方法的橫截面圖被描繪。
根據本揭露內容的各種特點的製造具有高靈敏度的半導體裝置100的方法是包含製備一電路板、連接一第一半導體晶粒、形成黏著劑區域、連接一第二半導體晶粒、以及附接一外殼、以及單粒化。
如同在圖4A中所繪，在電路板的製備中，所述電路板110被製備，所述電路板110包含一絕緣層111，其具有一實質平面的第一表面111a以及一與所述第一表面111a相對的實質平面的第二表面；第一電路圖案112a，其被形成在所述絕緣層111的第一表面111a上；第二電路圖案112b，其被形成在所述絕緣層111的第二表面111b上；以及導電貫孔113，其是將所述第一電路圖案112a以及所述第二電路圖案112b彼此連接。如同在此論述的，各種基板的任一種可被利用以取代一電路板(或是額外地被利用)。
在此，具有一預設的厚度的一導電的黏著層116可以預先被形成在所述第一電路圖案112a的所述外殼150稍後將被附接到的一區域上。
此外，所述第一電路圖案112a的導電凸塊121及/或導線143稍後將被連接到的區域可以穿過一第一保護層114a而被露出至外部。
此外，導電的焊盤115可以預先被形成在所述第二電路圖案112b的稍後將被連接至一外部裝置的區域上。例如，在所述單粒化之前，導電球可被形成在所述第二電路圖案112b上，而不是所述導電的焊盤115。
如同在圖4B中所繪，所述電路板110可包含被配置成一矩陣配置的單元119，而所述半導體裝置100將被形成在所述單元119之處。在所述半導體裝置100的製造完成之後，所述個別的單元119被單粒化以被分成個別的裝置。
如同在圖4C中所繪，在第一半導體晶粒的連接中，導電凸塊121被形成在所述第一半導體晶粒120上，並且電連接至所述電路板110的第一電路圖案112a。所述第一半導體晶粒120可以藉由例如是質量回焊、熱壓接合、雷射輔助的接合、以及其等同物中之一來電連接至所述電路板110的第一電路圖案112a，但是此揭露內容的範疇並不限於此。在此，所述導電凸塊121可以是由例如是共晶焊料(Sn37Pb)、高鉛的焊料(Sn95Pb)、無鉛的焊料(例如是SnAg、SnAu、SnCu、SnZn、SnZnBi、SnAgCu、SnAgBi、等等)、以及其等同物中之一所做成的，但是本揭露內容的特點並不限於此。
此外，一底膠填充122可以進一步被注入到一在所述第一半導體晶粒120與所述電路板110之間的間隙中，藉此容許所述第一半導體晶粒120能夠更穩固地連接至所述電路板110。
如同在圖4D及4E中所繪，在黏著劑區域的形成中，複數個和彼此間隔開的黏著劑區域130被形成在所述第一半導體晶粒120上。例 如，首先是一第一黏著劑區域131被形成在所述第一半導體晶粒120上，以接著被剛性地固化。此外，其次是一第二黏著劑區域132被形成在所述第一黏著劑區域131上。在此，當一固化製程是在所述第一黏著劑區域131上加以執行時，在所述第二黏著劑區域132上並沒有固化製程被執行。以此種方式，所述第一黏著劑區域131是首先被形成及固化的，藉此在所述第二黏著劑區域132中，呈現減低的由於所述第二半導體晶粒140的重量所造成的流出。
如同在圖4F及4G中所繪，在第二半導體晶粒的連接中，所述第二半導體晶粒140(例如，一MEMS裝置、或是各種類型的半導體裝置的任一種)被黏著至所述複數個黏著劑區域130。在此，當所述黏著劑區域130的第一黏著劑區域131被固化時，所述第二黏著劑區域132尚未被固化。因此，在所述第二半導體晶粒140利用拾放設備而被設置在所述第二黏著劑區域132上之後，所述固化製程被執行。當所述第二黏著劑區域132是由一種熱固的樹脂所做成時，一在例如是約100℃到約350℃的範圍內的溫度被施加至所述第二黏著劑區域132。當所述第二黏著劑區域132是一種光可固化樹脂時，例如是紫外線可被施加至所述第二黏著劑區域132。以此種方式，所述第二半導體晶粒140是透過所述複數個黏著劑區域130來機械式地黏著至所述第一半導體晶粒120。
此外，所述第二半導體晶粒140是藉由導線143來電連接至所述電路板110。換言之，所述第二半導體晶粒140的焊墊142是藉由所述導線143來電連接至所述電路板110的第一電路圖案112a。
舉例而言，所述導線143的第一末端首先被球體接合至所述 電路板110的第一電路圖案112a，並且所述導線143的第二末端其次被針腳接合至所述第二半導體晶粒140的焊墊142。於是，所述導線143的每一個的一導線迴路的高度被最小化，藉此最小化所述半導體裝置100的厚度。
如同在圖4H中所繪，在外殼的附接中，具有一通孔151的外殼150(或是蓋子)被連接至先前被形成在所述電路板110上的導電的黏著層116。換言之，在由一種金屬所做成的外殼150被設置在所述導電的黏著層116上之後，一在例如是約100℃到約250℃的範圍內的溫度被施加，以將所述金屬外殼150機械式及/或電性連接至所述導電的黏著層116。在此，具有所述導電的黏著層116的第一電路圖案112a可以是接地的。
如同在圖4I中所繪，在所述單粒化中，複數個半導體裝置100是從所述電路板110加以分開。如上所述，所述電路板110包含複數個單元，並且所述半導體裝置100是被形成在所述複數個單元的每一個中。因此，在所述半導體裝置100的製造完成之後，個別的半導體裝置100是利用例如是一鑽石刀片、一沖壓機或雷射射束，以從所述電路板110加以分開。
如上所述，在根據本揭露內容的一實施例的一種具有高靈敏度的半導體裝置以及其製造方法中，一MEMS裝置(或是其它半導體晶粒或電性構件)被黏著到複數個在一電路板或是一半導體晶粒上並且具有一預設的厚度的和彼此間隔開的黏著劑區域之上，因而所述MEMS裝置被配置以實質漂浮在空氣中。因此，被施加至所述MEMS裝置的外部應力可以更有效率地被降低，藉此抑制電性雜訊。此外，所述黏著劑區域包含一第一黏著劑區域以及一覆蓋所述第一黏著劑區域的第二黏著劑區域，藉此在所述 黏著劑區域中，呈現降低的由於所述MEMS裝置的重量所造成的流出。
在此的討論是包含許多的舉例說明的圖，其展示一電子封裝組件以及其製造方法的各種的部分。為了舉例說明的清楚起見，此種圖並未展示每一個範例組件的所有特點。在此提供的範例組件及/或方法的任一個都可以與在此提供的其它組件及/或方法的任一個或是全部共用任一個或是所有的特徵。
總之，此揭露內容的各種特點是提供一種半導體裝置以及一種製造一半導體裝置的方法。作為一非限制性的例子，此揭露內容的各種特點是提供一種半導體封裝以及一種其製造方法，其包括一第一半導體晶粒、在所述第一半導體晶粒上的複數個和彼此間隔開的黏著劑區域、以及一黏著至所述複數個黏著劑區域的第二半導體晶粒。儘管先前的內容已經參考某些特點及例子來加以敘述，但是熟習此項技術者將會理解到可以做成各種的改變，並且等同物可加以取代，而不脫離本揭露內容的範疇。此外，可以做成許多修改以將一特定的情況或材料調適至本揭露內容的教示，而不脫離其範疇。因此，所欲的是本揭露內容不受限於所揭露之特定的例子，而是本揭露內容將會包含落入所附的請求項的範疇內之所有的例子。
100‧‧‧半導體裝置
110‧‧‧電路板
111‧‧‧絕緣層(介電層)
111a‧‧‧第一表面
111b‧‧‧第二表面
112a‧‧‧第一電路圖案
112b‧‧‧第二電路圖案
113‧‧‧導電貫孔
114a‧‧‧第一保護層(介電層)
114b‧‧‧第二保護層(介電層)
115‧‧‧導電的焊盤
116‧‧‧導電的黏著層
120‧‧‧第一半導體晶粒
121‧‧‧導電凸塊
122‧‧‧底膠填充
130‧‧‧黏著劑區域
131‧‧‧第一黏著劑區域
132‧‧‧第二黏著劑區域
140‧‧‧第二半導體晶粒
141‧‧‧通孔
142‧‧‧焊墊
143‧‧‧導線
150‧‧‧外殼(蓋子)
151‧‧‧通孔

Claims (20)

  1. 一種半導體裝置，其包括：一基板；一第一半導體晶粒，其具有一頂端第一晶粒表面以及一底部第一晶粒表面，其中所述底部第一晶粒表面是耦接至所述基板，並且所述第一半導體晶粒是電連接至所述基板；複數個彼此間隔開的黏著劑區域，其是在所述頂端第一晶粒表面上；以及一第二半導體晶粒，其具有一頂端第二晶粒表面以及一底部第二晶粒表面，其中所述底部第二晶粒表面是黏著至所述複數個黏著劑區域，並且所述第二半導體晶粒是電連接至所述基板。
  2. 如請求項1的半導體裝置，其中所述基板是一電路板。
  3. 如請求項1的半導體裝置，其中直接介於所述第一半導體晶粒與所述第二半導體晶粒之間的容積只包括所述複數個黏著劑區域以及空氣。
  4. 如請求項1的半導體裝置，其中所述複數個黏著劑區域的至少一部分是被設置在所述第一半導體晶粒及/或所述第二半導體晶粒的角落處。
  5. 如請求項1的半導體裝置，其中所述複數個黏著劑區域的至少一部分是沿著所述第一半導體晶粒及/或所述第二半導體晶粒的側邊來加以設置。
  6. 如請求項1的半導體裝置，其中所述複數個黏著劑區域中的至少一個是被形成在所述第一半導體晶粒及/或所述第二半導體晶粒的中心處。
  7. 如請求項1的半導體裝置，其中所述複數個黏著劑區域的每一個具有在10μm到50μm的範圍內的一垂直的厚度。
  8. 如請求項1的半導體裝置，其中所述黏著劑區域是由以下的至少一種所做成的：一塑性體、一彈性體、一熱塑性彈性體、一熱固的樹脂、以及一光可固化樹脂。
  9. 如請求項1的半導體裝置，其中所述複數個黏著劑區域的每一個包括：一第一黏著劑區域，其是在所述頂端第一晶粒表面上，並且黏著至所述頂端第一晶粒表面；以及一第二黏著劑區域，其是在所述頂端第一晶粒表面以及所述第一黏著劑區域上，並且黏著至所述頂端第一晶粒表面以及所述第一黏著劑區域，並且黏著至所述底部第二晶粒表面。
  10. 如請求項9的半導體裝置，其中所述第一黏著劑區域包括一第一黏著劑，並且所述第二黏著劑區域包括一不同於所述第一黏著劑的第二黏著劑。
  11. 如請求項10的半導體裝置，其中所述第一黏著劑具有一比所述第二黏著劑高的模數。
  12. 如請求項1的半導體裝置，其中所述第二半導體晶粒包括一微機電系統(MEMS)裝置，並且所述MEMS裝置包括一通孔。
  13. 如請求項12的半導體裝置，其包括一黏著至所述基板並且覆蓋所述第一半導體晶粒、所述黏著劑區域以及所述第二半導體晶粒的蓋子，其中所述蓋子是包括一通孔。
  14. 如請求項1的半導體裝置，其中所述第一半導體晶粒是藉由導電凸塊來電連接至所述基板，並且所述第二半導體晶粒是藉由導線來電連接至 所述基板。
  15. 一種半導體裝置，其包括：一基板；一第一半導體晶粒，其具有一頂端第一晶粒表面以及一底部第一晶粒表面，其中所述底部第一晶粒表面是耦接至所述基板，並且所述第一半導體晶粒是電連接至所述基板；複數個彼此間隔開的黏著劑區域，其是在所述頂端第一晶粒表面上；以及一第二半導體晶粒，其具有一頂端第二晶粒表面以及一底部第二晶粒表面，其中所述底部第二晶粒表面是黏著至所述複數個黏著劑區域，並且所述第二半導體晶粒是電連接至所述基板，其中所述複數個黏著劑區域的每一個是包括：一第一黏著層，其是在所述頂端第一晶粒表面上，並且黏著至所述頂端第一晶粒表面；一中央層，其是在所述第一黏著層上，並且黏著至所述第一黏著層；以及一第二黏著層，其是在所述中央層上並且黏著至所述中央層，並且黏著至所述底部第二晶粒表面。
  16. 如請求項15的半導體裝置，其中所述中央層包括一彈性體。
  17. 如請求項15的半導體裝置，其中所述中央層具有一低於所述第一及第二黏著層的模數。
  18. 一種半導體裝置，其包括： 一第一半導體晶粒，其具有一頂端第一晶粒表面；複數個和彼此間隔開的黏著劑區域，其是在所述頂端第一晶粒表面上；以及一第二半導體晶粒，其具有一底部第二晶粒表面，其中所述底部第二晶粒表面是黏著至所述複數個黏著劑區域。
  19. 如請求項18的半導體裝置，其中所述黏著劑區域的每一個包括一第一黏著劑區域以及一第二黏著劑區域，所述第一黏著劑區域以及第二黏著劑區域是介於所述第一及第二半導體晶粒之間。
  20. 如請求項19的半導體裝置，其包括介於所述第一及第二黏著層之間的一層。
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