TW201545233A - 製造具有絕緣層之積體電路的方法 - Google Patents

製造具有絕緣層之積體電路的方法 Download PDF

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TW201545233A
TW201545233A TW103144728A TW103144728A TW201545233A TW 201545233 A TW201545233 A TW 201545233A TW 103144728 A TW103144728 A TW 103144728A TW 103144728 A TW103144728 A TW 103144728A TW 201545233 A TW201545233 A TW 201545233A
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insulating layer
annealing
trench
dry
densifying
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TW103144728A
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Errol Todd Ryan
Sukwon Hong Watervliet
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Globalfoundries Us Inc
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Abstract

提供製造積體電路的方法。一種製造積體電路的方法包括：形成覆於基板上的一絕緣層，該絕緣層在此形成於溝槽內。用水浸漬該絕緣層，以及退火該絕緣層同時照射它。以約800℃或更低的乾退火溫度退火該絕緣層。

Description

製造具有絕緣層之積體電路的方法
本發明大致係關於製造積體電路的方法，且尤係關於製造具有絕緣層之積體電路同時遵循積體電路的熱預算的方法。
二氧化矽在許多積體電路中用來作為絕緣體，而二氧化矽的品質會隨著密度增加而提高。高品質二氧化矽對於某些蝕刻劑更有抵抗力，而且可以比低品質二氧化矽更加一致的速率蝕刻，因此高品質二氧化矽可簡化下游加工操作。有些現有製程係將絕緣層沉積於溝槽內，以及溝槽的高寬比傾向隨著積體電路的大小減少而增加。許多絕緣層沉積製程經設計成可填充高高寬比的溝槽，但是此類絕緣層沉積製程可能無法製造稠密的高品質二氧化矽絕緣。例如，有些可流動化學氣相沉積(FCVD)製程能夠填充有高高寬比的溝槽，但是該絕緣材料為含矽及氮薄膜。有些高高寬比製程(HARP)能夠沉積氧化矽於有高高寬比的溝槽內，但是氧化矽一般不是高品質的稠密材料。
在歷史上，FCVD或HARP材料已以約500℃ 溫度暴露於蒸氣退火以使矽/氮鍵轉變成氧化矽鍵，以及開始增密製程(densification process)。蒸氣退火之後，以約1,000℃或更多的退火溫度乾退火，以及該高退火溫度可製造稠密的高品質二氧化矽。不過，有些基板有熱預算，而且超過熱預算溫度的退火製程可能使基板劣化。例如，許多含鍺基板有低於1,000℃的熱預算，其中該熱預算傾向隨著鍺在基板中的百分比增加而降低。有些III-V族基板，例如砷化鎵或砷化銦鎵，具有約600℃或約400℃的熱預算，而其他基板或積體電路中的組件存在其他的熱預算溫度極限。
隨著積體電路的大小減少，積體電路中之組件的大小也減少。鰭片形成於許多積體電路的基板中，而該等鰭片的強度隨著鰭片的大小減少而降低。當鰭片變小時，增密製程傾向使基板的鰭片彎曲或斷裂，特別是當積體電路以高溫退火時。二氧化矽與某些鰭片的材料有不同熱膨脹係數，因此退火的溫度愈高，在進行退火時會有愈多的應力轉移到該等鰭片。
因此，期望提供用於製造具有能夠填充高高寬比溝槽之絕緣材料的積體電路的方法，在此可以低溫增密該絕緣材料。另外，期望提供用於形成具有窄鰭片之積體電路的方法，在此當增密相鄰鰭片間之絕緣材料時，該等鰭片不會彎曲或斷裂。此外，由以下結合附圖和本發明背景的詳細說明及隨附申請專利範圍可明白本發明具體實施例的其他合意特徵及特性。
提供數種積體電路及其製造方法。在一示範具體實施例中，一種製造積體電路的方法包括：形成覆於基板上的絕緣層，該絕緣層在此形成於溝槽內。用水浸漬該絕緣層，以及退火該絕緣層同時照射它。該絕緣層係以約800℃或更低的乾退火溫度退火。
在另一具體實施例中，提供一種製造積體電路的方法。形成覆於基板上以及在溝槽內的絕緣層，該絕緣層在此包括含矽及氮薄膜。該含矽及氮薄膜被轉變成二氧化矽，以及用乾退火增密同時照射它。增密該絕緣層使該絕緣層的密度增加約0.05公克/立方公分或更多。
在又一具體實施例中，提供一種製造積體電路的方法。在基板中形成複數個鰭片，在此在相鄰鰭片之間界定溝槽。該複數個鰭片有約10奈米或更小的鰭片寬度，以及該複數個鰭片在垂直線的約1度內。該溝槽有約高度為10或更多和約寬度為1的高寬比。在該溝槽內形成絕緣層，在此該絕緣層填充該溝槽約95體積百分比或更多。增密該絕緣層使得該複數個鰭片在垂直線的約2度內。
10‧‧‧積體電路
12‧‧‧基板
14‧‧‧鰭片
16‧‧‧溝槽
18‧‧‧溝槽高度
20‧‧‧溝槽寬度
22‧‧‧鰭片寬度
30‧‧‧絕緣層
32‧‧‧液態水
34‧‧‧蒸氣退火溫度
36‧‧‧乾退火溫度
38‧‧‧輻射源
以下將結合附圖來描述本發明的具體實施例，共同類似的元件用相同的元件符號表示。
第1圖至第5圖的橫截面圖根據示範具體實施例圖示積體電路之一部份以及其製造方法。
以下詳細說明本質上只是示範說明而非旨在限制各個具體實施例及其應用和用途。此外，不希望受限於在【先前技術】或【實施方式】中提到的任何理論。
絕緣層係形成覆於基板上，而該絕緣層為填充溝槽的“間隙填充”層。在間隙填充應用上，通常使用可流動型絕緣層，使得基本上整個間隙用絕緣層填充。許多可流動型絕緣層在填充間隙方面良好，甚至有高高寬比，但是需要高溫退火將絕緣材料轉變成高品質稠密的二氧化矽可能會超過基板的熱預算，而且熱膨脹問題可能會損壞基板上的精密結構，如上述。FCVD絕緣層在填充高高寬比間隙方面良好，但是會形成含矽及氮薄膜。藉由用水浸漬該含矽及氮薄膜及/或在有蒸汽的情形下退火，可將該含矽及氮薄膜轉變成氧化矽。所形成的氧化矽可能沒有如期望中般稠密，所以可能要用另一個退火增密。該增密退火為去除水以及使薄膜進一步交聯的乾退火，以及該增密藉由在退火期間照射絕緣層可降低退火的溫度以提供額外的能量給增密用。在絕緣層增密後，附加的製造步驟可用來製造該積體電路。
請參考第1圖。積體電路10包括基板12。用於本文的用語“基板”12涵蓋由半導體工業傳統用來製作電子裝置之半導體材料形成的基板12。半導體材料包括單晶矽材料，例如常用於半導體工業的相對純或輕度摻有雜質的單晶矽材料，以及多晶矽材料，以及與其他元素(例如鍺，碳及其類似者)混合的矽。半導體材料也包括其 他材料，例如相對純或摻有雜質的鍺、氧化鋅、玻璃及其類似者。其他半導體材料包括III-V族半導體材料，例如砷化鎵、氮化硼、磷化硼、銻鋁(aluminum antimonide)、砷化銦鎵，以及周期表第III及V族中之化合物的各種組合。在一示範具體實施例中，該半導體材料為包含矽及鍺的單晶基板。基板12可為塊狀晶圓(如圖示)，或可為在由承載晶圓支撐的絕緣層上的半導體材料薄層。
鍺具有約937℃的熔點，矽鍺基板12的熱預算常常小於約1,000℃。該熱預算可經設計成防止鍺在基板基質內熔化。該“熱預算”為基板12、積體電路10或其他結構在不會造成不可接受之傷害或損壞下可暴露的溫度限制，或暴露於某些溫度的時間限制。在一些實例中，最好儘可能在熱預算所允許的最大溫度保持愈久愈好，因此損壞可能在較低的溫度開始以及隨著溫度增加。該熱預算可設定在損壞被視為太嚴重的一點，但加工溫度保持在熱預算下可降低不合意但是仍可製造出可用產品的損壞。矽鍺基板12的熱預算可取決於鍺在基板12中的濃度。有些示範熱預算包括不超過約1,000℃，或不超過約800℃，或不超過約600℃的最大溫度。在不同具體實施例中，有些III-V族半導體材料有不超過約600℃，或不超過約500℃，或不超過約400℃的熱預算。例如，有些III-V族半導體中的砷在超過熱預算時可能放出氣體，因此基板12的組合物可能改變。
在一示範具體實施例中，形成複數個鰭片 14於基板12中，鰭片14在此係由熟諳此藝者所習知的方法及技術形成。溝槽16界定於相鄰鰭片14之間，在此溝槽16有以雙箭頭18標示的溝槽高度與以雙箭頭20標示的溝槽寬度。溝槽16具有溝槽高度18相對於溝槽寬度20的高寬比，在某些具體實施例中，該高寬比可約為5比1或更多比1，在其他具體實施例中約為10比1或更多比1，以及又在其他具體實施例中，約為20比1。一般而言，溝槽高寬比愈大，填充溝槽16愈困難。鰭片14具有用雙箭頭22標示的鰭片寬度，在某些具體實施例中，鰭片寬度22約有10奈米或更小，或在其他具體實施例中，約有20奈米或更小，或又在其他具體實施例中，約有30奈米或更小。鰭片寬度22愈小，鰭片14愈容易損壞，因為薄鰭片14比材料相同之較厚鰭片14更柔弱。鰭片14也可為實質上垂直的，例如在垂直線的約1度內。垂直鰭片14被併入許多積體電路10中。
在圖示於第2圖及第3圖的一示範具體實施例中，第3圖為第2圖的一放大部份，形成覆於基板12上及在溝槽16內的絕緣層30。絕緣層30可實質填充溝槽16，使得絕緣層30填充溝槽16約95體積百分比或更多，以及絕緣層30也可延伸越過及高於溝槽16。在某些具體實施例中，絕緣層30可厚約200至約1,000奈米，但是其他的厚度也有可能。在某些具體實施例中，溝槽16由基板12形成，如圖示，但是在其他具體實施例中，該溝槽可由基板12以外的材料(未圖示)形成，例如在製造替換性金屬 閘極(replacement metal gate)期間形成的溝槽。
絕緣層30可藉由使用可流動化學氣相沉積(FCVD)製程沉積含矽及氮薄膜而形成。不被理論所拘束，但是該FCVD製程可形成呈氣相的寡聚物，其中該寡聚物可流動而藉此流入溝槽16，以及該寡聚物在流進定位後隨後可進一步聚合。在一示範具體實施例中，該FCVD為電漿化學氣相沉積製程，它可使用包含有含矽及氮前驅物的含低碳或無碳矽前驅物。該矽前驅物可為三矽烷基胺(trisilylamine amine、二矽烷基胺、單矽烷基胺、矽烷或其他前驅物，而該含氮前驅物可為氨、氮氣或其他化合物。在替代具體實施例中，也可使用其他FCVD製程。在替代具體實施例中，高高寬比製程(HARP)可用來形成覆於基板12上及在溝槽16內的絕緣層30。在一示範具體實施例中，該HARP在低於大氣壓力的化學氣相沉積中，使用臭氧及正矽酸乙酯(TEOS)作為前驅物可形成二氧化矽絕緣層30，但是在替代具體實施例中，可使用其他前驅物或製程。製造絕緣層30的其他方法包括旋塗玻璃(spin-on glass；SOG)及旋塗電介質(spin-on dielectrics；SOD)。SOG與SOD被應用作為液體，基板12係經旋轉而散佈SOG或SOD。該SOG可包含矽-氧鍵，以及矽-氫鍵。SOG市上有售，例如ACCUGLASS®的T-12B，可購自HONEYWELL® Electronic Materials公司，地址在1349 Moffett Park Drive,Sunnyvale,CA 94089,USA。SOD可為液體化合物含有矽氮烷化合物以及視需要的溶劑，在此該SOD經塗佈成可形成 含氮及氫的絕緣材料。有些SOD包含催化劑以協助SOD轉變成含有二氧化矽。SOD市上有售，例如SPINFIL® 100，可購自AZ Electronic Materials USA Corp公司，地址在70 Meister Ave.,Branchburg,NJ 08876,USA。
用水浸漬絕緣層30，如第4圖的示範具體實施例所示。可藉由使絕緣層30暴露於液態水32而用水浸漬絕緣層30，其中在某些具體實施例中，可使用去離子或蒸餾液態水32。在某些具體實施例中，在暴露於液態水32後，在有蒸氣的情形下以約500℃或更低的蒸氣退火溫度34退火絕緣層30。在其他具體實施例中，蒸氣退火溫度34約為400℃或更低，或在其他具體實施例中，約為300℃或更低。用水浸漬絕緣層30會使具體實施例中的矽/氮鍵轉變成矽/氧鍵，其中絕緣層30為含矽及氮薄膜。在某些具體實施例中，低溫蒸氣退火(蒸氣退火溫度34約為500℃或更低，400℃或更低，或300℃或更低)可製造密度約為2.05公克/立方公分或更低的絕緣層30，在其他具體實施例中，約為2.15公克/立方公分。絕緣層30在用水浸漬後主要為二氧化矽。低密度二氧化矽有約2.03公克/立方公分的密度，中密度二氧化矽有約2.13公克/立方公分的密度，以及高密度二氧化矽有約2.24公克/立方公分的密度。在某些具體實施例中，蒸氣退火製成有低至中密度的絕緣層30。
參考圖示於第5圖的示範具體實施例，絕緣層30以乾退火溫度36的乾退火增密。該乾退火可在實質 缺水的氮氣氛進行，例如水濃度約為百萬分之100或更少，使得殘留於絕緣層30中的水在乾退火期間去除。在替代具體實施例中，可使用除氮以外的乾燥氣氛，例如氦或其他氣體。乾退火溫度36隨著不同具體實施例而有所不同，其中乾退火溫度36經選定成是在基板12或積體電路10在乾退火時的熱預算內。在不同的具體實施例中，乾退火溫度36可約為800℃或更低，或約為600℃或更低，或約為500℃或更低，或約為400℃或更低。在許多具體實施例中，乾退火溫度36約等於或高於上述蒸氣退火溫度34。在一示範具體實施例中，該乾退火使絕緣層30的密度增加約0.05公克/立方公分或更多，或在另一具體實施例，增加約0.07公克/立方公分或更多，或在又一具體實施例中，增加約0.10公克/立方公分或更多。該增密製程可在絕緣層30中製造高密度二氧化矽，使得絕緣層30在不同的具體實施例中有約2.18公克/立方公分或更高、或約2.20公克/立方公分或更高、或約2.24公克/立方公分或更高的密度。
較高的乾退火溫度36傾向產生絕緣層30有較稠密、較高品質的二氧化矽，如上述。在乾退火期間可照射絕緣層30以增加能量給退火製程，有助於絕緣層30的增密而不超過熱預算。在某些具體實施例中，絕緣層30的乾退火及照射可持續約30秒至約30分鐘，但是也可使用不同的時間。在一示範具體實施例中，輻射源38在乾退火製程期間可用來使絕緣層30暴露於照射能量。在某些 具體實施例中，輻射源38可為紫外線燈，但是在各種具體實施例中，輻射源38也可為紅外線燈、可見光燈、微波源(如果夠多的水留在絕緣層30中)、或電子束源。退火時間可取決於乾退火溫度36以及所用之輻射源38的強度及類型。在某些具體實施例中，因為上表面起初接受較多照射能量，所以最初可以比下層快的速率增密絕緣層30的上表面。不過，與較低密度的層相比，照射能量更容易通過已增密之層，因此下層的增密速率在上層已增密時可增加。該增密製程可包含一或更多乾退火，在乾退火期間，相同或不同的輻射源或無輻射源可使用於不同的步驟。
該乾退火的相對低溫度在溫度較高的乾退火製程期間減少熱循環強度(thermal cycle intensity)。經減少之熱循環強度會減少由基板12與絕緣層30之不同膨脹係數所產生的應力，這會減少溝槽16壁上的應力。在溝槽16形成於相鄰鰭片14之間的具體實施例中，經減少之應力會減低鰭片14彎曲或斷裂的可能性，使得鰭片14在增密製程後大致在垂直線的約2度內。在溝槽16形成於除在相鄰鰭片14之間以外的結構中的具體實施例中，經減少之應力可協助防止由於溝槽16之壁與絕緣層30之膨脹係數有差異而損壞或改變。
如熟諳此藝者所了解的，在某些具體實施例中，絕緣層30可用來形成淺溝槽隔離，但是在鰭片場效電晶體(FinFET)中，絕緣層30也可用來作為在相鄰鰭片之間的絕緣層30。在積體電路10的製造中，絕緣層30也可 用於其他的“間隙填充”操作。然後，如熟諳此藝者所了解的，許多附加加工步驟可用來增加組件以及研發積體電路10。
儘管以上詳細說明已陳述至少一示範具體實施例，然而應瞭解，仍有有許多變體。也應瞭解，該等示範具體實施例只是範例而非旨在以任何方式限制本申請案的範疇、適用性或組構。反而，上述詳細說明是要讓熟諳此藝者有個方便的發展藍圖用來具體實作一或更多具體實施例，應瞭解，描述於一示範具體實施例之元件的功能及配置可做出各種改變而不脫離如隨附申請專利範圍所述的範疇。
10‧‧‧積體電路
12‧‧‧基板
14‧‧‧鰭片
16‧‧‧溝槽
18‧‧‧溝槽高度
20‧‧‧溝槽寬度
22‧‧‧鰭片寬度
30‧‧‧絕緣層
36‧‧‧乾退火溫度
38‧‧‧輻射源

Claims (20)

  1. 一種製造積體電路的方法，包含：形成覆於基板上的絕緣層，其中，該絕緣層形成於溝槽內；以水浸漬該絕緣層；以及以乾退火溫度退火該絕緣層，同時照射該絕緣層，其中，該乾退火溫度約為800℃或更低。
  2. 如申請專利範圍第1項所述之方法，其中，形成該絕緣層包括：藉由化學氣相沉積法沉積覆於該基板上的含矽及氮薄膜。
  3. 如申請專利範圍第1項所述之方法，其中，形成該絕緣層包括：形成覆於該基板上的該絕緣層，其中，該溝槽具有約5/1或更多的高寬比，以及其中，該絕緣層填充該溝槽約95體積百分比或更多。
  4. 如申請專利範圍第3項所述之方法，其中，退火該絕緣層包括：增密該絕緣層至約2.20公克/立方公分或更大，其中，該絕緣層在退火後包含二氧化矽。
  5. 如申請專利範圍第1項所述之方法，其中，浸漬該絕緣層包括：使該絕緣層暴露於水；以及在有蒸氣的情形下以約500℃或更低的蒸氣退火溫度，退火該絕緣層。
  6. 如申請專利範圍第1項所述之方法，其中，退火該絕 緣層包括：以紫外光照射該絕緣層。
  7. 如申請專利範圍第1項所述之方法，更包括：形成複數個鰭片於該基板中，使得該溝槽在相鄰鰭片之間，其中，該複數個鰭片具有約10奈米或更小的鰭片寬度，以及其中，該複數個鰭片在垂直線的1度內；以及其中，退火該絕緣層包括：使該複數個鰭片保持在垂直線的約2度內。
  8. 如申請專利範圍第1項所述之方法，其中，退火該絕緣層包括：退火該絕緣層，其中，該乾退火溫度約為600℃或更低。
  9. 如申請專利範圍第1項所述之方法，其中，退火該絕緣層包括：退火該絕緣層，其中，該乾退火溫度約為500℃或更低。
  10. 如申請專利範圍第1項所述之方法，其中：退火該絕緣層包括：退火該絕緣層，其中，該乾退火溫度約為400℃或更低；以及以水浸漬該絕緣層包括：於約400℃或更低的蒸氣退火溫度，以水浸漬該絕緣層。
  11. 一種製造積體電路的方法，包含：形成覆於基板上的絕緣層，其中，該絕緣層形成於溝槽內，以及其中，該絕緣層包括含矽及氮薄膜；使該含矽及氮薄膜轉變成二氧化矽；以及以乾退火增密該絕緣層，同時照射該絕緣層，其 中，增密該絕緣層係使該絕緣層的密度增加約0.05公克/立方公分或更多。
  12. 如申請專利範圍第11項所述之方法，其中，增密該絕緣層包括：以紫外光照射該絕緣層。
  13. 如申請專利範圍第12項所述之方法，其中，增密該絕緣層包括：以約800℃或更低的退火溫度乾退火。
  14. 如申請專利範圍第12項所述之方法，其中，增密該絕緣層包括：以約600℃或更低的乾退火溫度乾退火。
  15. 如申請專利範圍第12項所述之方法，其中，增密該絕緣層包括：以約400℃或更低的退火溫度乾退火。
  16. 如申請專利範圍第11項所述之方法，其中，使該含矽及氮薄膜轉變成該二氧化矽包括：以約500℃或更低的蒸氣退火溫度蒸氣退火。
  17. 一種製造積體電路的方法，包含：形成複數個鰭片於基板中，藉此在相鄰鰭片之間界定溝槽，其中，該鰭片具有約10奈米或更小的鰭片寬度，其中，該鰭片在垂直線的約1度內，以及其中，該溝槽具有約高度為10或更多和寬度為1的高寬比；形成絕緣層於該溝槽內，其中，該絕緣層填充該溝槽約95體積百分比或更多；增密該絕緣層，使得該鰭片在垂直線的約2度內。
  18. 如申請專利範圍第17項所述之方法，其中，增密該絕緣層包括：使該絕緣層的密度增加約0.05公克/立方公分或更多。
  19. 如申請專利範圍第17項所述之方法，其中，增密該絕緣層包括：以約600度或更低的乾退火溫度乾退火。
  20. 如申請專利範圍第17項所述之方法，其中，增密該絕緣層包括：產生密度約有2.20公克/立方公分或更多的該絕緣層。
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